Page 1
Advanced Power MOSFET
SFH9154
FEATURES
■ Avalanche Rugged Technology
■ Rugged Gate Oxide Technology
■ Lower Input Capacitance
■ Improved Gate Charge
■ Extended Safe Operating Area
o
■ 150
C Operating Temperature
■ Lower Leakage Current : 10 µA(Max.) @ V
■ Lower R
: 0.140 Ω (Typ.)
DS(ON)
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
Drain-to-Source Voltage
Continuous Drain Current (T
Continuous Drain Current (T
=25oC)
C
=100oC)
C
Drain Current-Pulsed ①
Gate-to-Source Voltage
Single Pulsed Avalanche Energy ②
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (TC=25oC)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8＂ from case for 5-seconds
T
V
DSS
I
I
DM
V
E
I
AR
E
dv/dt
P
, T
J
T
D
GS
AS
AR
D
STG
L
= -150V
DS
①
①
③
BV
DSS
R
DS(on)
ID= -18 A
TO-3P
1
2
3
1.Gate 2. Drain 3. Source
-150
-18
-11.5
-72
±30
1215
-18
20.4
-5.0
204
1.63
- 55 to +150
300
= -150 V
= 0.2 Ω
mJ
mJ
V/ns
W
W/
o
V
A
A
V
A
o
C
C
Thermal Resistance
R
θJC
R
θCS
R
θJA
Characteristic Max. UnitsSymbol Typ.
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
--
0.24
--
0.61
--
40
o
C/W
1
Page 2
SFH9154
P-CHANNEL
POWER MOSFET
Electrical Characteristics
CharacteristicSymbol
BV
ΔBV/ΔT
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
C
C
C
t
d(on)
t
d(off)
Q
Q
Q
Drain-Source Breakdown Voltage
DSS
Breakdown Voltage Temp. Coeff.
J
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
Forward Transconductance
fs
Input Capacitance
iss
Output Capacitance
oss
Reverse Transfer Capacitance
rss
Turn-On Delay Time
t
Rise Time
r
Turn-Off Delay Time
t
Fall Time
f
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain(＂Miller＂) Charge
gd
(TC=25℃ unless otherwise specified)
Max. UnitsTyp.Min. Test Condition
V
-150
--
-2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
-0.16
--
-100
--
--
--
-100
--
0.14 0.2
11
2290
3000
400
200
20
40
80
40
100
20
40
--
--
-4.0
100
-10
--
600
300
45
90
170
90
130
--
--
V
V/℃
V
nA
μA
Ω
pF
ns
nC
=0V,ID=-250μA
GS
I
=-250μA See Fig 7
D
V
=-5V,ID=-250μA
DS
V
=-30V
GS
V
=30V
GS
VDS=-150V
V
=-120V,TC=125℃
DS
=-10V,ID=-9.0A
V
GS
Ω
VDS=-40V,ID=-9.0A
VGS=0V,VDS=-25V,f =1MHz
VDD=-75V,ID=-18A,
R
=6.2Ω
G
VDS=-120V,VGS=-10V,
I
=-18A
D
See Fig 6 & Fig 12
See Fig 5
See Fig 13
④
④
④⑤
④⑤
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes ;
① Repetitive Rating : Pulse Wi dth Lim i ted by Maximum Junction Temperature
② L=5mH, I
③ I
④ Pulse Test : Pulse Width = 250μs, Duty Cycl e ≤ 2%
⑤ Essentially Independent of Operating Temperature
Continuous Source Current
S
Pulsed-Source Current ①
Diode Forward Voltage
SD
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
=-18A, VDD=-50V, RG=27Ω, Starting TJ =25℃
AS
≤-18A, di/dt≤450A/μs, VDD≤BV
SD
④
, Starting TJ =25℃
DSS
--
--
--
--
-200
--
1.5
--
-72
-5.0
--
--
A
V
ns
μC
-18
--
Integral reverse pn-diode
in the MOSFET
T
=25℃,IS=-18A,VGS=0V
J
T
=25℃,IF=-18A
J
di
/dt=100A/μs
F
④
2
Page 3
P-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
-V
GS
, Drain Current [A]
-I
D
2
10
1
10
0
10
10
To p : 15 V
1 0 V
8 .0 V
7 .0 V
6 .0 V
5 .5 V
5 .0 V
Bo ttom : 4 .5 V
-1
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
-VDS , Drain-Source Voltag e [V]
SFH9154
2
10
1
10
- 55 oC
@ Notes :
1. V
2. V
3. 250
= 0 V
GS
= 40 V
DS
s Pulse Test
µ
0
10
, Drain Current [A]
D
-I
-1
0
10
1
10
10
0246810
150 oC
25 oC
-VGS , Gate-Source Voltage [V]
0.24
0.20
]
Ω
, [
DS(on)
R
0.16
VGS = -10 V
VGS = -20 V
0.12
Drain-Source On-Res istance
0.08
0 153045607590
@ Note : TJ = 25 oC
-ID , Drain Current [ A]
Capacitance [pF]
5000
4000
3000
2000
1000
C
iss
C
oss
C
rss
0
0
10
C
= Cgs+ Cgd ( Cds= shorted )
iss
C
= Cds+ C
oss
gd
C
= C
rss
gd
@ Notes :
1. V
2. f = 1 MHz
1
10
GS
-VDS , Drain-Source Voltag e [V]
= 0 V
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
2
10
1
10
0
10
, Reverse D rain Current [A]
-I
150 oC
DR
25 oC
-1
10
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
@ Notes :
1. V
2. 250
= 0 V
GS
s Pulse Test
µ
-VSD , Source-Drain Voltage [V]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
15
VDS = -30 V
10
VDS = -75 V
VDS = -120 V
5
, Gate-Source Voltage [V]
GS
-V
0
0 20406080100
@ Notes : ID = -18 A
QG , Total Gate Charge [nC]
3
Page 4
SFH9154
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2
2.0
POWER MOSFET
P-CHANNEL
1.1
1.0
, (Normalized)
DSS
0.9
-BV
Drain-Source Breakdown Voltage
0.8
-75 -50 -25 0 25 50 75 100 125 150 175
@ Notes :
1. V
2. I
TJ , Junction Temperature [oC]
3
10
Operation in This Area
2
is Limited by R
10
1
10
DC
DS(on)
10 ms
1 ms
0.1 ms
@ Notes :
= 25 oC
1. T
, Drain Current [A ]
0
D
10
-I
-1
10
0
10
C
2. T
= 150 oC
J
3. Single Pulse
1
10
10
-VDS , Drain-Source Voltage [V]
GS
D
2
= 0 V
= 250 µA
1.6
1.2
, (Normalized)
DS(on)
R
0.8
Drain-Source On-Resistance
-75 -50 -25 0 25 50 75 100 125 150 175
@ Notes :
1. Vgs = -10V
2. Id = -9A
TJ , Junction Temperature [oC]
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
20
15
10
5
, Drain Current [A]
D
-I
0
25 50 75 100 125 150
Tc , Case Temperature [oC]
(t) , Thermal Response
Z
Fig 11. Thermal Response
0
10
D=0.5
0.2
-1
10
0.1
0.05
0.02
0.01
JC
-2
θ
10
-5
10
single pulse
-4
10
-3
10
@ Notes :
1. Z
2. Duty Factor, D = t1/t
3. TJM-TC = PDM*Z
(t) = 0.61 oC/W Max.
JC
θ
P
DM
-2
10
(t)
JC
θ
t
1
t
2
-1
10
2
0
10
1
10
t1 , Square Wave Pulse Duration [sec]
4
Page 5
P-CHANNEL
POWER MOSFET
SFH9154
Fig 12. Gate Charge Test Circuit & Waveform
12V
-10V
* Current Regulator
200nF
-3mA
V
R
G
”
50KΩ
300nF
V
GS
R
1
Current Sampling (IG)
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
V
out
in
DUT
Same Type
as DUT
DUT
R
2
Current Sampling (ID)
Resistor
R
L
V
DD
( 0.5 rated V
V
GS
Q
-10V
V
DS
Q
gs
g
Q
gd
Charge
t
on
t
d(on)tr
)
DS
V
in
10%
90%
V
out
t
d(off)
t
off
t
f
Vary tpto obtain
required peak I
-10V
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BV
L
V
DS
D
R
G
L
I
D
V
DD
C
V
DD
E
=LL I
AS
----
1
2
2
AS
t
p
I
(t)
D
DSS
-------------------BV
DSS
-- V
DD
Time
V
(t)
DS
DUT
I
AS
t
p
BV
DSS
5
Page 6
SFH9154
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
V
DS
DUT
--
I
S
L
P-CHANNEL
POWER MOSFET
V
GS
( Driver )
I
S
( DUT )
V
DS
( DUT )
V
GS
V
GS
Driver
R
G
D =
IFM, Body Diode Forward Current
Comp limen t of DUT
Gate Pulse Width
-------------------------Gate Pulse Period
Body Diode
Forward Voltage Drop
(N-Channel)
• dv/dt controlled by 밨
•IScontrolled by Duty Factor “D”
Body Diode Reverse Current
I
V
f
G
RM
di/dt
V
V
DD
10V
DD
Body Diode Recovery dv/dt
6
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