The SCL5616HW is a 2-function digital automotive clock circuit.
Fabricated on a single monolithic chip using silicon-gate CMOS PROM
technology, it offers low cost, low power, and high reliability. It also
f2
a2
g2
b1
PM
AM
BACKPLANE
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includes digital frequency correction, stored in the internal nonvolatile
memory, for easy adjustment of the oscillator nominal frequency.
Data Sheet
26110
b2
COLON
g3
ad3
b3
g4
a4
S2
SELECT
GROUND
c1
e2
d2
f3
2040 x 3040 µm
0.080 x 0.120 in
f4
DD
V
IGNITION
NU
PP
NU
V
GROUND
Dwg. No. PC-001
c2
e3
c3
e4
d4
c4
b4
S1
DATA
{
OSC.
The SCL5616HW is supplied in wafer form and is rated for
continuous operation over the automotive temperature range of
-40°C to +85°C.
FEATURES
■ Digital Tuning of Crystal Frequency
■ PROM for Storing Frequency Correction Information
■ 12 or 24 Hour Timekeeping Option
■ Flashing Colon
■ Two Switches Control All Setting Functions
■ High Noise Immunity
■ Internal Power-Up Reset Circuitry
■ Internal Voltage Regulation
ABSOLUTE MAXIMUM RATINGS
Supply Current, IDD.......................... 2.0 mA
Input Voltage Range, V
(except VPP)......................-0.3 V to V
(Programming
Power Voltage, V
Input Current (except V
DISCONTINUED PRODUCT
Power Dissipation, PD................... 300 mW
Operating Temperature Range,
.................................. -40°C to +85°C
T
A
Storage Temperature Range,
T
S
— FOR REFERENCE ONLY
................................-65°C to +150°C
IN
) .................. 18.5 V
PP
), IIN......... ±10 mA
PP
DD
Caution: These CMOS devices have static protection, but are susceptible to damage if exposed
to extremely high static electrical charges.
NOTE: Negative current is defined as coming out of (sourcing) the specified device terminal.
DISPLAY FORMAT
a1a2a3a4
AM
PM
g1g2g3g4
c1c3c2c4e1e3e2e4
d1d2d3d4
f2f4f3
b2b4b1b3
COLON
Dwg. No. OC-001
5616
2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK
FUNCTIONAL DESCRIPTION
DATA Logic Levels are VDD and Ground
Power-Up Reset. When power up occurs, the hours and minutes
counters are reset, and the clock starts running:
Operation
12-Hour mode and counting starts from 1:00 AM
Programming Modes. Data is loaded by pulling DATA low (1 µs pulse
duration) n times to set the desired bits for frequency correction into
the data input register. This information is latched in the RAM, thus
allowing the testing of the oscillator frequency adjustment without
storing the selected pattern in the PROM cells. The data latched in the
RAM is stored in the PROM cells when DATA is held low for a minimum of 10 ms.
The data stored in the data input register is cleared on any SELECT
transition (low to high or high to low). It is also cleared when the
program power voltage (VPP) is reduced from 18 V to VDD. Clearing the
data input register does not affect the data latched in the RAM.
ProgramDATASELECT
V
PP
V
D
V
S
Operation
18 VPulseGroundDATA load for frequency correction
18 VGround V
Frequency Correction. The on-chip oscillator circuit increases the
crystal frequency approximately 40 ppm. This ensures that the typical
crystal will operate within the tuning range. With VS at ground, data
pulses are then used to trim the internal clock frequency by 2 to 254
ppm to the required value. The quantity of data pulses needed (1 to
127) is
n = f
128 x 10
where fBP is the measured frequency at BACKPLANE. Prior to trimming, it must be between 64.000 128 Hz and 64.016 256 Hz.
Operating Modes. The operating modes of the clock are controlled
by the voltages applied to VPP, SELECT, IGNITION, and switches S1
and S2.
ProgramSELECT
V
PP
V
DD
V
DD
18 VGroundOpenOpenXProgramming
V
S
V
DD
V
DD
- 64
BP
-6
S1S2IGNITIONMode
Open OpenXClock running
GroundGround12 VDiagnostic
X = Irrelevant, ground or 12 V
Clock Running Mode. During the clock running mode, setting
functions are achieved by either momentary or continuous operation
of switches S1 and S2, which are enabled by IGNITION. Hours or
minutes are incremented on S1 or S2 (respectively) depression and
continue at a 1 Hz rate while the switch is depressed.
X = Irrelevant, ground or 12 V for IGNITION, ground or open for S1 and S2
Diagnostic Mode. To enter the diagnostic mode, S1 and S2 are operated with IGNITION connected to 12 V. All segments are displayed for
as long as S1 and S2 are depressed. On opening S1 and S2, the clock
will leave the diagnostic mode and go through a power-up sequence.
In the SCL5616HW, the counting sequence will change (from 12 hour
to 24 hour or from 24 hour to 12 hour). To inhibit the power-up reset,
hold the DATA input low (ground). The counting mode will change
without resetting the hours or minutes counters.
5616
2-FUNCTION, 4-DIGIT LCD AUTOMOTIVE CLOCK
Stored Data Verification. In the verify mode, the complement value
of the information stored in the PROM cells is brought out directly to
the segment output terminals for easy verification of the stored data.
If a bit is programmed (high), the appropriate segment output is turned
ON (low). The segments represent the binary equivalent of the
number of frequency correction data pulses entered.
Frequency Selection Pulses6432168421
Segmentb4c4d4e4c3e3c2
RECOMMENDED FLASH
PROGRAMMING CHARACTERISTICS
at T
= +25°C, Logic Levels are V
A
CharacteristicSymbolMin.Max. Units
(except PROGRAM High)
and Ground
DD
PROGRAM High (18 V) to DATA Lowt
SELECT Valid to DATA Lowt
DATA Low to DATA Hight
DATA High to DATA Low
DATA Store Pulse Durationt
DATA High to PROGRAM Lowt
PROGRAM Low to SELECT Changet
SELECT Low (Verify) to DATA Validt
DATA Hold from End of Verifyt
PHDL
SVDL
DLH
t
DHL
wD
DHPL
PLSX
SLDV
SHDX
1.0—µs
25—µs
1.01.5µs
1.0—µs
10—ms
1.0—µs
1.0—µs
—1.0µs
—10ns
Allegro MicroSystems, Inc. reserves the right to
make, from time to time, such departures from the detail
specifications as may be required to permit improvements in the design of its products.
The information included herein is believed to be
accurate and reliable. However, Allegro MicroSystems,
Inc. assumes no responsibility for its use; nor for any
infringements of patents or other rights of third parties
which may result from its use.