Datasheet SC9200A, SC9200B Datasheet (SILAN)

Silan
Semiconductors

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DTMF GENERATORS

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SC9200A/B

DESCRIPTION

The SC9200A/B tone generators are designed for µC interfaces.
They can be instructed by a µC to generate 16 dual tones and 8
single tones from the DTMF pin. The SC9200A provides a serial
mode whereas the SC9200B contains a selectable serial/parallel
mode interface for various applications such as security systems,
home automation, remote control through telephone lines
communication system, etc.

FEATURES

* Operating voltage: 2.0V~5.5V
* Serial mode for the SC9200A
* Serial/parallel mode for the SC9200B
* Low standby current
* Low total harmonic distortion
* 3.58MHz crystal or ceramic resonator

SELECTION TABLE

Function

Part No.

SC9200A 2V-5.5V 3.58MHz Serial 8 DIP/SOP
SC9200B 2V-5.5V 3.58MHz Serial/Parallel 14 DIP/SOP

Operating Voltage OSC Frequency Interface Package

PIN CONFIGURATIONS

DIP-8

14
13
12
11
10

V

DD

DTMF
DATA
CLKV
S/P

9

D3
D2

CE

X2
X1

CE

1

X2

1

SC9200A

2
3
4

SS

V

5

DD

6

DTMF

7

DATA

8

CLKV

2

X1

3

SS

4

NC

5
6

D0
D1

7 8

SC9200B

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BLOCK DIAGRAM

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SC9200A/B

X1

X2

DATA

CLK

3.58MHz

Crystal/Resonator

Oscillator

SerialData

Input Circuit

ABSOLUTE MAXIMUM RATINGS

Characteristic Symbol Value Unit

Supply Voltage V
Input Voltage V
Storage Temperature T
Operating Temperature T

SS

IN
STG
OPR

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Control

Circuit

CE

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2

DTMF

Generator

ParallelData

Input Circuit

D3 D2 D1 D0

-0.3~6 V

VSS-0.3~VDD+0.3 V

-50~125

-20~75

DTMF

Rev: 1.0 2001.02.02

°C
°C

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ELECTRICAL CHARACTERISTICS

Parameter Symbol

Operating Voltage V

Operating Current I

Low Input Voltage V
High Input Voltage V

Standby Current I

Pull-high Resistance R

DTMF Output Delay Time
(Parallel Mode)
DTMF Output DC Level V
DTMF Sink Current I
DTMF Output AC Level V
Column Pre-emphasis A
DTMF Output Load R
Tone Signal Distortion t
Clock Input Rate (Serial Mode) f

Oscillator Starting Time

CE

is low)

(When

System Frequency f

DD

DD

IL
IH

STB

t

DE

TDC

TOL

TAC

CR

HD

CLK

t

UP

OSC

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V

2.5V

5.0V

2.5V -- -- 1

5.0V

P

L

2.5V 120 180 270

5.0V

2V~5.5V DTMF Output 0.45V

2.5V V

2.5V

2.5V Row group=0dB 1 2 3 dB

2.5V

2.5V

5.0V

SC9200A/B

Test Conditions

Conditions

DD

--

-- -- V

-- -- 0.8V

5V -- -- tUP+6 tUP+8 ms

-- -- -- 100 500 kHz

-- Crystal=3.5795MHz 3.5759 3.5759 3.5831 MHz

Serial 1.8

Parallel 2.0

=V

,

DD

/PS

D0~D3=V

CE

/PS

No load

V

OL

DTMF

Row group, R

≤-23dB

t

HD

=5kΩ

R

L

Thetimefrom
falling edge to normal

oscillator operation

,

SS

=V

, No load

SS

,CE=VDD,

=0V

=0.5V -0.1 -- -- mA

=5kΩ

L

CE

Min Typ Max Unit

-- 5.5 V

-- 240 2500

-- 950 3000

DD

DD

-- 0.2V

-- V

-- 0.75V

SS

-- -- 2

45 68 100

0.12 0.15 0.18 Vrms

5----

-- -30 -23 dB

-- -- 10 ms

µA

DD

DD

µA

k

DD

kΩ

V
V

Ω

V

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PIN DESCRIPTIONS

Pin

NO.

6~9

10

11 CLK I

12 DATA I

13 DTMF O CMOS OUT Output terminal of the DTMF signal
14 V

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Pin

CE

I/O

I CMOS IN Pull-high Chip enable, active low

Oscillator

CMOS IN Pull-high

3

/PS

DD

I

or floating

ICMOSIN

CMOS IN Pull-high
or floating

CMOS IN Pull-high
or floating

-- -- Positive power supply, 2.0V~5.5V for normal operation

Name

1
2X2O

3X1I

4VSS-- -- Negative power supply.
5 NC -- -- No connection.

D0~D

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Internal

Connection

Description

The system oscillator consists of an inverter, a bias resistor,
and the required load capacitor on chip. The oscillator function
can be implemented by Connect a standard 3.579545MHz
crystal to the X1 and X2 terminals.

Data inputs for the parallel mode.
When the IC is operating in the serial mode, the data input
terminals (D0~D3) are included with a pull-high resistor. When
the IC is operating in the parallel mode, these pins become
floating.
Operation mode selection input

=”H”: Parallel mode

/PS

=”L”: Serial mode

/PS

Data synchronous clock input for the serial mode. When the IC
is operating in the parallel mode, the input terminal (CLK) is
included with a pull-high resistor. When the IC is operating in
the serial mode, this pin becomes floating.
Data input terminal for the serial mode. When the IC is
operating in the parallel mode, the input terminal (DATA) is
included with a pull-high resistor. When the IC is operating in
the serial mode, this pin becomes floating.

SC9200A/B

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FUNCTIONAL DESCRIPTION

The SC9200A/B are DTMF generators for µC interfaces. They are controlled by a µC in the serial mode.

1. Serial mode (SC9200A/B)

The SC9200A/B employ a data input, a 5-bit code, and a synchronous clock to transmit a DTMF signal. Every
digital of a phone number to be transmitted is selected by a series of inputs that consist of 5-bit data. Of the 5 bits,
the D0 (LSB) is the first received bit. The SC9200A/B will latch data on the falling edge of the clock (CLK pin).
The relationship between the digital codes and the tone output frequency is shown in Table 1 as for the control
timing diagram, refer to Figure 1.

Table 1: Digits vs. input data vs. tone output frequency (serial mode)

Digit D4 D3 D2 D1 D0 Tone Output Frequency (Hz)

1 0 0 0 0 1 697+1209
2 0 0 0 1 0 697+1336
3 0 0 0 1 1 697+1477
4 0 0 1 0 0 770+1209
5 0 0 1 0 1 770+1336
6 0 0 1 1 0 770+1477
7 0 0 1 1 1 852+1209
8 0 1 0 0 0 852+1336
9 0 1 0 0 1 852+1477
0 0 1 0 1 0 941+1336
* 0 1 0 1 1 941+1209
# 0 1 1 0 0 941+1477
A 0 1 1 0 1 697+1633
B 0 1 1 1 0 770+1633
C 0 1 1 1 1 852+1633
D 0 0 0 0 0 941+1633

-- 10000 697

-- 10001 770

-- 10010 852

-- 10011 941

-- 1 0 1 0 0 1209

-- 1 0 1 0 1 1336

-- 1 0 1 1 0 1477

-- 1 0 1 1 1 1633

DTMFOFF11111 --

*Notes: The codes not listed in Table 1 are not used D4 is MSB.

SC9200A/B

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(Oscillator)

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S/P

X2

t

UP

CE

CLK

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SC9200A/B

LSB

DATA

Digit 1 Digit 2 Stop code

DTMF

2. Parallel mode (SC9200B)

The SC9200B provides four data inputs D0~D3 to generate their corresponding DTMF signals. The
to be connected high to select the parallel operation mode. Then the input data codes should be determined.
Finally, the

The TDE time (about 6ms) will be delayed from the

The relationship between the digital codes and the tone output frequency is illustrated in Table 2. As for the
control timing diagram, see figure 2.

When the system is operating in the parallel mode, D0~D3 are all in the floating state. Thus, these data input
pins should not float.

is connected low to transmit the DTMF signal from the DTMF pin.

CE

MSB LSB MSB MSBLSB

Digit 1

DTMF signal

Figure 1

CE

falling edge to the DTMF signal output.

Digit2

DTMF signal

1 1 1 1 1

has

/PS

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Table 2: Digits vs. input data vs. tone output frequency (parallel mode)

Digit D3 D2 D1 D0 Tone Output Frequency

10001 697+1209
20010 697+1336
30011 697+1477
40100 770+1209
50101 770+1336
60110 770+1477
70111 852+1209
81000 852+1336
91001 852+1477
01010 941+1336
*1011 941+1209
#1100 941+1477
A1101 697+1633
B1110 770+1633
C1111 852+1633
D0000 941+1633

SC9200A/B

S/P

X2

(Oscillator)

CE

D0~D3

DTMF

t

DE

*Note: The data (D0~D3) should be ready before the CE becomes low.

Figure 2

t

DE

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Tone frequency

Output Frequency (Hz)

Specified Actual

697 699 +0.29%
770 766 -0.52%
852 847 -0.59%

941 948 +0.74%
1209 1215 +0.50%
1336 1332 -0.30%
1477 1472 -0.34%

% Error does not contain the crystal frequency drift

APPLICATION CIRCUIT

Serial mode

DD

V



V

DD

CLK

DATA

SS

V

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C

3.579545MHz

20pF20pF

1
2
3
4

CECE

X2
X1
V

SS

SC9200

SC9200A/B

%Error

V

DD

5

DD

V
DTMF
DATA

CLK

Tone

6

output

7
8

Serial/parallel mode

V

V
DTMF
DATA

CLK

S/P

DD

14

DD

Tone

13

output

12
11
10

9

D3
D2

8

DD

V

V

DD

D0
D1
D2
D3

S/P

CLK

V

DATA

SS



C

3.579545MHz

1

CECE

2

X2

3

20pF20pF

X1

4

V

SS

5

NC

6

D0

7D1

SC9200A/B

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PACKAGE OUTLINE

DIP-8-300-2.54 UNIT: mm

2.54

SC9200A/B

0.25

6.40

1.25

9.20

3.40

0.46

7.62

15 degree

5.083.30

DIP-14-300-2.54 UNIT:mm

2.54

0.25

6.40

1.50

19.4

7.62

15 degree

3.51

0.46

5.083.30

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