Data Sheet
SC-601
© 2002 Sensory Inc.
P/N 80-0207-A
5
DC Electrical Characteristics, TA = 0 to 70°C
PARAMETER TEST CONDITIONS MIN TYP§MAX UNIT
Positive going threshold 2.4
Negative going threshold 1.8
VDD = 3 V
Hysteresis 0.6
V
Positive going threshold 3.3
Negative going threshold 2.9
RESET_ Threshold changes
V
DD
= 5.2 V
Hysteresis 0.4
V
VDD = 3 V 2 3
VDD = 4.5 V 3 4.5
VIH High-level input voltage
V
DD
= 5.2 V 3.5 5.2
V
VDD = 3 V 0 1
VDD = 4.5 V 0 1.5
VIL Low-level input voltage
V
DD
= 5.2 V 0 1.7
V
I
OH
¶
High-level output current per pin of I/O port VOH = 4 V –2 mA
I
OL
¶
Low-level output current per pin of I/O port VOL = 0.5 V 5 mA
I
OH (DAC)
High-level output DAC current VOH = 4 V –10 mA
I
OL (DAC)
Low-level output DAC current
V
DD
= 4.5 V
V
OL
= 0.5 V 20 mA
I
lkg
Input leakage current Excludes OSCIN 1
µA
I
(STANDBY)
Standby current RESET is low 0.05 10
µA
I
DD
†
Operating current VDD = 4.5 V, F
CLOCK
= 12.32 MHz 15 mA
I
(SLEEP-deep)
V
DD
= 4.5 V, DAC off, ARM set, OSC disabled 0.05 10
I
(SLEEP-mid)
V
DD
= 4.5 V, DAC off, ARM set, OSC enabled 40 60
I
(SLEEP-light)
Supply current
VDD = 4.5 V, DAC off, ARM clear, OSC enabled 60 100
µA
VIO Input offset voltage VDD = 4.5 V, V
ref
= 1 to 4.25 V 25 50 mV
R
(PULLUP)
F port pullup resistance VDD = 5 V 70 150
KΩ
∆f
(RTO-trim)
Trim deviation
R
RTO
= 470 KΩ, VDD = 4.5 V, TA = 25°C,
f
RTO
= 8.192 MHz (PLL setting = 7 Ch)‡
±1% ±3%
∆f
(RTO-volt)
Voltage deviation
R
RTO
= 470 KΩ, VDD = 3.5 to 5.2 V, TA = 25°C,
f
RTO
= 8.192 MHz (PLL setting = 7 Ch)‡
±1.5%
∆f
(RTO-temp)
Temperature deviation
R
RTO
= 470 KΩ, VDD = 4.5 V, TA = 0 to 70°C,
f
RTO
= 8.192 MHz (PLL setting = 7 Ch)‡
±0.03 %/°C
∆f
(RTO-res)
Resistance deviation
V
DD
= 4.5 V, TA = 25°C, R
(OSC)
= 470 KΩ at ±1%,
f
RTO
= 8.192 MHz (PLL setting = 7 Ch)‡
±1%
† Operating current assumes all inputs are tied to either VSS or VDD with no input currents due to programmed pullup resistors. The DAC
output and other outputs are open circuited.
‡ The best trim value is selected at nominal temperature and voltage but the deviation due to the trim error is ignored.
§ Typical voltage and current measurement taken at 25°C
¶ Cannot exceed 15 mA total per internal V
DD
pin. Port A, B share 1 internal VDD pin; Port C, D share 1 internal V
DD
External Component Absolute Values
PARAMETER TEST CONDITIONS MIN MAX UNIT
R
(RTO)
RTO external resistance TA = 25°C, 1% tolerance 470
KΩ
C
(PLL)
PLL external capacitance TA = 25°C, 10% tolerance 3300 pF