The SC1537 is designed to m aintain a glitch-free 3.3V
output when at least one of two inputs, 5V (VIN) and
3.3V (VAUX), is present.
Whenever VIN exceeds a predetermined threshold
value, the internal 3.3V linear regulator is enabled, and
DR is pulled high.
When VIN falls below a lower threshold value, DR is
pulled low and the internal linear regulator is tur ned of f .
DR has been designed to drive the gate of an external
low threshold P-channel MOSFET, which can be used
to connect the 3.3V supply directly to the regulator
output. This ensures an uninterrupted 3.3V output even
if VIN falls out of s pecification. A maximum R
100mΩ is recommended.
When both supplies are simultaneously available, the
drive pin (DR) will be pulled High, turning off the exter nal PMOS switch.
The internal 5V detector has its upper threshold (for
VIN rising) set to 4.22V (typical) while the lower threshold (for VIN falling) is at 4.05V (typical) giving a hysteresis of approximately 170mV.
The SC1537 is available in the popular SO-8 and
5-lead TO-263 surface mount packages.
DS(ON)
Q1
of
FEATURES
•= Glitch-free transition between input sources
•= Internal logic selects input source
•= Gate drive for external PMOS bypass switch
•= 5V detector with hysteresis
•= 1% regulated output voltage accuracy
•= 700mA load current capability
•= SO-8 and TO-263 packages
APPLICATIONS
•= Desktop Computers
•= Network Interface Cards (NICs)
•= PCMCIA/PCI Interface Cards
•= Cardbus
TM
Technology
•= Power supplies with multiple input sources
ORDERING INFORMATION
Part Number
SC1537CSTRSO-8
SC1537CMTRTO-263-5L
Note:
(1) Only available in tape and reel packaging. A reel contains 2500 devices for SO-8 and 800 devices for TO-263.
(1)
Package
APPLICATION CIRCUIT
C5
0.1uF
C5
0.1uF
3.3V OUT
3.3V
5V
C3
C2
C1
0.1uF
5V
3.3V3.3V OUT
C1
0.1uF
10uF
C2
10uF
0.1uF
C3
0.1uF
U1 SC1537CS
1
VAUX
GND
2
VIN
GND
3
VO
GND
45
DR GND
U1SC1537CM
2
TAB
VIN
1
VAUX
GND
3
8
7
6
C4
10uF
Q1
5
DR
4
VO
C4
10uF
NOTE:
(1) External switch (Q1): use a low threshold P-channel MOSFET such as Vishay Si2305DS (R
Input Supply VoltageVIN-0.5 to +7V
Auxiliary Supply VoltageVAUX-0.5 to +7V
LDO Output CurrentI
Operating Ambient Temperature RangeT
Operating Junction Temperature RangeT
Storage Temperature RangeT
Lead Temperature (Soldering) 10 SecT
Thermal Impedance Junction to Ambient
(1)
SO-8
TO-263
O
STG
LEAD
θ
JA
A
J
10 to 700mA
0 to +70°C
0 to +125°C
-65 to +150°C
300°C
65
°C/W
60
Thermal Impedance
Junction to Case
SO-8
TO-263
θ
J C
39
3
°C/W
ESD Rating (Human Body Model)ESD2kV
Note:
(1) 1 inch square of 1/16” FR-4, double sided, 1 oz. minimum copper weight.
ELECTRICAL CHARACTERISTICS
Unless specified, TA = 25°C, VIN = 5V, VAUX = 3.3V, IO = 700mA, CO = 10µF. Values in bold apply over full operating temperature range.
4.75V ≤ VIN ≤ 5.25V, 0mA ≤ I
Output CurrentI
Line RegulationREG
Load RegulationREG
O
(LINE)
(LOAD)
VIN = 4.75V to 5.25V0.200.60%
IO = 10mA to 700mA0.61.0%
-
100.0
3.904.20
90170mV
80
4.35
= 20mA3.2673.3003.333V
O
≤ 700mA
O
3.2343.366
400
0.80
1.2
V
mA
Drive Output
Drive VoltageV
Peak Drive CurrentI
Drive High Delay
Drive Low Delay
(1)(4)
(1)(4)
DR
DR(PK)
t
DH
t
DL
4.75V ≤ VIN ≤ 5.25V, IDR = 200µA
VIN < V
, IDR = -200µA35150mV
TH(LO)
Sinking: VIN = 3.9V, VDR = 1V;7mA
Sourcing: VIN = 4.35V, VIN - V
= 2.5V
DR
CDR = 1.2nF, VIN ramping up, measured0.51.0µs
from VIN = V
to VDR = 2V
TH(HI)
CDR = 1.2nF, VIN ramping down,
measured
from VIN = V
to VDR = 2V
TH(LO)
NOTES:
(1) Guaranteed by design.
(2) See 5V Detect Thresholds on page 5.
(3) Recommended source impedance for 5V supply: ≤ 0.07Ω. This will ensure that I
avoiding DR toggling during 5V detect threshold transitions.
(4) See Timing Diagram on page 5.