The SC1534 is designed to maintain a glitch-free 3.3V
output when at least one of two inputs, 5V (VIN) and
3.3V (VAUX), is present.
Whenever VIN exceeds a predetermined threshold
value, the internal 3.3V linear regulator is enabled, and
DR is pulled high.
When VIN falls below a lower threshold value, DR is
pulled low and the internal linear regulator is turned off.
DR has been designed to drive the gate of an external
low threshold P-channel MOSFET, which can be used
to connect the 3.3V supply directly to the regulator output. This ensures an uninterrupted 3.3V output even if
VIN falls out of specification. A maximum R
DS(ON)
of
200mΩ is recommended.
When both supplies are simultaneously available, the
drive pin (DR) will be pulled High, turning off the external PMOS switch.
The internal 5V detector has its upper threshold (for
VIN rising) set to 4.22V (typical) while the lower threshold (for VIN falling) is at 4.05V (typical) giving a hysteresis of approximately 170mV.
The SC1534 is available in the popular SO-8 and 5lead TO-263 surface mount packages.
BLOCK DIAGRAM
FEATURES
•= Glitch-free transition between input sources
•= Internal logic selects input source
•= Gate drive for external PMOS bypass switch
•= 5V detector with hysteresis
•= 1% regulated output voltage accuracy
•= 400mA load current capability
•= SO-8 and TO-263 packages
APPLICATIONS
•= Desktop Computers
•= Network Interface Cards (NICs)
•= PCMCIA/PCI Interface Cards
•= Cardbus
TM
Technology
•= Power supplies with multiple input sources
ORDERING INFORMATION
Part Number
SC1534CM.TRTO-263-5L
SC1534CS.TRSO-8
Note:
(1) Only available in tape and reel packaging.
(1)
Package
ABSOLUTE MAXIMUM RATINGS
ParameterSymbolMaximum Units
Input Supply VoltageVIN-0.5 to +7V
Auxiliary Supply VoltageVAUX-0.5 to +7V
LDO Output CurrentI
Operating Ambient
Temperature Range
O
T
10 to 400mA
A
-5 to +70°C
Operating Junction
T
-5 to +125°C
J
Temperature Range
Storage Temperature
T
-65 to +150°C
STG
Range
Lead Temperature
T
LEAD
300°C
(Soldering) 10 Sec
Thermal Impedance
PIN CONFIGURATION
Top View
Junction to Ambient
(1)
SO-8
TO-263
θ
JA
65
°C/W
60
Thermal Impedance
SO-8
TO-263-5L
Junction to Case
SO-8
TO-263
ESD RatingESD2kV
Note:
(1) 1 inch square of 1/16” FR-4, double sided, 1 oz. minimum copper weight.
DR45Driver output for external P-channel MOSFET pass element.
GND5,6,7,83/TABLogic and power ground.
VAUX11This is the auxiliary input supply, nominally 3.3V.
VIN22This is the main input supply for the IC, nominally 5V.
VO34LDO 3.3V output.
APPLICATION CIRCUIT
Q1
SC1534
3.3VAUX
5V
5V
3.3VAUX
C1
0.1uF
C1
0.1uF
C2
4.7uF
C2
4.7uF
C3
0.1uF
C3
0.1uF
C5
0.1uF
3.3V OUT
C5
0.1uF
3.3V OUT
U1 SC1534CS
1
VAUX
2
3
45
U1SC1534CM
2
VIN
1
VAUX
GND
VIN
GND
VO
GND
DRGND
TAB
DR
VO
GND
3
8
7
6
C4
10uF
Q1
5
4
C4
10uF
NOTE:
(1) External switch (Q1): use a low threshold P-channel MOSFET such as Fairchild FDN338P or International
Rectifier IRF7604, or equivalent. (PMOS, typical gate threshold voltage ~
Unless specified, TA = 25°C, VIN = 5V, VAUX = 3.3V, IO = 400mA, CO = 10µF. Values in bold apply over full operating temperature range.
ParameterSymbolTest ConditionsMINTYPMAX Units
Drive Output
Drive VoltageV
Peak Drive CurrentI
Drive High Delay
Drive Low Delay
(1)(4)
(1)(4)
DR
DR(PK)
t
DH
t
DL
4.35V ≤ VIN ≤ 5.5V, IDR = 200µA
VIN < V
, IDR = -200µA35150mV
TH(LO)
Sinking: VIN = 3.9V, VDR = 1V;7mA
Sourcing: VIN = 4.35V, VIN - V
= 2.5V
DR
CDR = 1.2nF, VIN ramping up, measured0.51.0µs
from VIN = V
to VDR = 2V
TH(HI)
CDR = 1.2nF, VIN ramping down, measured0.51.0µs
from VIN = V
to VDR = 2V
TH(LO)
NOTES:
(1) Guaranteed by design.
(2) See 5V Detect Thresholds on page 5.
(3) Recommended source impedance for 5V supply: ≤ 0.125Ω. This will ensure that I
avoiding DR toggling during 5V detect threshold transitions.
(4) See Timing Diagram on page 5.