The SC143 7 is a battery over voltage detection cir cuit with driver
for external MOSFET . The trip point is adjustable with an e xternal
resistor divider connected to the SENSE pin. The trip point is
preset to a nominal trip voltage of 4.2V if no external divider is
used. Other internal trip voltages of 4.5V and 4.7V are available,
specified by different part numbers. An internal delay, with two
selectable times or bypass, is on-board to suppress accidental
over voltage conditions due to glitches on the battery supply voltage, V+. The delay is externally adjustable by pulling the SEL pin
high, low, or left floating. During an actual over voltage condition,
the internal driver will pull the over voltage pin (OV) down to the
voltage present at the V- pin. This insures the external N-Channel
MOSFET will be completely off during an over voltage condition.
Supply current during the monitoring mode of operation is approximately 10µA. If an over voltage condition is detected, supply
currents increase when the timer is started. A voltage comparator
will engage at voltages greater than 6.8V, which bypasses the
timer and open circuits the battery by turning off the external
MOSFET. This im portant function protects the battery during the
timer delay in the event of a charger failure. There are three
functional options available. With the B option the OV pin is active
low. With the L option the OV pin is active high. With the H option
the OV pin is open drain, active high. All options are available in a
5 lead SOT-23 package.
SC1437
Precision Voltage Detector With
Features
! Low quiescent current, less than 10µA typical
! Input voltage range 1.8V to 6.8V
! Adjustable or preset voltage trip point
! Selectable timer delays of 0, 40 and 80ms without use of
external resistor
! SOT-23 5 lead package
! Accuracy is 2% over specified temperature range
! 30V maximum rating
Applications
! Battery packs
! Portable electronics
! Lithium Ion protection circuits
! Programmable Fuse
! Power Monitoring
! CPU Reset Circuits
* Based on version selected 4.2V , 4.5V , 4.7V
t B option: Output active low
L option: Output active high
H option: Output active high, open drain
V+
DELAY
TIMER
SEL V-
MUX
DRIVER
4.2V*
V+
OV
t
4 2000 Semtech Corp.
www.semtech.com
Page 5
POWER MANAGEMENT
Applications Information
The SC143 7 can be used as a battery over voltage det ection
circuit with driver for an e xternal MOSFET . In this configuration
the SC143 7 is capable of protecting the batt ery if the charger
circuit fails. Because of its low cost, the SC14 3 7 is an excellent
choice in cases when primary discharge protection is not
required. The part is an excellent choice for secondary over
voltage protection where the battery has primary fault and
discharge protection, but could benefit by adding another line of
defense against charger failure.
The SC143 7 comes in three voltage trip options and three
function options. The voltage options are 4.2V , 4.5V or 4.7V. In
addition, the trip voltage levels can be adjusted with an
external resistive divider .
The SC143 7 also has three separate functional options that
affect the OV pin action:
With the B option, the OV pin is active low and is used to drive
an N-Channel MOSFET.
With the H option, the OV pin is active high with open drain to
drive a P-Channel MOSFET.
Finally, the L option is active high and it's output is 5V logic high
for specific use as a voltage detector flag.
SC1437
allows the trip delay to be set to 0S, 40mS or 80mS by application of a jumper JP2, JP3 or leaving the jumper off, respectively .
Configuration of timing delays are shown in T able 1. Once the
trip delay is set to the required value the SC1 43 7 will monit or
the charger voltage. If the charger voltage equals or exceeds
5.5V the OV pin will transition from high to low (Version B)
turning Q1 off, thereby breaking the circuit and protecting the
battery from overvoltage.
Figure 3 shows the trip delay of 80mS, while Figure 4 shows the
trip delay set to 40mS and Figure 5 shows no delay set.
VTRIP
C2
0.1uF
R4
100
FIGURE 1
U1
1
SEL
V+
2
V-
3
OV
SENSE
SC1437
R3
R1
100
5
4
C1
R2
0.1uF
VSENSE+
VSENSE-
Any part can be configured as a voltage detector as shown in
Figure 1. A programmable trip delay can be set as indicated by
Table 1. In Figure 1, the trip v oltage is set externally b y R1 & R2.
while the trip delay is set to 0 seconds plus any propagation
delay of the SC14 37 t o allow the MOSFET to turn off, specified
by parameter toff.
TT
ABLE 1ABLE 1
T
ABLE 1
TT
ABLE 1ABLE 1
NOITCENNOCLESYALED
+VYALEDON
-VSm04
NEPOSm08
CHARCHAR
CHAR
CHARCHAR
GER OGER O
GER O
GER OGER O
VERVER
VER
VERVER
VV
OLOL
TT
AA
OL
OLOL
GE PRGE PR
T
A
GE PR
TT
AA
GE PRGE PR
V
VV
OO
TECTIONTECTION
O
TECTION
OO
TECTIONTECTION
The SC143 7 configuration for secondary overvoltage protection
is shown in Figure 2. This is the Evaluation Board schematic.
The Evaluation Board is set up to work with either internal trip
voltage or external trip voltage via R1 and R2. It also can set the
trip delay to all three values through jumper selection of JP2
and JP3.
With CHARGER+ and CHARGER- input applied, the charger
voltage will be filtered by R3 and C1. The filtered voltage will
then be sensed by the V+ input. In this case the trip voltage can
be set to a value other than the internal setting of 4.2V . This is
done by using the on-board external resistor divider and
removing JP1 shunt jumper that will allow the resistors R1 and
R2 to program a trip voltage of 5.75V . The Evaluation Boar d also
VOLTAGE DETECTOR: TRIP DELAY = 0
VTRIP = 2.1(1+R2/R1)
0.476 < (R2/R1) < 2
When using the program resistors R1 & R2, Figure 2, to set an
alternate trip voltage, be sure these resistors are placed across
the battery on the drain side of the MOSFET. This will eliminat e
any voltage drop errors caused by the MOSFET on resistance.
Figure 6 and Figure 7 shows the normalized trip voltage
variation with respect to temperature. Note that in all cases the
trip voltage remains within its 2% specified range. This is true for
both the internal trip voltage and externally set trip voltage,
however when using an e xternal resistor divider , the tolerance
and temperature coefficient of the resistors will add to the
overall device err or . Choice of the resistor tolerance and
temperature coefficient will depend on your error budget. We
also recommend using high value resistors to limit battery
current drain. Values between 100K and 1M should suffice
without introducing excessive noise into the IC.
CHOOSING THE EXTERNAL MOSFETCHOOSING THE EXTERNAL MOSFET
CHOOSING THE EXTERNAL MOSFET
CHOOSING THE EXTERNAL MOSFETCHOOSING THE EXTERNAL MOSFET
The external switch must be a logic lev el MOSFET. Most logic
level MOSFET s ha ve threshold voltages in the 1V range and can
handle a gate to source voltage (VGS) of 12V which is well
above the clamp voltage of the SC1 43 7. In addition, the
selection should be able to handle the charging current of the
battery over all temperature ranges. Whether to use a P-Channel
or N-Channel MOSFET depends upon the option chosen. The B
option requires the use of a N-Channel MOSFET while the H
option uses a P-Channel MOSFET .
2000 Semtech Corp.
5
www.semtech.com
Page 6
POWER MANAGEMENT
Applications Information Continued
SC1437
1
VBAT+
1
VTRIP
JUMPER IN = I NTERN AL VTRIP SELECT
JUMPER OUT = ADJU STABLE VTRIP SELECT
1
VBAT-
JP1
NO JUMPER = 80ms DELAY
R1
576K
R2
12
1M
4
5
1
26
3
7
8
Q1
IRF7805
JP3
0 DELAY
12
JP2
40ms D ELAY
12
R4
100
C2
0.1uF
1
4
3
U2
SEL
SENSE
OV
SC1437
5
V+
2
V-
R3
100
C1
0.1uF
1
CHARGER+
1
CHARGER-
FIGURE 2
FIGURE 3: TFIGURE 3: T
FIGURE 3: T
FIGURE 3: TFIGURE 3: T
rip Delarip Dela
rip Dela
rip Delarip Dela
y sey se
y se
y sey se
t tt t
t t
t tt t
Top T race: Charger V oltage, 5V/div
Bottom T race: VTRIP , 5V/div
Timebase: 20ms/div
o 80mS, JP3 & JP2 Open.o 80mS, JP3 & JP2 Open.
o 80mS, JP3 & JP2 Open.
o 80mS, JP3 & JP2 Open.o 80mS, JP3 & JP2 Open.
FIGURE 4: TFIGURE 4: T
FIGURE 4: T
FIGURE 4: TFIGURE 4: T
rip delarip dela
rip dela
rip delarip dela
y Sey Se
y Se
y Sey Se
t tt t
o 40mS, JP2 Shoro 40mS, JP2 Shor
t t
o 40mS, JP2 Shor
t tt t
o 40mS, JP2 Shoro 40mS, JP2 Shor
Top T race: Charger V oltage, 5V/div
Bottom T race: VTRIP , 5V/div
Timebase: 20ms/div
tt
t
tt
ed.ed.
ed.
ed.ed.
6 2000 Semtech Corp.
www.semtech.com
Page 7
POWER MANAGEMENT
)
Applications Information Continued
FIGURE 5: TFIGURE 5: T
FIGURE 5: T
FIGURE 5: TFIGURE 5: T
rip delarip dela
rip dela
rip delarip dela
y Sey Se
y Se
y Sey Se
t tt t
o 0mS, JP3 Shoro 0mS, JP3 Shor
t t
o 0mS, JP3 Shor
t tt t
o 0mS, JP3 Shoro 0mS, JP3 Shor
tt
t
tt
ed.ed.
ed.
ed.ed.
FIGURE 6: IntFIGURE 6: Int
FIGURE 6: Int
FIGURE 6: IntFIGURE 6: Int
INTERNAL TRIP VO LTA GE DEVIA TIO N O VER
0.4
0.2
0
-0.2
-0.4
-0.6
DEVIATION (%
-0.8
-1
-40-20020406080100120
ernal Ternal T
ernal T
ernal Ternal T
PloPlo
tttt
ed Aed A
Plo
tt
ed A
PloPlo
tttt
ed Aed A
TEMPERATURE (Degrees C)
rip Vrip V
oltage (4.7V) Deoltage (4.7V) De
rip V
oltage (4.7V) De
rip Vrip V
oltage (4.7V) Deoltage (4.7V) De
gainst Tgainst T
gainst T
gainst Tgainst T
TEMPERATURE
emem
em
emem
perature.perature.
perature.
perature.perature.
SC1437
viationviation
viation
viationviation
4.7V Internal
Top T race: Charger V oltage, 5V/div
Bottom T race: VTRIP , 5V/div
Timebase: 20ms/div
FIGURE 7FIGURE 7
FIGURE 7
FIGURE 7FIGURE 7
0.2
0.1
0
-0.1
-0.2
-0.3
DEVIATION (%)
-0.4
-0.5
-0.6
: Int: Int
ernal Ternal T
: Int
ernal T
: Int: Int
ernal Ternal T
PloPlo
tttt
ed Aed A
Plo
tt
ed A
PloPlo
tttt
ed Aed A
INTERNA L TRI P VOLTA G E DEVI ATI O N O VER
-40 -20020406080 100 120
TEMP ERATURE (Degr ees C)
rip Vrip V
oltage (4.2V) Deoltage (4.2V) De
rip V
oltage (4.2V) De
rip Vrip V
oltage (4.2V) Deoltage (4.2V) De
gainst Tgainst T
gainst T
gainst Tgainst T
TEMPERATURE
emem
em
emem
perature.perature.
perature.
perature.perature.
viationviation
viation
viationviation
4.2V Internal
2000 Semtech Corp.
7
www.semtech.com
Page 8
POWER MANAGEMENT
Outline Drawing - SOT23-5
SC1437
Land Pattern - SOT23-5
Contact Information
Semtech Corporation
Power Management Products Division
652 Mitchell Rd., Newbury Park, CA 91320
Phone: (805)498-211 1 F AX (805)498-3804
8 2000 Semtech Corp.
www.semtech.com
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