Datasheet SC1152CS.TR Datasheet (Semtech Corporation)

SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS

© 1998 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY PARK CA 91320

April 28, 1998

1

Pentium is a registered tradem ark of Intel Corporation

BLOCK DIAGRAM

VCC

VCC

ERROR

AMP

D/A AND
SHUT-

LOGIC

CONTROL

DECODED SHUTDOWN SIGNAL

OSCILLATOR

1.25V REF

+

-

+

-

CURRENT LIMIT

+

-

+

-

CS(-)

V

ID0

VID2
VID1

VID3

PWRGOOD

BSTH

DH

SHUTDOWN

OVP

GND

PGNDH

R

S

Q

+

-

70mV

CS(+)

+

-

V

ID4

BSTL

DL

PGNDL

SHOOT-THRU

VCC

LEVEL SHIFT

AND DRIVE

DRIVE

200 kHz

DOWN

UPPER FET

SYNCHRONOUS

FET

GND

OPEN COLLECTORS

VOSENSE

PIN CONFIGURATION

Top View

(20-Pin SOIC)

DESCRIPTION

The SC1152 is a low-cost, full featured, synchronous
voltage-mode controller designed for use in single
ended power supply applicat ions where efficiency is of
primar y c onc er n. Synchronous operation allows for the
elimination of heat si nk s i n many applicati ons. The
SC1152 is ideal for implementing DC/DC converters
needed to power advanced microprocessors such as
Pentium

®

ll (Klamath), in bot h si ngle and multiple pro­cessor configurations. Internal level-shif t, high-side
drive circuitry, and preset shoot-thru control, allows for
use of inexpensive n-channel power switches.

SC1152 featur es i nc lude an integrated 5-bit V

ID

DAC,
temperat ur e c ompensated voltage r eference, triangle
wave oscillator, current limit comparator, frequency
shift over-current protection, and an accessible, inter­nally compensated error ampli fier. Power good signal­ing, logic compatibl e shutdown, and over vol tage pro­tection ar e also provided.

The SC1152 operates at a fixed 200KHz, providing an
optim um compromi se between efficiency, external
component siz e, and cost.

FEATURES

•

Low cost / full featured

• Synchronous operation

• 5 Bit V

ID

DAC programmable output

• On-chip power good and OVP functions

• Designed to meet Intel VRM8.1 (Pentium

®

II)

APPLICATIONS

•

Pentium® II (Klamath) Core Supply

• Multiple Microprocessor Supplies

• Voltage Regulator Modules (VRM)

• Programmable Power Supplies

• High Ef ficiency DC/DC Conversion

DEVICE

(1)

PACKAGE TEMP. RANGE (TJ)

SC1152CS SO-20 0 - 125°C

ORDERING INFORMATION

TEL:[phone] F A X:805- 498- 3804 WEB:http://www.semtech.com

Note:
(1) Add suffix ‘TR’ f or tape and reel.

SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS

© 1998 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY PARK CA 91320

April 28, 1998

2

NOTE:

(1) Specification refers to application c ircuit (Figur e 1.).

ELECTRICAL CHARACTERISTICS

Unless specifi ed: VCC = 4.75V to 5. 25V ; GND = PGND = 0V; F B = VO; 0mV < (CS(+) - CS(-)) < 60mV; TJ = 25oC

PARAMETER CONDITIONS MIN TYP MAX UNITS

Output Voltage I

O

= 2A

(1)

See Table 1.

Supply Vol tage V

CC

4.2 7 V

Supply Current V

CC

= 5.0 5 mA

Load Regulation I

O

= 0.3A to 15A

(1)

1%

Line Regulation All VID codes

(1)

0.5 %

Gain (A

OL

)V

OSENSE

to V

O

35 dB
Current Limit Voltage 60 70 80 mV
Oscillator Frequency 180 200 220 kHz
Oscillator Max Duty Cycle 90 95 %
DH Sink/Sour c e Cur r ent BST

H

- DH = 4.5V, DH - P GNDH = 2V 1 A

DL Sink/Sour c e Cur r ent BST

L

- DL = 4.5V, DL - P GNDL = 2V 1 A
OVP Threshold V oltage 120 %
OVP Source Current V

OVP

= 3V 10 mA

Power Good Threshold
Voltage

90 110 %

Dead Tim e 50 100 ns

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Maximum Units

V

CC

to GND V

IN

-0.3 to 7 V
PGND to GND ± 1 V
BST to GND -0.3 to 15 V
Thermal Resistance

Junction t o Case

θ

JC

30 °C/W

Thermal Resistance
Junction t o A mbient

θ

JA

90 °C/W

Operating
Temperat ur e Range

T

A

0 to 70 °C

Storage
Temperat ur e Range

T

STG

-65 to +150 °C

Lead Temperat ur e
(Solderi ng) 10 sec

T

LEAD

300 °C

SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS

© 1998 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY PARK CA 91320

April 28, 1998

3

PIN CONFIGURATION

NOTE:

(1) All logic lev el inputs and outputs are open collec tor TTL compati ble.

PIN DESCRIPTION

Pin # Pin Name Pin Function

1 GND Small Signal Analog and Di gital Ground
2V

CC

Chip Supply V oltage

3 OVP High Signal Out if V

O

> Setpoint + 20%

4 PWRGOOD

(1)

Open coll ec tor logic output, high if VO within 10% of setpoint
5 CS(-) Current Sense Input (negative)
6 CS(+) Current Sense Input (posi tive)
7 PGNDH Power Ground for High Side Switc h
8 DH High Side Driver Output
9 NC Not Connected

10 PGNDL Power Ground for Low Si de S witch
11 DL Low Side Driver Output
12 BSTL Vcc for Low Side Driver (Boost)
13 BSTH Vcc for High Side Driv er (Boost)
14 SHUTDOWN

(1)

Logic Low shuts down the convert er

15 VOSENSE Top end of internal feedback chain
16 VID4

(1)

Programming Input (MSB)

17 VID3

(1)

Programming Input

18 VID2

(1)

Programming Input

19 VID1

(1)

Programming Input

20 VID0

(1)

Programming Input (LSB)

SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS

© 1998 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY PARK CA 91320

April 28, 1998

4

MATERIALS LIST

Quantity Reference Part/Description Vendor Notes

4 C1,C11-C13 0.1µF Ceramic Various
9 C2-C10 1000µF/6.3V SANYO MV-GX or equiv. Low ESR
1 D1 1N5817 Various
1 L1 4µH 8 Turns 16AWG on MICROMETALS T 50- 52D c or e
2 Q1, Q2 See notes See notes FET select ion requires trade-off between effic iency

and cost. Absolute maximum R

DS(ON)

= 22 m

Ω

1R1

5m

Ω

IRC OAR-1 Series

1R2

10kΩ, 5%, 1/8W

Various

1R3

2.32kΩ, 1%, 1/8W

Various

1R4

1kΩ, 1%, 1/8W

Various

1R5

10Ω, 5%, 1/8W

Various

1 U1 SC1152CS SEMTECH

APPLICATION CIRCUIT

C12

0.1uF

C1

0.1uF

C5
1000uF

+

C6
1000uF

+

C7
1000uF

+

C8

1000uF

+

C4

1000uF

+

C3

1000uF

+

C2

1000uF

+

L1

4 uH

R2
10k

C9
1000uF

+

C10

1000uF

+

R1
5mOhm

R5
10

C13

0.1uF

D1
1N5817

Q1

Q2

C11

0.1uF

R4 1.00kR3 2.32k

U1

SC1152CS

GND

1

VCC

2

OVP

3

PWRGOOD

4

CS(-)

5

CS(+)

6

PGNDH

7

DH

8

BSTH

13

SHUTDOWN

14

15

VID4

16

VID3

17

VID2

18

VID1

19

VID0

20

DL

11

PGNDL

10

BSTL

12

NC

9

5V IN

12V IN

OVP
VID0
VID1
VID2
VID3
VID4

SHUTDOWN
PWRGOOD

VCCP

VOSENSE

Figure 1.

Pentium® ll Power Supply

SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS

© 1998 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY PARK CA 91320

April 28, 1998

5

NOTE:

(1) All V ID codes not specifical ly listed are invalid and cause shutdown exactl y as i f the shutdown pin had been
asserted.

OUTPUT VOLTAGE TABLE

Unless specifi ed: VCC = 4.75V to 5. 25V ; GND = PGND = 0V; F B = VO; 0mV < (CS(+) - CS(-)) < 60mV; TJ = 25°C

PARAMETER CONDITIONS VID

43210

MIN TYP MAX UNIT S

Output Voltage

(1)

IO = 2A in Application Circuit 00101 1.782 1.800 1.818 V
(Figure 1) 00100 1.832 1.850 1.868

00011 1.881 1.900 1.919
00010 1.931 1.950 1.969
00001 1.980 2.000 2.020
00000 2.030 2.050 2.070
11111 1.980 2.000 2.020
11110 2.079 2.100 2.121
11101 2.178 2.200 2.222
11100 2.277 2.300 2.323
11011 2.376 2.400 2.424
11010 2.475 2.500 2.525
11001 2.574 2.600 2.626
11000 2.673 2.700 2.727
10111 2.772 2.800 2.828
10110 2.871 2.900 2.929
10101 2.970 3.000 3.030
10100 3.069 3.100 3.131
10011 3.168 3.200 3.232
10010 3.267 3.300 3.333
10001 3.366 3.400 3.434
10000 3.465 3.500 3.535

THEORY OF OPERATION

The v oltage at the V

OSENSE

pin is applied, through the internal precision resistor feedbac k c hain, to the inverting
input of the error ampli fier. The non-i nverting input of the error amplifier is supplied wit h a DC voltage derived by
the DAC fr om the internal t r immed bandgap voltage reference. The output of the error amplifier is compared to
the triangular output of the internal oscillator to generate a fixed frequency, vari able duty cycle pulse train. The
internal oscillator uses an on-chip capacitor and precision trimm ed c ur r ent sources to set the frequency to 200
kHz.
The generated pulse tr ain is gated with the output of the current limit latch and t he inhibit signal t o pr oduc e a
drive signal for the upper FET. It is also inverted to produce a drive signal for the lower FET. These FET drive
signals are modified by the “shoot-t hr ough c ontrol” circuitry so that the top FET t ur n- on is delayed until the bot tom
FET has turned off, and v isa-versa.
The current limit l atch is set (ending the upper FET dr ive pulse early) if the current limit comparator indicates an
overc ur r ent condition. The latch is reset at the start of each oscillator period.
The PWRGOOD and OVP signals are derived from the voltage at the V

OSENSE

pin by com par ators fed from the

internal feedback chain.

SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS

© 1998 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY PARK CA 91320

April 28, 1998

6

3.00 Volts

70.0%

75.0%

80.0%

85.0%

90.0%

95.0%

0.000 2.000 4.000 6.000 8.000 10.000 12.000 14.000 16.000

Output Current (Amps)

Efficiency

1.80 Volts

2.00 Volts

2.50 Volts

3.50 Volts

CHARACTERISTIC CURVES

SC1152 Efficiency in A pplication Circ uit (Figure 1).

SC1152 Regulati on in Application Circuit (Figur e 1) .

Delta 3.5

Delta 1.8

-0.025

-0.020

-0.015

-0.010

-0.005

0.000

0.000 2.000 4.000 6.000 8.000 10.000 12.000 14.000 16.000

Output Current (Amps)

∆

Vout (V)

Delta 2.0

Delta 2.5

Delta 3.0

SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS

© 1998 SEMTECH CORP. 652 MITCHELL ROA D NE WBURY PARK CA 91320

April 28, 1998

7

OUTLINE DRAWING SO-20

Ref. MS-013AC