Datasheet S6C0671 Datasheet (Samsung)

.

S6C0671

written permission of LCD Driver IC Team.

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Contents in this document are subject to change without notice. No part of this document may be reproduced
or transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express

February. 2000.

Ver. 0.0

Prepared by: Myoung-Sik, Suh

mail to: [email protected]

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

S6C0671 Specification Revision History

Version Content Date

0.0 Original Feb.2000

0.1 Ac timging Mar. 2000

2

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

CONTENTS

INTRODUCTION.................................................................................................................................................4

FEATURES......................................................................................................................................................... 4

BLOCK DIAGRAM..............................................................................................................................................5

PIN ASSIGNMENTS............................................................................................................................................6

PIN DESCRIPTIONS...........................................................................................................................................7

OPERATION DESCRIPTION.............................................................................................................................. 8

DISPLAY DATA TRANSFER............................................................................................................................ 8

EXTENSION OF OUTPUT...............................................................................................................................8

RELATIONSHIP BETWEEN INPUT DATA VALUE AND OUTPUT VOLTAGE.................................................8

RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT VOLTAGE VALUE...............................................11

RECOMMENDED OPERATION CONDITIONS.................................................................................................25

DC CHARACTERISTICS................................................................................................................................... 26

AC CHARACTERISTICS ................................................................................................................................... 27

WAVEFORMS (VIH = 0.8 VDD1, VIL = 0.2 VDD1) ............................................................................................28

RELATIONSHIPS BETWEEN CLK1, START PULSE (DIO1, DIO2) AND BLANKING PERIOD ....................... 29

3

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

INTRODUCTION

The S6C0671 is a 384 channel output, TFT-LCD source driver for an 256 gray scale LCD panel. Data input is
based on digital input consisting of 8 bits by 6 dots, which can realize a full-color display of 16,700,000 color by
output of 256 values gamma-corrected.

This device has an internal D/A (Digital-to-Analog) converter for each output and 18 (9-by-2) reference voltages.
Because the output dynamic range is as large as 7.8 - 14.8 Vp-p, it is unnecessary to operate level inversion of
the LCD's common electrode. Besides, to be able to deal with dot-line inversion when mounted on a single-side,
output gray scale voltages with different polarity can be output to the odd number output pins and the even output
pins.

S6C0671 can be adopted to larger panel, and SHL (shift direction selection) pin makes the use of the LCD panel
connection conveniently. Maximum operation clock frequency is 65 MHz at 2.7 V logic operation and it can be
applied to the TFT-LCD panel of XGA/SXGA standard.

FEATURES

• TFT active matrix LCD source driver LSI

• 256G/S is possible through 18 (9 by 2) reference voltages and D/A converter

• Both dot inversion display and N-line inversion display are possible

• CMOS level input

• Compatible with gamma-correction

• Input data inversion function (DATPOL1,2)

• Logic supply voltage: 2.7 - 3.6 V

• LCD driver supply voltage: 8.0 - 15.0 V

• Output dynamic range: 7.8 - 14.8 Vp-p

• Maximum operating frequency: fMAX = 65 MHz (internal data transmission rate at 2.7 V operation)

• Output: 384 outputs

• TCP

4

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

Y001

BLOCK DIAGRAM

POL
VGMA1 -

VGMA18

CLK1

18

Y384

8 8 8 8 8 8

8 8 8 8 8 8

Y383

Y382

Output Buffer

D/A Converter

Data Latch

Y003

Y002

DATPOL1
DATPOL2

D00 - D07
D10 - D17
D20 - D27
D30 - D37
D40 - D47
D50 - D57

CLK2

Data Register

8
8
8
8
8
8

24

24

Data Control

64bit Shift Register

DIO2 DIO1

SHL

Figure 1. S6C0671 Block Diagram

5

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

PIN ASSIGNMENTS

DIO1

D00
D01
D02
D03
D04

Y001
Y002
Y003
Y004

Y381
Y382
Y383
Y384

(Top View)

S6C0671

D05
D06
D07
D10
D11
D12
D13
D14
D15
D16
D17
D20
D21
D22
D23
D24
D25
D26
D27

TEST
DATPOL1
DATPOL2

POL
CLK1
CLK2
VSS1

VGMA1
VGMA2
VGMA3
VGMA4
VGMA5
VGMA6
VGMA7
VGMA8
VGMA9

VSS2
VDD2

VGMA10
VGMA11
VGMA12
VGMA13
VGMA14
VGMA15
VGMA16
VGMA17
VGMA18

SHL
VDD1

D30
D31
D32
D33
D34
D35
D36
D37
D40
D41
D42
D43
D44
D45
D46
D47
D50
D51
D52
D53
D54
D55
D56
D57

DIO2

Figure 2. S6C0671 Pin Assignments

6

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

PIN DESCRIPTIONS

Symbol Pin Name Description

VDD1 Logic power supply 2.7 - 3.6 V
VDD2 Driver power supply 8.0 - 15.0 V
VSS1 Logic ground Ground (0 V)
VSS2 Driver ground Ground (0 V)

Y1 – Y384 Driver outputs The D/A converted 256 gray-scale analog voltage is output.

D0<0:7>

- D5<0:7>

SHL

DIO1 Start pulse input/output

DIO2 Start pulse input/output

DATPOL1
DATPOL2

POL Polarity input

CLK2

CLK1 Latch input

VGMA1

–

VGMA18

TEST Test input

Display data input

Shift direction control

input

Data inversion input

Shift clock input

Gamma corrected power

supplies

The display data is input with a width of 48 bits,
gray-scale data (8 bits) by 6 dots (R,G,B) DX0: LSB, DX7: MSB

This pin controls the direction of shift register in cascade connection.
The shift direction of the shift registers is as follows.
SHL = H: DIO1 input, Y1 → Y384, DIO2 output
SHL = L: DIO2 input, Y384 → Y1, DIO1 output

SHL = H: Used as the start pulse input pin.
SHL = L: Used as the start pulse output pin.

SHL = H: Used as the start pulse output pin.
SHL = L: Used as the start pulse input pin.

DATPOL1,2 = L: Display data is not inverted
DATPOL1 = H: Display data of D0<0:7> - D2<0:7> is inverted
DATPOL2 = H: Display data of D3<0:7> - D5<0:7> is inverted

POL = H: The reference voltage for odd number outputs are VGMA10 –
VGMA18 and those for even number outputs are VGMA1 – VGMA9.
POL = L: The reference voltage for odd number outputs are VGMA1 –
VGMA9 and those for even number outputs are VGMA10 – VGMA18.

Refer to the shift register's shift clock input. the display data is loaded to
the data register at the rising edge of CLK2.
Latches the contents of the data register at rising edge and transfers
them to the D/A converter. Also, after CLK1 input, clears the internal
shift register contents. After 1 pulse input on start, operates normally.
CLK1 input timing refers to the "Relationships between CLK1 start pulse
(DIO1, DIO2) and blanking period" of the switching characteristic
waveform. Outputs the G/S data at falling edge.

Input the gamma corrected power supplies from external source.
VDD2 > VGMA1 > VGMA2 > …… > VGMA17 > VGMA18 > VSS2
Keep gray-scale power supply unchanged during the gray-scale
voltage output.

TEST = L: Normal operation mode
TEST = H: Test mode (OP AMP CUT-OFF, Rpd = 10kΩ)

7

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

OPERATION DESCRIPTION

DISPLAY DATA TRANSFER

When DIO1 (or DIO2) pulse is loaded into internal latch on the rising edge of CLK2, DIO1 (or DIO2) pulse
enables the operation of data transfer, so display data is valid on the next rising edge of CLK2. Once all the
data of 384 channels are loaded into internal latch, it goes into stand-by state automatically, and any new data
is not accepted even though CLK2 is provided until next DIO1 (or DIO2) input. When next DIO1 (or DIO2) is
provided, new display data is valid on the 2nd rising edge of CLK2 after the rising edge of DIO1 (or DIO2).

EXTENSION OF OUTPUT

Output pin can be adjusted to an extended screen by cascade connection.

(1) SHL = "L"
Connect DIO1 pin of previous stage to the DIO2 pin of next stage and all the input pins
except DIO1 and DIO2 are connected together in each device.

(2) SHL = "H"
Connect DIO2 pin of previous stage to the DIO1 pin of next stage and all the input pins
except DIO2 and DIO1 are connected together in each device.

RELATIONSHIP BETWEEN INPUT DATA VALUE AND OUTPUT VOLTAGE

The LCD drive output voltages are determined by the input data and 18 (9 by 2) gamma corrected power supplies
(VGMA1 - VGMA18). Besides, to be able to deal with dot line inversion when mounted on a single-side, gradation
voltages with different polarity can be output to the odd number output pins and the even number output pins.
Among 9-by-2 gamma corrected voltages, input gray-scale voltages of the same polarity with respect to the
common voltage, for the respective 9 gamma corrected voltages of VGMA1 – VGMA9 and VGMA10 - VGMA18.

SHL = H

OUTPUT

-

DATA

SHL = L

OUTPUT

-

DATA

Y1 - Y6 ...... Y379 - Y384

First Last

D00 - D07 - D50 - D57 ...... D00 - D07 - D50 - D57

Y1 - Y6 ...... Y379 - Y384

Last First

D00 - D07 - D50 - D57 ...... D00 - D07 - D50 - D57

Figure 3. Relationship between Shift Direction and Output Data

8

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

VDD2

VGMA1
VGMA2

VGMA3
VGMA4

VGMA5
VGMA6

VGMA7
VGMA8

VGMA9

1

30

32
64

64
32
31

1

VCOM

VGMA10
VGMA11

VGMA12

1

31
32

VGMA13
VGMA14

VGMA15
VGMA16

VGMA17
VGMA18

VSS2

00H 20H 40H 60H 80H A0H C0H E0H FFH

64
64

32

30

1

Figure 4. Gamma Correction Curve

9

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 1. Resistor Strings (R0 - R254, unit: Ω)

Name Value Name Value Name Value

R0 1500 R59 – R66 49 R221 82
R1 350 R67 – R70 46 R222 – R223 87
R2 300 R71 – R74 43 R224 89
R3 265 R75 – R78 40 R225 91
R4 240 R79 – R82 38 R226 92
R5 220 R83 – R86 37 R227 94
R6 202 R87 – R90 35 R228 95
R7 187 R91 – R94 34 R229 96
R8 174 R95 – R98 32 R230 – R231 97

R9 162 R99 – R102 31 R232 98
R10 150 R103 – R106 29 R233 99
R11 140 R107 – R114 28 R234 100
R12 130 R115 – R122 26 R235 102
R13 120 R123 – R130 25 R236 – R237 104
R14 110 R131 – R134 28 R238 106
R15 105 R135 – R138 31 R239 108
R16 100 R139 – R146 34 R240 – R241 110
R17 95 R147 – R150 37 R242 112
R18 92 R151 – R154 40 R243 114
R19 89 R155 – R162 43 R244 116
R20 86 R163 – R166 46 R245 – R246 118
R21 83 R167 – R170 49 R247 – R248 120
R22 82 R171 – R174 52 R249 122

R23 – R26 81 R175 – R178 55 R250 124
R27 – R30 79 R179 – R186 58 R251 127
R31 – R34 78 R187 – R194 61 R252 131
R35 – R38 71 R195 – R202 64 R253 135
R39 – R42 66 R203 – R210 67 R254 1500
R43 – R46 61 R211 – R214 70
R47 – R50 58 R215 – R218 73

R51 - R54 55 R219 74
R55 - R58 52 R220 78

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8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT VOLTAGE VALUE

Table 2. Relationship between Input Data and Output Voltage Value (1)

Input

data

00H
01H
02H
03H
04H
05H
06H
07H

08H

09H
0AH
0BH
0CH
0DH
0EH
0FH

10H

11H

12H

13H

14H

15H

16H

17H

18H

19H
1AH
1BH
1CH
1DH
1EH
1FH

20H

21H

22H

23H

24H

25H

26H

27H

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 1 0
0 0 0 0 0 0 1 1
0 0 0 0 0 1 0 0
0 0 0 0 0 1 0 1
0 0 0 0 0 1 1 0
0 0 0 0 0 1 1 1
0 0 0 0 1 0 0 0
0 0 0 0 1 0 0 1
0 0 0 0 1 0 1 0
0 0 0 0 1 0 1 1
0 0 0 0 1 1 0 0
0 0 0 0 1 1 0 1
0 0 0 0 1 1 1 0
0 0 0 0 1 1 1 1
0 0 0 1 0 0 0 0
0 0 0 1 0 0 0 1
0 0 0 1 0 0 1 0
0 0 0 1 0 0 1 1
0 0 0 1 0 1 0 0
0 0 0 1 0 1 0 1
0 0 0 1 0 1 1 0

0 0 0 1 0 1 1 1
0 0 0 1 1 0 0 0

0 0 0 1 1 0 0 1
0 0 0 1 1 0 1 0
0 0 0 1 1 0 1 1
0 0 0 1 1 1 0 0
0 0 0 1 1 1 0 1
0 0 0 1 1 1 1 0
0 0 0 1 1 1 1 1
0 0 1 0 0 0 0 0
0 0 1 0 0 0 0 1
0 0 1 0 0 0 1 0
0 0 1 0 0 0 1 1
0 0 1 0 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 0 0 1 1 0
0 0 1 0 0 1 1 1

VH0
VH1
VH2
VH3
VH4
VH5
VH6
VH7

VH8

VH9
VH10
VH11
VH12
VH13
VH14
VH15

VH16
VH17
VH18
VH19
VH20
VH21
VH22
VH23

VH24
VH25
VH26
VH27
VH28
VH29
VH30
VH31

VH32
VH33
VH34
VH35
VH36
VH37
VH38
VH39

VGMA2 + (VGMA3 - VGMA2) × 350 / 4122
VGMA2 + (VGMA3 - VGMA2) × 650 / 4122

VGMA2 + (VGMA3 - VGMA2) × 915 / 4122
VGMA2 + (VGMA3 - VGMA2) × 1155 / 4122
VGMA2 + (VGMA3 - VGMA2) × 1375 / 4122
VGMA2 + (VGMA3 - VGMA2) × 1577 / 4122

VGMA2 + (VGMA3 - VGMA2) × 1764 / 4122
VGMA2 + (VGMA3 - VGMA2) × 1938 / 4122
VGMA2 + (VGMA3 - VGMA2) × 2100 / 4122
VGMA2 + (VGMA3 - VGMA2) × 2250 / 4122
VGMA2 + (VGMA3 - VGMA2) × 2390 / 4122
VGMA2 + (VGMA3 - VGMA2) × 2520 / 4122
VGMA2 + (VGMA3 - VGMA2) × 2640 / 4122
VGMA2 + (VGMA3 - VGMA2) × 2750 / 4122

VGMA2 + (VGMA3 - VGMA2) × 2855 / 4122
VGMA2 + (VGMA3 - VGMA2) × 2955 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3040 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3132 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3221 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3307 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3390 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3472 / 4122

VGMA2 + (VGMA3 - VGMA2) × 3553 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3634 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3715 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3796 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3875 / 4122
VGMA2 + (VGMA3 - VGMA2) × 3944 / 4122
VGMA2 + (VGMA3 - VGMA2) × 4023 / 4122

VGMA3 + (VGMA4 - VGMA3) × 78 / 1960
VGMA3 + (VGMA4 - VGMA3) × 156 / 1960
VGMA3 + (VGMA4 - VGMA3) × 234 / 1960
VGMA3 + (VGMA4 - VGMA3) × 312 / 1960
VGMA3 + (VGMA4 - VGMA3) × 383 / 1960
VGMA3 + (VGMA4 - VGMA3) × 454 / 1960
VGMA3 + (VGMA4 - VGMA3) × 525 / 1960
VGMA3 + (VGMA4 - VGMA3) × 596 / 1960

VGMA1
VGMA2

VGMA3

NOTE: VDD2>VGMA1>VGMA2>VGMA3>VGMA4>VGMA5>VGMA6>VGMA7>VGMA8>VGMA9

11

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 2. Relationship between Input Data and Output Voltage Value (2)

Input

data

28H
29H
2AH

2BH
2CH
2DH

2EH

2FH

30H

31H

32H

33H

34H

35H

36H

37H

38H

39H

3AH

3BH
3CH
3DH

3EH

3FH

40H

41H

42H

43H

44H

45H

46H

47H

48H

49H

4AH

4BH
4CH
4DH

4EH

4FH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1 1 0 0 0 0
0 0 1 1 0 0 0 1
0 0 1 1 0 0 1 0
0 0 1 1 0 0 1 1
0 0 1 1 0 1 0 0
0 0 1 1 0 1 0 1
0 0 1 1 0 1 1 0
0 0 1 1 0 1 1 1
0 0 1 1 1 0 0 0
0 0 1 1 1 0 0 1
0 0 1 1 1 0 1 0
0 0 1 1 1 0 1 1
0 0 1 1 1 1 0 0
0 0 1 1 1 1 0 1
0 0 1 1 1 1 1 0
0 0 1 1 1 1 1 1
0 1 0 0 0 0 0 0
0 1 0 0 0 0 0 1
0 1 0 0 0 0 1 0
0 1 0 0 0 0 1 1
0 1 0 0 0 1 0 0
0 1 0 0 0 1 0 1
0 1 0 0 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 0 1 0 0 0
0 1 0 0 1 0 0 1
0 1 0 0 1 0 1 0
0 1 0 0 1 0 1 1
0 1 0 0 1 1 0 0
0 1 0 0 1 1 0 1
0 1 0 0 1 1 1 0
0 1 0 0 1 1 1 1

0

1 0 0 0

0

1 0 0 1

0

1 0 1 0

0

1 0 1 1

0

1 1 0 0

0

1 1 0 1

0

1 1 1 0

0

1 1 1 1

VH40
VH41
VH42
VH43
VH44
VH45
VH46
VH47

VH48
VH49
VH50
VH51
VH52
VH53
VH54
VH55

VH56
VH57
VH58
VH59
VH60
VH61
VH62
VH63

VH64
VH65
VH66
VH67
VH68
VH69
VH70
VH71

VH72
VH73
VH74
VH75
VH76
VH77
VH78
VH79

VGMA3 + (VGMA4 - VGMA3) × 662 / 1960
VGMA3 + (VGMA4 - VGMA3) × 728 / 1960
VGMA3 + (VGMA4 - VGMA3) × 794 / 1960
VGMA3 + (VGMA4 - VGMA3) × 860 / 1960
VGMA3 + (VGMA4 - VGMA3) × 921 / 1960

VGMA3 + (VGMA4 - VGMA3) × 982 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1043 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1104 / 1960

VGMA3 + (VGMA4 - VGMA3) × 1162 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1220 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1278 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1336 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1391 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1446 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1501 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1556 / 1960

VGMA3 + (VGMA4 - VGMA3) × 1608 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1660 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1712 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1764 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1813 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1862 / 1960
VGMA3 + (VGMA4 - VGMA3) × 1911 / 1960

VGMA4

VGMA4 + (VGMA5 - VGMA4) × 49 / 2188

VGMA4 + (VGMA5 - VGMA4) × 98 / 2188
VGMA4 + (VGMA5 - VGMA4) × 147 / 2188
VGMA4 + (VGMA5 - VGMA4) × 196 / 2188
VGMA4 + (VGMA5 - VGMA4) × 242 / 2188
VGMA4 + (VGMA5 - VGMA4) × 288 / 2188
VGMA4 + (VGMA5 - VGMA4) × 334 / 2188
VGMA4 + (VGMA5 - VGMA4) × 380 / 2188

VGMA4 + (VGMA5 - VGMA4) × 423 / 2188
VGMA4 + (VGMA5 - VGMA4) × 466 / 2188
VGMA4 + (VGMA5 - VGMA4) × 509 / 2188
VGMA4 + (VGMA5 - VGMA4) × 552 / 2188
VGMA4 + (VGMA5 - VGMA4) × 592 / 2188
VGMA4 + (VGMA5 - VGMA4) × 632 / 2188
VGMA4 + (VGMA5 - VGMA4) × 672 / 2188
VGMA4 + (VGMA5 - VGMA4) × 712 / 2188

12

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

Table 2. Relationship between Input Data and Output Voltage Value (3)

Input

data

50H
51H
52H
53H
54H
55H
56H
57H

58H

59H
5AH
5BH
5CH
5DH
5EH
5FH

60H

61H

62H

63H

64H

65H

66H

67H

68H

69H
6AH
6BH
6CH
6DH
6EH
6FH

70H

71H

72H

73H

74H

75H

76H

77H

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 1 0 1 0 0 0 0
0 1 0 1 0 0 0 1
0 1 0 1 0 0 1 0
0 1 0 1 0 0 1 1
0 1 0 1 0 1 0 0
0 1 0 1 0 1 0 1
0 1 0 1 0 1 1 0
0 1 0 1 0 1 1 1
0 1 0 1 1 0 0 0
0 1 0 1 1 0 0 1
0 1 0 1 1 0 1 0
0 1 0 1 1 0 1 1
0 1 0 1 1 1 0 0
0 1 0 1 1 1 0 1
0 1 0 1 1 1 1 0
0 1 0 1 1 1 1 1
0 1 1 0 0 0 0 0
0 1 1 0 0 0 0 1
0 1 1 0 0 0 1 0
0 1 1 0 0 0 1 1
0 1 1 0 0 1 0 0
0 1 1 0 0 1 0 1
0 1 1 0 0 1 1 0
0 1 1 0 0 1 1 1
0 1 1 0 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 0 1 0 1 0
0 1 1 0 1 0 1 1
0 1 1 0 1 1 0 0
0 1 1 0 1 1 0 1
0 1 1 0 1 1 1 0
0 1 1 0 1 1 1 1
0 1 1 1 0 0 0 0
0 1 1 1 0 0 0 1
0 1 1 1 0 0 1 0
0 1 1 1 0 0 1 1
0 1 1 1 0 1 0 0
0 1 1 1 0 1 0 1
0 1 1 1 0 1 1 0
0 1 1 1 0 1 1 1

VH80
VH81
VH82
VH83
VH84
VH85
VH86
VH87

VH88
VH89
VH90
VH91
VH92
VH93
VH94
VH95

VH96
VH97
VH98

VH99
VH100
VH101
VH102
VH103

VH104
VH105
VH106
VH107
VH108
VH109
VH110
VH111

VH112
VH113
VH114
VH115
VH116
VH117
VH118
VH119

VGMA4 + (VGMA5 - VGMA4) × 750 / 2188
VGMA4 + (VGMA5 - VGMA4) × 788 / 2188
VGMA4 + (VGMA5 - VGMA4) × 826 / 2188
VGMA4 + (VGMA5 - VGMA4) × 864 / 2188
VGMA4 + (VGMA5 - VGMA4) × 901 / 2188
VGMA4 + (VGMA5 - VGMA4) × 938 / 2188
VGMA4 + (VGMA5 - VGMA4) × 975 / 2188

VGMA4 + (VGMA5 - VGMA4) × 1012 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1047 / 2188

VGMA4 + (VGMA5 - VGMA4) × 1082 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1117 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1152 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1186 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1220 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1254 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1288 / 2188

VGMA4 + (VGMA5 - VGMA4) × 1320 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1352 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1384 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1416 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1447 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1478 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1509 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1540 / 2188

VGMA4 + (VGMA5 - VGMA4) × 1569 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1598 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1627 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1656 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1684 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1712 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1740 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1768 / 2188

VGMA4 + (VGMA5 - VGMA4) × 1796 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1824 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1852 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1880 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1906 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1932 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1958 / 2188
VGMA4 + (VGMA5 - VGMA4) × 1984 / 2188

13

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 2. Relationship between Input Data and Output Voltage Value (4)

Input

data

78H
79H
7AH

7BH
7CH
7DH

7EH

7FH

80H

81H

82H

83H

84H

85H

86H

87H

88H

89H

8AH

8BH
8CH
8DH

8EH

8FH

90H

91H

92H

93H

94H

95H

96H

97H

98H

99H

9AH

9BH
9CH
9DH

9EH

9FH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 1 1 1 1 0 0 0
0 1 1 1 1 0 0 1
0 1 1 1 1 0 1 0
0 1 1 1 1 0 1 1
0 1 1 1 1 1 0 0
0 1 1 1 1 1 0 1
0 1 1 1 1 1 1 0
0 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0
1 0 0 0 0 0 0 1
1 0 0 0 0 0 1 0
1 0 0 0 0 0 1 1
1 0 0 0 0 1 0 0
1 0 0 0 0 1 0 1
1 0 0 0 0 1 1 0
1 0 0 0 0 1 1 1
1 0 0 0 1 0 0 0
1 0 0 0 1 0 0 1
1 0 0 0 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 0 1 1 0 0
1 0 0 0 1 1 0 1
1 0 0 0 1 1 1 0
1 0 0 0 1 1 1 1
1 0 0 1 0 0 0 0
1 0 0 1 0 0 0 1
1 0 0 1 0 0 1 0
1 0 0 1 0 0 1 1
1 0 0 1 0 1 0 0
1 0 0 1 0 1 0 1
1 0 0 1 0 1 1 0
1 0 0 1 0 1 1 1
1 0 0 1 1 0 0 0
1 0 0 1 1 0 0 1
1 0 0 1 1 0 1 0
1 0 0 1 1 0 1 1
1 0 0 1 1 1 0 0
1 0 0 1 1 1 0 1
1 0 0 1 1 1 1 0
1 0 0 1 1 1 1 1

VH120
VH121
VH122
VH123
VH124
VH125
VH126
VH127

VH128
VH129
VH130
VH131
VH132
VH133
VH134
VH135

VH136
VH137
VH138
VH139
VH140
VH141
VH142
VH143

VH144
VH145
VH146
VH147
VH148
VH149
VH150
VH151

VH152
VH153
VH154
VH155
VH156
VH157
VH158
VH159

VGMA4 + (VGMA5 - VGMA4) × 2010 / 2188
VGMA4 + (VGMA5 - VGMA4) × 2036 / 2188
VGMA4 + (VGMA5 - VGMA4) × 2062 / 2188
VGMA4 + (VGMA5 - VGMA4) × 2088 / 2188
VGMA4 + (VGMA5 - VGMA4) × 2113 / 2188
VGMA4 + (VGMA5 - VGMA4) × 2138 / 2188
VGMA4 + (VGMA5 - VGMA4) × 2163 / 2188

VGMA5

VGMA5 + (VGMA6 - VGMA5) × 25 / 2776
VGMA5 + (VGMA6 - VGMA5) × 50 / 2776

VGMA5 + (VGMA6 - VGMA5) × 75 / 2776
VGMA5 + (VGMA6 - VGMA5) × 100 / 2776
VGMA5 + (VGMA6 - VGMA5) × 128 / 2776
VGMA5 + (VGMA6 - VGMA5) × 156 / 2776
VGMA5 + (VGMA6 - VGMA5) × 184 / 2776
VGMA5 + (VGMA6 - VGMA5) × 212 / 2776

VGMA5 + (VGMA6 - VGMA5) × 243 / 2776
VGMA5 + (VGMA6 - VGMA5) × 274 / 2776
VGMA5 + (VGMA6 - VGMA5) × 305 / 2776
VGMA5 + (VGMA6 - VGMA5) × 336 / 2776
VGMA5 + (VGMA6 - VGMA5) × 370 / 2776
VGMA5 + (VGMA6 - VGMA5) × 404 / 2776
VGMA5 + (VGMA6 - VGMA5) × 438 / 2776
VGMA5 + (VGMA6 - VGMA5) × 472 / 2776

VGMA5 + (VGMA6 - VGMA5) × 506 / 2776
VGMA5 + (VGMA6 - VGMA5) × 540 / 2776
VGMA5 + (VGMA6 - VGMA5) × 574 / 2776
VGMA5 + (VGMA6 - VGMA5) × 608 / 2776
VGMA5 + (VGMA6 - VGMA5) × 645 / 2776
VGMA5 + (VGMA6 - VGMA5) × 682 / 2776
VGMA5 + (VGMA6 - VGMA5) × 719 / 2776
VGMA5 + (VGMA6 - VGMA5) × 756 / 2776

VGMA5 + (VGMA6 - VGMA5) × 796 / 2776
VGMA5 + (VGMA6 - VGMA5) × 836 / 2776
VGMA5 + (VGMA6 - VGMA5) × 876 / 2776
VGMA5 + (VGMA6 - VGMA5) × 916 / 2776
VGMA5 + (VGMA6 - VGMA5) × 959 / 2776

VGMA5 + (VGMA6 - VGMA5) × 1002 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1045 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1088 / 2776

14

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

Table 2. Relationship between Input Data and Output Voltage Value (5)

Input

data

A0H
A1H
A2H
A3H
A4H
A5H
A6H
A7H

A8H
A9H
AAH

ABH
ACH
ADH
AEH
AFH

B0H

B1H

B2H

B3H

B4H

B5H

B6H

B7H

B8H

B9H
BAH
BBH
BCH
BDH
BEH
BFH

C0H

C1H

C2H

C3H

C4H

C5H

C6H

C7H

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1 1 0 0 0
1 0 1 1 1 0 0 1
1 0 1 1 1 0 1 0
1 0 1 1 1 0 1 1
1 0 1 1 1 1 0 0
1 0 1 1 1 1 0 1
1 0 1 1 1 1 1 0
1 0 1 1 1 1 1 1
1 1 0 0 0 0 0 0
1 1 0 0 0 0 0 1
1 1 0 0 0 0 1 0
1 1 0 0 0 0 1 1
1 1 0 0 0 1 0 0
1 1 0 0 0 1 0 1
1 1 0 0 0 1 1 0
1 1 0 0 0 1 1 1

0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0
0
0
0
0
0
0
0

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0

1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

0

0 0 0

0

0 0 1

0

0 1 0

0

0 1 1

0

1 0 0

0

1 0 1

0

1 1 0

0

1 1 1

VH160
VH161
VH162
VH163
VH164
VH165
VH166
VH167

VH168
VH169
VH170
VH171
VH172
VH173
VH174
VH175

VH176
VH177
VH178
VH179
VH180
VH181
VH182
VH183

VH184
VH185
VH186
VH187
VH188
VH189
VH190
VH191

VH192
VH193
VH194
VH195
VH196
VH197
VH198
VH199

VGMA5 + (VGMA6 - VGMA5) × 1131 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1174 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1217 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1260 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1306 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1352 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1398 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1444 / 2776

VGMA5 + (VGMA6 - VGMA5) × 1493 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1542 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1591 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1640 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1692 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1744 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1796 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1848 / 2776

VGMA5 + (VGMA6 - VGMA5) × 1903 / 2776
VGMA5 + (VGMA6 - VGMA5) × 1958 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2013 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2068 / 2776

VGMA5 + (VGMA6 - VGMA5) × 2126/ 2776
VGMA5 + (VGMA6 - VGMA5) × 2184 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2242 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2300 / 2776

VGMA5 + (VGMA6 - VGMA5) × 2358 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2416 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2474 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2532 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2593 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2654 / 2776
VGMA5 + (VGMA6 - VGMA5) × 2715 / 2776

VGMA6

VGMA6 + (VGMA7 - VGMA6) × 61 / 2185
VGMA6 + (VGMA7 - VGMA6) × 122 / 2185
VGMA6 + (VGMA7 - VGMA6) × 183 / 2185
VGMA6 + (VGMA7 - VGMA6) × 244 / 2185
VGMA6 + (VGMA7 - VGMA6) × 308 / 2185
VGMA6 + (VGMA7 - VGMA6) × 372 / 2185
VGMA6 + (VGMA7 - VGMA6) × 436 / 2185
VGMA6 + (VGMA7 - VGMA6) × 500 / 2185

15

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 2. Relationship between Input Data and Output Voltage Value (6)

Input

data

C8H
C9H
CAH
CBH
CCH
CDH
CEH
CFH

D0H
D1H
D2H
D3H
D4H
D5H
D6H
D7H

D8H
D9H
DAH
DBH
DCH
DDH
DEH
DFH

E0H
E1H
E2H
E3H
E4H
E5H
E6H
E7H

E8H

E9H
EAH
EBH
ECH
EDH
EEH
EFH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0 1 0 0 0 0
1 1 0 1 0 0 0 1
1 1 0 1 0 0 1 0
1 1 0 1 0 0 1 1
1 1 0 1 0 1 0 0
1 1 0 1 0 1 0 1
1 1 0 1 0 1 1 0
1 1 0 1 0 1 1 1
1 1 0 1 1 0 0 0
1 1 0 1 1 0 0 1
1 1 0 1 1 0 1 0
1 1 0 1 1 0 1 1
1 1 0 1 1 1 0 0
1 1 0 1 1 1 0 1
1 1 0 1 1 1 1 0
1 1 0 1 1 1 1 1
1 1 1 0 0 0 0 0
1 1 1 0 0 0 0 1
1 1 1 0 0 0 1 0
1 1 1 0 0 0 1 1
1 1 1 0 0 1 0 0
1 1 1 0 0 1 0 1
1 1 1 0 0 1 1 0
1 1 1 0 0 1 1 1
1 1 1 0 1 0 0 0
1 1 1 0 1 0 0 1
1 1 1 0 1 0 1 0
1 1 1 0 1 0 1 1
1 1 1 0 1 1 0 0
1 1 1 0 1 1 0 1
1 1 1 0 1 1 1 0
1 1 1 0 1 1 1 1

0

1 0 0 0

0

1 0 0 1

0

1 0 1 0

0

1 0 1 1

0

1 1 0 0

0

1 1 0 1

0

1 1 1 0

0

1 1 1 1

VH200
VH201
VH202
VH203
VH204
VH205
VH206
VH207

VH208
VH209
VH210
VH211
VH212
VH213
VH214
VH215

VH216
VH217
VH218
VH219
VH220
VH221
VH222
VH223

VH224
VH225
VH226
VH227
VH228
VH229
VH230
VH231

VH232
VH233
VH234
VH235
VH236
VH237
VH238
VH239

VGMA6 + (VGMA7 - VGMA6) × 564 / 2185
VGMA6 + (VGMA7 - VGMA6) × 628 / 2185
VGMA6 + (VGMA7 - VGMA6) × 692 / 2185
VGMA6 + (VGMA7 - VGMA6) × 756 / 2185
VGMA6 + (VGMA7 - VGMA6) × 823 / 2185
VGMA6 + (VGMA7 - VGMA6) × 890 / 2185
VGMA6 + (VGMA7 - VGMA6) × 957 / 2185

VGMA6 + (VGMA7 - VGMA6) × 1024 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1091 / 2185

VGMA6 + (VGMA7 - VGMA6) × 1158 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1225 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1292 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1362 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1432 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1502 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1572 / 2185

VGMA6 + (VGMA7 - VGMA6) × 1645 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1718 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1791 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1864 / 2185
VGMA6 + (VGMA7 - VGMA6) × 1938 / 2185
VGMA6 + (VGMA7 - VGMA6) × 2016 / 2185
VGMA6 + (VGMA7 - VGMA6) × 2098 / 2185

VGMA7

VGMA7 + (VGMA8 - VGMA7) × 87 / 3336
VGMA7 + (VGMA8 - VGMA7) × 176 / 3336
VGMA7 + (VGMA8 - VGMA7) × 267 / 3336
VGMA7 + (VGMA8 - VGMA7) × 359 / 3336
VGMA7 + (VGMA8 - VGMA7) × 453 / 3336
VGMA7 + (VGMA8 - VGMA7) × 548 / 3336
VGMA7 + (VGMA8 - VGMA7) × 644 / 3336
VGMA7 + (VGMA8 - VGMA7) × 741 / 3336

VGMA7 + (VGMA8 - VGMA7) × 838 / 3336
VGMA7 + (VGMA8 - VGMA7) × 936 / 3336

VGMA7 + (VGMA8 - VGMA7) × 1035 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1135 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1237 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1341 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1445 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1551 / 3336

16

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

Table 2. Relationship between Input Data and Output Voltage Value (7)

Input

data

F0H
F1H
F2H
F3H
F4H
F5H
F6H
F7H

F8H

F9H
FAH
FBH
FCH
FDH
FEH

FFH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

1 1 1 1 0 0 0 0
1 1 1 1 0 0 0 1
1 1 1 1 0 0 1 0
1 1 1 1 0 0 1 1
1 1 1 1 0 1 0 0
1 1 1 1 0 1 0 1
1 1 1 1 0 1 1 0
1 1 1 1 0 1 1 1
1 1 1 1 1 0 0 0
1 1 1 1 1 0 0 1
1 1 1 1 1 0 1 0
1 1 1 1 1 0 1 1
1 1 1 1 1 1 0 0
1 1 1 1 1 1 0 1
1 1 1 1 1 1 1 0
1 1 1 1 1 1 1 1

VH240
VH241
VH242
VH243
VH244
VH245
VH246
VH247

VH248
VH249
VH250
VH251
VH252
VH253
VH254
VH255

VGMA7 + (VGMA8 - VGMA7) × 1659 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1769 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1879 / 3336
VGMA7 + (VGMA8 - VGMA7) × 1991 / 3336
VGMA7 + (VGMA8 - VGMA7) × 2105 / 3336
VGMA7 + (VGMA8 - VGMA7) × 2221 / 3336
VGMA7 + (VGMA8 - VGMA7) × 2339 / 3336
VGMA7 + (VGMA8 - VGMA7) × 2457 / 3336

VGMA7 + (VGMA8 - VGMA7) × 2577 / 3336
VGMA7 + (VGMA8 - VGMA7) × 2697 / 3336
VGMA7 + (VGMA8 - VGMA7) × 2819 / 3336
VGMA7 + (VGMA8 - VGMA7) × 2943 / 3336
VGMA7 + (VGMA8 - VGMA7) × 3070 / 3336
VGMA7 + (VGMA8 - VGMA7) × 3201 / 3336

VGMA8
VGMA9

17

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 2. Relationship between Input Data and Output Voltage Value (8)

Input

data

00H
01H
02H
03H
04H
05H
06H
07H

08H
09H
0AH

0BH
0CH
0DH

0EH

0FH

10H

11H

12H

13H

14H

15H

16H

17H

18H

19H

1AH

1BH
1CH
1DH

1EH

1FH

20H

21H

22H

23H

24H

25H

26H

27H

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 1 0
0 0 0 0 0 0 1 1
0 0 0 0 0 1 0 0
0 0 0 0 0 1 0 1
0 0 0 0 0 1 1 0
0 0 0 0 0 1 1 1
0 0 0 0 1 0 0 0
0 0 0 0 1 0 0 1
0 0 0 0 1 0 1 0
0 0 0 0 1 0 1 1
0 0 0 0 1 1 0 0
0 0 0 0 1 1 0 1
0 0 0 0 1 1 1 0
0 0 0 0 1 1 1 1
0 0 0 1 0 0 0 0
0 0 0 1 0 0 0 1
0 0 0 1 0 0 1 0
0 0 0 1 0 0 1 1
0 0 0 1 0 1 0 0
0 0 0 1 0 1 0 1
0 0 0 1 0 1 1 0

0 0 0 1 0 1 1 1
0 0 0 1 1 0 0 0

0 0 0 1 1 0 0 1
0 0 0 1 1 0 1 0
0 0 0 1 1 0 1 1
0 0 0 1 1 1 0 0
0 0 0 1 1 1 0 1
0 0 0 1 1 1 1 0
0 0 0 1 1 1 1 1
0 0 1 0 0 0 0 0
0 0 1 0 0 0 0 1
0 0 1 0 0 0 1 0
0 0 1 0 0 0 1 1
0 0 1 0 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 0 0 1 1 0
0 0 1 0 0 1 1 1

VL0
VL1
VL2
VL3
VL4
VL5
VL6
VL7

VL8

VL9
VL10
VL11
VL12
VL13
VL14
VL15

VL16
VL17
VL18
VL19
VL20
VL21
VL22
VL23

VL24
VL25
VL26
VL27
VL28
VL29
VL30
VL31

VL32
VL33
VL34
VL35
VL36
VL37
VL38
VL39

VGMA17 + (VGMA16 - VGMA17) × 350 / 4122
VGMA17 + (VGMA16 - VGMA17) × 650 / 4122

VGMA17 + (VGMA16 - VGMA17) × 915 / 4122
VGMA17 + (VGMA16 - VGMA17) × 1155 / 4122
VGMA17 + (VGMA16 - VGMA17) × 1375 / 4122
VGMA17 + (VGMA16 - VGMA17) × 1577 / 4122

VGMA17 + (VGMA16 - VGMA17) × 1764 / 4122
VGMA17 + (VGMA16 - VGMA17) × 1938 / 4122
VGMA17 + (VGMA16 - VGMA17) × 2100 / 4122
VGMA17 + (VGMA16 - VGMA17) × 2250 / 4122
VGMA17 + (VGMA16 - VGMA17) × 2390 / 4122
VGMA17 + (VGMA16 - VGMA17) × 2520 / 4122
VGMA17 + (VGMA16 - VGMA17) × 2640 / 4122
VGMA17 + (VGMA16 - VGMA17) × 2750 / 4122

VGMA17 + (VGMA16 - VGMA17) × 2855 / 4122
VGMA17 + (VGMA16 - VGMA17) × 2955 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3040 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3132 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3221 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3307 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3390 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3472 / 4122

VGMA17 + (VGMA16 - VGMA17) × 3553 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3634 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3715 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3796 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3875 / 4122
VGMA17 + (VGMA16 - VGMA17) × 3944 / 4122
VGMA17 + (VGMA16 - VGMA17) × 4023 / 4122

VGMA16 + (VGMA15 - VGMA16) × 78 / 1960
VGMA16 + (VGMA15 - VGMA16) × 156 / 1960
VGMA16 + (VGMA15 - VGMA16) × 234 / 1960
VGMA16 + (VGMA15 - VGMA16) × 312 / 1960
VGMA16 + (VGMA15 - VGMA16) × 383 / 1960
VGMA16 + (VGMA15 - VGMA16) × 454 / 1960
VGMA16 + (VGMA15 - VGMA16) × 525 / 1960
VGMA16 + (VGMA15 - VGMA16) × 596 / 1960

VGMA18
VGMA17

VGMA16

NOTE: VSS2<VGMA18<VGMA17<VGMA16<VGMA15<VGMA14<VGMA13<VGMA12<VGMA11<VGMA10

18

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

Table 2. Relationship between Input Data and Output Voltage Value (9)

Input

data

28H

29H
2AH
2BH
2CH
2DH
2EH
2FH

30H

31H

32H

33H

34H

35H

36H

37H

38H

39H
3AH
3BH
3CH
3DH
3EH
3FH

40H

41H

42H

43H

44H

45H

46H

47H

48H

49H
4AH
4BH
4CH
4DH
4EH
4FH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 0 1 1 0 0 0 0
0 0 1 1 0 0 0 1
0 0 1 1 0 0 1 0
0 0 1 1 0 0 1 1
0 0 1 1 0 1 0 0
0 0 1 1 0 1 0 1
0 0 1 1 0 1 1 0
0 0 1 1 0 1 1 1
0 0 1 1 1 0 0 0
0 0 1 1 1 0 0 1
0 0 1 1 1 0 1 0
0 0 1 1 1 0 1 1
0 0 1 1 1 1 0 0
0 0 1 1 1 1 0 1
0 0 1 1 1 1 1 0
0 0 1 1 1 1 1 1
0 1 0 0 0 0 0 0
0 1 0 0 0 0 0 1
0 1 0 0 0 0 1 0
0 1 0 0 0 0 1 1
0 1 0 0 0 1 0 0
0 1 0 0 0 1 0 1
0 1 0 0 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 0 1 0 0 0
0 1 0 0 1 0 0 1
0 1 0 0 1 0 1 0
0 1 0 0 1 0 1 1
0 1 0 0 1 1 0 0
0 1 0 0 1 1 0 1
0 1 0 0 1 1 1 0
0 1 0 0 1 1 1 1

0

1 0 0 0

0

1 0 0 1

0

1 0 1 0

0

1 0 1 1

0

1 1 0 0

0

1 1 0 1

0

1 1 1 0

0

1 1 1 1

VL40
VL41
VL42
VL43
VL44
VL45
VL46
VL47

VL48
VL49
VL50
VL51
VL52
VL53
VL54
VL55

VL56
VL57
VL58
VL59
VL60
VL61
VL62
VL63

VL64
VL65
VL66
VL67
VL68
VL69
VL70
VL71

VL72
VL73
VL74
VL75
VL76
VL77
VL78
VL79

VGMA16 + (VGMA15 - VGMA16) × 662 / 1960
VGMA16 + (VGMA15 - VGMA16) × 728 / 1960
VGMA16 + (VGMA15 - VGMA16) × 794 / 1960
VGMA16 + (VGMA15 - VGMA16) × 860 / 1960
VGMA16 + (VGMA15 - VGMA16) × 921 / 1960

VGMA16 + (VGMA15 - VGMA16) × 982 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1043 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1104 / 1960

VGMA16 + (VGMA15 - VGMA16) × 1162 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1220 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1278 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1336 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1391 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1446 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1501 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1556 / 1960

VGMA16 + (VGMA15 - VGMA16) × 1608 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1660 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1712 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1764 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1813 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1862 / 1960
VGMA16 + (VGMA15 - VGMA16) × 1911 / 1960

VGMA15

VGMA15 + (VGMA14 - VGMA15) × 49 / 2188

VGMA15 + (VGMA14 - VGMA15) × 98 / 2188
VGMA15 + (VGMA14 - VGMA15) × 147 / 2188
VGMA15 + (VGMA14 - VGMA15) × 196 / 2188
VGMA15 + (VGMA14 - VGMA15) × 242 / 2188
VGMA15 + (VGMA14 - VGMA15) × 288 / 2188
VGMA15 + (VGMA14 - VGMA15) × 334 / 2188
VGMA15 + (VGMA14 - VGMA15) × 380 / 2188

VGMA15 + (VGMA14 - VGMA15) × 423 / 2188
VGMA15 + (VGMA14 - VGMA15) × 466 / 2188
VGMA15 + (VGMA14 - VGMA15) × 509 / 2188
VGMA15 + (VGMA14 - VGMA15) × 552 / 2188
VGMA15 + (VGMA14 - VGMA15) × 592 / 2188
VGMA15 + (VGMA14 - VGMA15) × 632 / 2188
VGMA15 + (VGMA14 - VGMA15) × 672 / 2188
VGMA15 + (VGMA14 - VGMA15) × 712 / 2188

19

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 2. Relationship between Input Data and Output Voltage Value (10)

Input

data

50H
51H
52H
53H
54H
55H
56H
57H

58H
59H
5AH

5BH
5CH
5DH

5EH

5FH

60H

61H

62H

63H

64H

65H

66H

67H

68H

69H

6AH

6BH
6CH
6DH

6EH

6FH

70H

71H

72H

73H

74H

75H

76H

77H

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 1 0 1 0 0 0 0
0 1 0 1 0 0 0 1
0 1 0 1 0 0 1 0
0 1 0 1 0 0 1 1
0 1 0 1 0 1 0 0
0 1 0 1 0 1 0 1
0 1 0 1 0 1 1 0
0 1 0 1 0 1 1 1
0 1 0 1 1 0 0 0
0 1 0 1 1 0 0 1
0 1 0 1 1 0 1 0
0 1 0 1 1 0 1 1
0 1 0 1 1 1 0 0
0 1 0 1 1 1 0 1
0 1 0 1 1 1 1 0
0 1 0 1 1 1 1 1
0 1 1 0 0 0 0 0
0 1 1 0 0 0 0 1
0 1 1 0 0 0 1 0
0 1 1 0 0 0 1 1
0 1 1 0 0 1 0 0
0 1 1 0 0 1 0 1
0 1 1 0 0 1 1 0
0 1 1 0 0 1 1 1
0 1 1 0 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 0 1 0 1 0
0 1 1 0 1 0 1 1
0 1 1 0 1 1 0 0
0 1 1 0 1 1 0 1
0 1 1 0 1 1 1 0
0 1 1 0 1 1 1 1
0 1 1 1 0 0 0 0
0 1 1 1 0 0 0 1
0 1 1 1 0 0 1 0
0 1 1 1 0 0 1 1
0 1 1 1 0 1 0 0
0 1 1 1 0 1 0 1
0 1 1 1 0 1 1 0
0 1 1 1 0 1 1 1

VL80
VL81
VL82
VL83
VL84
VL85
VL86
VL87

VL88
VL89
VL90
VL91
VL92
VL93
VL94
VL95

VL96
VL97
VL98

VL99
VL100
VL101
VL102
VL103

VL104
VL105
VL106
VL107
VL108
VL109
VL110
VL111

VL112
VL113
VL114
VL115
VL116
VL117
VL118
VL119

VGMA15 + (VGMA14 - VGMA15) × 750 / 2188
VGMA15 + (VGMA14 - VGMA15) × 788 / 2188
VGMA15 + (VGMA14 - VGMA15) × 826 / 2188
VGMA15 + (VGMA14 - VGMA15) × 864 / 2188
VGMA15 + (VGMA14 - VGMA15) × 901 / 2188
VGMA15 + (VGMA14 - VGMA15) × 938 / 2188
VGMA15 + (VGMA14 - VGMA15) × 975 / 2188

VGMA15 + (VGMA14 - VGMA15) × 1012 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1047 / 2188

VGMA15 + (VGMA14 - VGMA15) × 1082 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1117 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1152 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1186 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1220 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1254 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1288 / 2188

VGMA15 + (VGMA14 - VGMA15) × 1320 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1352 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1384 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1416 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1447 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1478 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1509 / 2188

VGMA15 + (VGMA14 – VGMA15) × 1540 / 2188

VGMA15 + (VGMA14 - VGMA15) × 1569 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1598 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1627 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1656 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1684 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1712 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1740 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1768 / 2188

VGMA15 + (VGMA14 - VGMA15) × 1796 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1824 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1852 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1880 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1906 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1932 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1958 / 2188
VGMA15 + (VGMA14 - VGMA15) × 1984 / 2188

20

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

Table 2. Relationship between Input Data and Output Voltage Value (11)

Input

data

78H

79H
7AH
7BH
7CH
7DH
7EH
7FH

80H

81H

82H

83H

84H

85H

86H

87H

88H

89H
8AH
8BH
8CH
8DH
8EH
8FH

90H

91H

92H

93H

94H

95H

96H

97H

98H

99H
9AH
9BH
9CH
9DH
9EH
9FH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

0 1 1 1 1 0 0 0
0 1 1 1 1 0 0 1
0 1 1 1 1 0 1 0
0 1 1 1 1 0 1 1
0 1 1 1 1 1 0 0
0 1 1 1 1 1 0 1
0 1 1 1 1 1 1 0
0 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0
1 0 0 0 0 0 0 1
1 0 0 0 0 0 1 0
1 0 0 0 0 0 1 1
1 0 0 0 0 1 0 0
1 0 0 0 0 1 0 1
1 0 0 0 0 1 1 0
1 0 0 0 0 1 1 1
1 0 0 0 1 0 0 0
1 0 0 0 1 0 0 1
1 0 0 0 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 0 1 1 0 0
1 0 0 0 1 1 0 1
1 0 0 0 1 1 1 0
1 0 0 0 1 1 1 1
1 0 0 1 0 0 0 0
1 0 0 1 0 0 0 1
1 0 0 1 0 0 1 0
1 0 0 1 0 0 1 1
1 0 0 1 0 1 0 0
1 0 0 1 0 1 0 1
1 0 0 1 0 1 1 0
1 0 0 1 0 1 1 1
1 0 0 1 1 0 0 0
1 0 0 1 1 0 0 1
1 0 0 1 1 0 1 0
1 0 0 1 1 0 1 1
1 0 0 1 1 1 0 0
1 0 0 1 1 1 0 1
1 0 0 1 1 1 1 0
1 0 0 1 1 1 1 1

VL120
VL121
VL122
VL123
VL124
VL125
VL126
VL127

VL128
VL129
VL130
VL131
VL132
VL133
VL134
VL135

VL136
VL137
VL138
VL139
VL140
VL141
VL142
VL143

VL144
VL145
VL146
VL147
VL148
VL149
VL150
VL151

VL152
VL153
VL154
VL155
VL156
VL157
VL158
VL159

VGMA15 + (VGMA14 - VGMA15) × 2010 / 2188
VGMA15 + (VGMA14 - VGMA15) × 2036 / 2188
VGMA15 + (VGMA14 - VGMA15) × 2062 / 2188
VGMA15 + (VGMA14 - VGMA15) × 2088 / 2188
VGMA15 + (VGMA14 - VGMA15) × 2113 / 2188
VGMA15 + (VGMA14 - VGMA15) × 2138 / 2188
VGMA15 + (VGMA14 - VGMA15) × 2163 / 2188

VGMA14

VGMA14 + (VGMA13 - VGMA14) × 25 / 2776
VGMA14 + (VGMA13 - VGMA14) × 50 / 2776

VGMA14 + (VGMA13 - VGMA14) × 75 / 2776
VGMA14 + (VGMA13 - VGMA14) × 100 / 2776
VGMA14 + (VGMA13 - VGMA14) × 128 / 2776
VGMA14 + (VGMA13 - VGMA14) × 156 / 2776
VGMA14 + (VGMA13 - VGMA14) × 184 / 2776
VGMA14 + (VGMA13 - VGMA14) × 212 / 2776

VGMA14 + (VGMA13 - VGMA14) × 243 / 2776
VGMA14 + (VGMA13 - VGMA14) × 274 / 2776
VGMA14 + (VGMA13 - VGMA14) × 305 / 2776
VGMA14 + (VGMA13 - VGMA14) × 336 / 2776
VGMA14 + (VGMA13 - VGMA14) × 370 / 2776
VGMA14 + (VGMA13 - VGMA14) × 404 / 2776
VGMA14 + (VGMA13 - VGMA14) × 438 / 2776
VGMA14 + (VGMA13 - VGMA14) × 472 / 2776

VGMA14 + (VGMA13 - VGMA14) × 506 / 2776
VGMA14 + (VGMA13 - VGMA14) × 540 / 2776
VGMA14 + (VGMA13 - VGMA14) × 574 / 2776
VGMA14 + (VGMA13 - VGMA14) × 608 / 2776
VGMA14 + (VGMA13 - VGMA14) × 645 / 2776
VGMA14 + (VGMA13 - VGMA14) × 682 / 2776
VGMA14 + (VGMA13 - VGMA14) × 719 / 2776
VGMA14 + (VGMA13 - VGMA14) × 756 / 2776

VGMA14 + (VGMA13 - VGMA14) × 796 / 2776
VGMA14 + (VGMA13 - VGMA14) × 836 / 2776
VGMA14 + (VGMA13 - VGMA14) × 876 / 2776
VGMA14 + (VGMA13 - VGMA14) × 916 / 2776
VGMA14 + (VGMA13 - VGMA14) × 959 / 2776

VGMA14 + (VGMA13 - VGMA14) × 1002 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1045 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1088 / 2776

21

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 2. Relationship between Input Data and Output Voltage Value (12)

Input

data

A0H
A1H
A2H
A3H
A4H
A5H
A6H
A7H

A8H

A9H
AAH
ABH
ACH
ADH
AEH
AFH

B0H

B1H

B2H

B3H

B4H

B5H

B6H

B7H

B8H

B9H
BAH
BBH
BCH
BDH
BEH
BFH

C0H
C1H
C2H
C3H
C4H
C5H
C6H
C7H

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1
1 0 1 1 1 0 0 0
1 0 1 1 1 0 0 1
1 0 1 1 1 0 1 0
1 0 1 1 1 0 1 1
1 0 1 1 1 1 0 0
1 0 1 1 1 1 0 1
1 0 1 1 1 1 1 0
1 0 1 1 1 1 1 1
1 1 0 0 0 0 0 0
1 1 0 0 0 0 0 1
1 1 0 0 0 0 1 0
1 1 0 0 0 0 1 1
1 1 0 0 0 1 0 0
1 1 0 0 0 1 0 1
1 1 0 0 0 1 1 0
1 1 0 0 0 1 1 1

0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0
0
0
0
0
0
0
0

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0

1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
0

0 0 0
0

0 0 1
0

0 1 0
0

0 1 1
0

1 0 0
0

1 0 1
0

1 1 0
0

1 1 1

VL160
VL161
VL162
VL163
VL164
VL165
VL166
VL167

VL168
VL169
VL170
VL171
VL172
VL173
VL174
VL175

VL176
VL177
VL178
VL179
VL180
VL181
VL182
VL183

VL184
VL185
VL186
VL187
VL188
VL189
VL190
VL191

VL192
VL193
VL194
VL195
VL196
VL197
VL198
VL199

VGMA14 + (VGMA13 - VGMA14) × 1131 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1174 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1217 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1260 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1306 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1352 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1398 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1444 / 2776

VGMA14 + (VGMA13 - VGMA14) × 1493 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1542 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1591 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1640 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1692 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1744 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1796 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1848 / 2776

VGMA14 + (VGMA13 - VGMA14) × 1903 / 2776
VGMA14 + (VGMA13 - VGMA14) × 1958 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2013 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2068 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2126 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2184 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2242 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2300 / 2776

VGMA14 + (VGMA13 - VGMA14) × 2358 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2416 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2474 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2532 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2593 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2654 / 2776
VGMA14 + (VGMA13 - VGMA14) × 2715 / 2776

VGMA13

VGMA13 + (VGMA12 - VGMA13) × 61 / 2185
VGMA13 + (VGMA12 - VGMA13) × 122 / 2185
VGMA13 + (VGMA12 - VGMA13) × 183 / 2185
VGMA13 + (VGMA12 - VGMA13) × 244 / 2185
VGMA13 + (VGMA12 - VGMA13) × 308 / 2185
VGMA13 + (VGMA12 - VGMA13) × 372 / 2185
VGMA13 + (VGMA12 - VGMA13) × 436 / 2185
VGMA13 + (VGMA12 - VGMA13) × 500 / 2185

22

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

Table 2. Relationship between Input Data and Output Voltage Value (13)

Input

data

C8H

C9H
CAH
CBH

CCH
CDH

CEH
CFH

D0H

D1H

D2H

D3H

D4H

D5H

D6H

D7H

D8H

D9H
DAH
DBH

DCH
DDH

DEH
DFH

E0H

E1H

E2H

E3H

E4H

E5H

E6H

E7H

E8H

E9H
EAH
EBH
ECH
EDH
EEH
EFH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0 1 0 0 0 0
1 1 0 1 0 0 0 1
1 1 0 1 0 0 1 0
1 1 0 1 0 0 1 1
1 1 0 1 0 1 0 0
1 1 0 1 0 1 0 1
1 1 0 1 0 1 1 0
1 1 0 1 0 1 1 1
1 1 0 1 1 0 0 0
1 1 0 1 1 0 0 1
1 1 0 1 1 0 1 0
1 1 0 1 1 0 1 1
1 1 0 1 1 1 0 0
1 1 0 1 1 1 0 1
1 1 0 1 1 1 1 0
1 1 0 1 1 1 1 1
1 1 1 0 0 0 0 0
1 1 1 0 0 0 0 1
1 1 1 0 0 0 1 0
1 1 1 0 0 0 1 1
1 1 1 0 0 1 0 0
1 1 1 0 0 1 0 1
1 1 1 0 0 1 1 0
1 1 1 0 0 1 1 1
1 1 1 0 1 0 0 0
1 1 1 0 1 0 0 1
1 1 1 0 1 0 1 0
1 1 1 0 1 0 1 1
1 1 1 0 1 1 0 0
1 1 1 0 1 1 0 1
1 1 1 0 1 1 1 0
1 1 1 0 1 1 1 1

0

1 0 0 0

0

1 0 0 1

0

1 0 1 0

0

1 0 1 1

0

1 1 0 0

0

1 1 0 1

0

1 1 1 0

0

1 1 1 1

VL200
VL201
VL202
VL203
VL204
VL205
VL206
VL207

VL208
VL209
VL210
VL211
VL212
VL213
VL214
VL215

VL216
VL217
VL218
VL219
VL220
VL221
VL222
VL223

VL224
VL225
VL226
VL227
VL228
VL229
VL230
VL231

VL232
VL233
VL234
VL235
VL236
VL237
VL238
VL239

VGMA13 + (VGMA12 - VGMA13) × 564 / 2185
VGMA13 + (VGMA12 - VGMA13) × 628 / 2185
VGMA13 + (VGMA12 - VGMA13) × 692 / 2185
VGMA13 + (VGMA12 - VGMA13) × 756 / 2185
VGMA13 + (VGMA12 - VGMA13) × 823 / 2185
VGMA13 + (VGMA12 - VGMA13) × 890 / 2185
VGMA13 + (VGMA12 - VGMA13) × 957 / 2185

VGMA13 + (VGMA12 - VGMA13) × 1024 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1091 / 2185

VGMA13 + (VGMA12 - VGMA13) × 1158 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1225 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1292 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1362 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1432 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1502 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1572 / 2185

VGMA13 + (VGMA12 - VGMA13) × 1645 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1718 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1791 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1864 / 2185
VGMA13 + (VGMA12 - VGMA13) × 1938 / 2185
VGMA13 + (VGMA12 - VGMA13) × 2016 / 2185
VGMA13 + (VGMA12 - VGMA13) × 2098 / 2185

VGMA12

VGMA12 + (VGMA11 - VGMA12) × 87 / 3336
VGMA12 + (VGMA11 - VGMA12) × 176 / 3336
VGMA12 + (VGMA11 - VGMA12) × 267 / 3336
VGMA12 + (VGMA11 - VGMA12) × 359 / 3336
VGMA12 + (VGMA11 - VGMA12) × 453 / 3336
VGMA12 + (VGMA11 - VGMA12) × 548 / 3336
VGMA12 + (VGMA11 - VGMA12) × 644 / 3336
VGMA12 + (VGMA11 - VGMA12) × 741 / 3336

VGMA12 + (VGMA11 - VGMA12) × 838 / 3336
VGMA12 + (VGMA11 - VGMA12) × 936 / 3336

VGMA12 + (VGMA11 - VGMA12) × 1035 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1135 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1237 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1341 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1445 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1551 / 3336

23

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

Table 2. Relationship between Input Data and Output Voltage Value (14)

Input

data

F0H
F1H
F2H
F3H
F4H
F5H
F6H
F7H

F8H

F9H
FAH
FBH
FCH
FDH
FEH
FFH

DX7 DX6 DX5 DX4 DX3 DX2 DX1 DX0 G/S Output voltage

1 1 1 1 0 0 0 0
1 1 1 1 0 0 0 1
1 1 1 1 0 0 1 0
1 1 1 1 0 0 1 1
1 1 1 1 0 1 0 0
1 1 1 1 0 1 0 1
1 1 1 1 0 1 1 0
1 1 1 1 0 1 1 1
1 1 1 1 1 0 0 0
1 1 1 1 1 0 0 1
1 1 1 1 1 0 1 0
1 1 1 1 1 0 1 1
1 1 1 1 1 1 0 0
1 1 1 1 1 1 0 1
1 1 1 1 1 1 1 0
1 1 1 1 1 1 1 1

VL240
VL241
VL242
VL243
VL244
VL245
VL246
VL247

VL248
VL249
VL250
VL251
VL252
VL253
VL254
VL255

VGMA12 + (VGMA11 - VGMA12) × 1659 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1769 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1879 / 3336
VGMA12 + (VGMA11 - VGMA12) × 1991 / 3336
VGMA12 + (VGMA11 - VGMA12) × 2105 / 3336
VGMA12 + (VGMA11 - VGMA12) × 2221 / 3336
VGMA12 + (VGMA11 - VGMA12) × 2339 / 3336
VGMA12 + (VGMA11 - VGMA12) × 2457 / 3336

VGMA12 + (VGMA11 - VGMA12) × 2577 / 3336
VGMA12 + (VGMA11 - VGMA12) × 2697 / 3336
VGMA12 + (VGMA11 - VGMA12) × 2819 / 3336
VGMA12 + (VGMA11 - VGMA12) × 2943 / 3336
VGMA12 + (VGMA11 - VGMA12) × 3070 / 3336
VGMA12 + (VGMA11 - VGMA12) × 3201 / 3336

VGMA11
VGMA10

24

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

ABSOLUTE MAXIMUM RATINGS

Table 3. Absolute Maximum Ratings (VSS1 = VSS2 = 0 V)

Parameter Symbol Ratings Unit

Logic supply voltage VDD1 -0.3 to 5.0 V

Driver supply voltage VDD2 -0.3 to 16.0 V

Input voltage

Output voltage

Operating power dissipation Pd 300

Operation temperature Top -20 to 75 °C

Storage temperature Tstg -55 to 125

If LSIs are stressed beyond those listed above “absolute maximum ratings”. they may be permanently
destroyed. These are stress ratings only, and functional operation of the device at these or any other
condition beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute maximum rated conditions for extended periods may affect device reliability.
Turn on power order: VDD1 → control signal input → VDD2 → VGMA1 to VGMA18
Turn off power order: VGMA1 to VGMA18 → VDD2 → control signal input → VDD1

VGMA1 - 18 -0.3 to VDD2+0.3

Others -0.3 to VDD1+0.3

DIO1, 2 -0.3 to VDD1+0.3

Y1 – Y384 -0.3 to VDD2+0.3

(1)

CAUTIONS:

V

V

mW

°C

RECOMMENDED OPERATION CONDITIONS

Table 4. Recommended Operation Conditions (Ta = -20 to 75 °C, VSS1 = VSS2 = 0 V)

Parameter Symbol Min. Typ. Max. Unit

Logic supply voltage VDD1 2.7 3.3 3.6 V

Driver supply voltage VDD2

Gamma corrected voltage

VGMA1 – VGMA9 0.5 VDD2 - VDD2 - 0.1 V

VGMA10 – VGMA18 VSS2 + 0.1 - 0.5 VDD2 V

Driver part output voltage Vyo VSS2 + 0.1 - VDD2 - 0.1 V

Maximum clock frequency fmax VDD1 = 2.7 V 65 MHz

Output load capacitance CL

NOTE: 1. Relationship between TFT-LCD panel and Pd (Pd ∝ CL * (VDD2)2 * fCLK1)

TFT-LCD panel standard

SXGA max. VDD2 = 15 V max. VDD2 = 13 V

(1)

(1)

CL = 140pF CL = 200pF

8.0 12.0 15.0 V

- - 200 pF / PIN

25

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

DC CHARACTERISTICS

Table 5. DC Characteristics (Ta = -20 to 75 °C, VDD1 = 2.7 to 3.6 V, VDD2 = 8 to 15 V, VSS1 = VSS2 = 0 V)

Parameter Symbol Condition Min. Typ. Max. Unit

High level input voltage VIH 0.8 VDD1 - VDD1

Low level input voltage VIL 0 - 0.2 VDD1

Input leakage current IL

High level output

voltage

VOH DIO1 (DIO2), IO = -1.0 mA VDD1 - 0.5 - -

Low level output voltage VOL DIO1 (DIO2), IO = +1.0 mA - - 0.5

Resistor

R0 -

R254
IVOH

Driver output current

IVOL

Output voltage deviation ∆VO

Output RMS voltage

deviation

dVrms

Output voltage range Vyo Input data: 00H to FFH

Logic part dynamic

current

Driver part dynamic

current

IDD1 VDD1 = 3.0 V
IDD2 VDD2 = 10 V

SHL, CLK2, D00 - D57, CLK1,

DATPOL1, DATPOL2, POL,

DIO1 (DIO2)

Refer to Table 1. Resistor

Strings

VDD2 = 10.0 V,

Vx = 3.5 V, Vyo = 9.5 V

VDD2 = 10.0 V,

Vx = 6.5 V, Vyo = 0.5 V

(1)

(1)

VSS2 + 0.1 V to VDD2 - 1.5 V -

VDD2 - 1.5 V to VDD2 - 0.1 V -

(2)

Input data: 00H to FFH - ±3 ±10

(3)

(4)

-1 - 1

µA

Rn × 0.7 Rn × 1.3 Ω

- -2.0 -1.0 mA

1.0 2.0 - mA
±7 ±15

VSS2 +

0.1

±10 ±20

-

VDD2 –

0.1

mV

- 4.0 7.0
mA

- 10.0 15.0

V

V

V

NOTES:

1. Vyo is the output voltage of analog output pins Y1 to Y384.
Vx is the voltage applied to analog output pins Y1 to Y384.

2. dVrms is a maximum deviation value from ideal difference between high output and low output at the same gray scale.

3. CLK1 period is defined to be 15.6 µs at fCLK2 = 54 MHz, data pattern = 10101010
(checkerboard pattern), Ta = 25 °C.
4, Yout Load Condition

2k

YOUT

VCOM = 0.5 VDD2

2k

Ω

Ω

4k

Ω

20pF 40pF 20pF

4k

Ω

4k

4k

Ω

Ω

Figure 5. Yout Load Condition

26

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

AC CHARACTERISTICS

Table 6. AC Characteristics (Ta = -20 to 75 °C, VDD1 = 2.7 to 3.6 V ,VDD2 = 8 to 15 V, VSS1 = VSS2 = 0 V)

Parameter Symbol Condition Min. Typ. Max. Unit

Clock pulse width PWCLK - 15 - -

Clock pulse low period PWCLK(L) - 3 - -

Clock pulse high period PWCLK(H) - 3 - -

Data setup time tSETUP1 - 0 - -

Data hold time tHOLD1 - 2 - -

Start pulse setup time tSETUP2 - 0 - -

Start pulse hold time tHOLD2 - 2 - -

DATPOL-CLK2 setup

time

DATPOL-CLK2 hold

time

Start pulse delay time tPLH1 CL = 20 pF - - 12

CLK1 setup time tSETUP3 - 2 - -

Driver output delay

time1

Driver output delay

time2

CLK1 pulse high period PWCLK1 - (3CLK2) - 2

Data invalid period tINV - 1 - -

Last data timing tLDT - 1 - -

CLK1-CLK2 time tCLK1-CLK2

POL-CLK1 time tPOL-CLK1

tSETUP4 - 0 - -

tHOLD4 - 2 - -

tPHL1 - - 4
tPHL2

PWCLK1 = 1 µs,

Refer Figure 5. Yout Load

Condition

CLK1↑ or ↓ → CLK2↑

POL↑ or ↓ → CLK1↑

- - 8

7 - - ns
7 - - ns

ns

CLK2

period

µs

CLK2

period

27

S6C0671 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

INVALID DATA

(DIO1 output)

POL

tPOL-CLK1

WAVEFORMS (VIH = 0.8 VDD1, VIL = 0.2 VDD1)

PWCLK(H)

VIL

VIH

PWCLK(L)

1st LAST-1 LAST

tINV

tHOLD1

1st

DATA

tSETUP1

tHOLD4

tSETUP4

tHOLD2

tPLH1

Target output voltage

Target output voltage 90%

tPHL1

PWCLK1

tPHL2

HI-Z

tCLK1-CLK2

tLDT

0.5VDD1

LAST

DATA

28

PWCLK

CLK2

INVALID DATA

DXX

DATPOL1

DATPOL2

tSETUP2

DIO1 input

(DIO2 input)

tSETUP3

CLK1

Y(1:384)

DIO2 output

Figure 6. Waveforms, DEC = L

CLK2

CLK1

DXX

8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER S6C0671

VGMA1 - VGMA9

VGMA10 - VGMA18

VGMA10 - VGMA18

Charge sharing period

RELATIONSHIPS BETWEEN CLK1, START PULSE (DIO1, DIO2) AND
BLANKING PERIOD

1CLK2

0.5VDD1

2nd

1st

2CLK2(Min.)

INVALID DATA

tLDT

Nth

N-1th

DATA

First data in

the next line

DATA

blanking time = Min. 4CLK2

DATA

DATA

Last data

HI-Z HI-Z HI-Z

HI-Z

VGMA1 - VGMA9

VGMA10 - VGMA18VGMA1 - VGMA9

CLK2

DIO1 input

(DIO2 input)

CLK1

DXX

CLK1

Figure 7. Waveforms

POL

Y2N-1:odd

number output

Y2N:even

number output

29