Datasheet S3C84A4, S3P84A4 Datasheet (Samsung)

S3C84A4/P84A4 PRODUCT OVERVIEW

1 PRODUCT OVERVIEW

SAM88 RC PRODUCT FAMILY

Samsung's new SAM88RC family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a
wide range of integrated peripherals, and various mask-programmable ROM sizes. Timer/counters with
selectable operating modes are included to support real-time operations. Many SAM88RC microcontrollers have
an external interface that provides access to external memory and other peripheral devices. The sophisticated
interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and
vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels.

S3C84A4X MICROCONTROLLER

The S3C84A4 single-chip microcontroller is fabricated using a highly advanced CMOS process. Its design is
based on the powerful SAM88RC CPU core. Stop and Idle power-down modes were implemented to reduce
power consumption. The size of the internal register file is logically expanded, increasing the addressable on-chip
register space to 784 bytes. A flexible yet sophisticated external interface is used to access up to 64-Kbytes of
program and data memory. The S3C84A4 is a versatile microcontroller that is ideal for use in a wide range of
general-purpose applications such as CD-ROM/DVD-ROM drives.

Using the SAM88RC modular design approach, the following peripherals were integrated with the SAM88RC
CPU core:

— Three configurable 8-bit general I/O ports
— One 5-bit general I/O ports
— Two 8-bit timers with interval timer
— Two 16-bit timers/counters with PWM operating modes 8-bit or capture modes
— Voltage level detector circuit embedded.
— Two embedded chip selection pins (CS0–CS1) or normal I/O ports
— Two programmable 8-bit PWM modules with corresponding output pins
— A/D converter with 4 selectable input pins

OTP

The S3C84A4 microcontroller is also avaiable in OTP(One Time Programmable) version, S3P84A4.
The S3P84A4 microcontroller has an on-chip 4K-byte one-time-programmable EPROM instead of masked ROM.
The S3P84A4 is comparable to S3C84A4, both in function and in pin configuration.

1-1

PRODUCT OVERVIEW S3C84A4/P84A4

FEATURES

CPU

• SAM88RC CPU core

Memory

• 784-byte internal register file

• 4-Kbyte internal program memory

External Interface

• 64K-byte external data memory

• 64K-byte external program memory area
(ROMless)

• 60K-byte external program memory and 4K-byte
internal program memory

• Automatic wait control function by software.

ADC

• Can be used as a general input/output port

• 8-bit resolution four channels

8-bit Timers

• Two 8-bit timers with interval timer mode
(Timer A and B)

Interrupts

• Two edge-driven external interrupts

• Two level-driven external interrupts

• Fast interrupt mode processing

PWM

• Four output channels
(PWM0, PWM1, TCPWM, TDPWM)

• 8-bit resolution with a 4-bit prescaler
(PWM0, PWM1)

• From 8-bit counter (Timer C/D)
(TCPWM, TDPWM)

Embedded chip selection

• To reduce interface glue logic, chip selection
logic is embedded (256 byte address unit)

Voltage level detector

• To prevent MCU from malfunctioning in an
unstable power level, a voltage level detector
circuit is inserted

Operating Voltage Range

16-bit Timer/Counters

• Two programmable 16-bit timer/counters

• Interval, or event counter mode operation

• 16-bit capture and 8-bit PWM mode

• Internal or external clock source

Basic Timer (Watchdog Timer)

• Overflow signal makes a system reset

• 8-bit timer with interval timer mode

General I/O Ports

• Three 8-bit general I/O ports (port 0, 1, 2)

• One 5-bit general I/O port (port 3)

• Port 2 can drive LED directly

• 4.5 V to 5.5 volts (@ 30 MHz)

Operating Temperature Range

• – 40 °C to + 85 °C

Package Types

• 64-pin QFP

Operating frequency

• 30 MHz (4.5 V to 5.5 V)

1-2

S3C84A4/P84A4 PRODUCT OVERVIEW

BLOCK DIAGRAM

External Address Data

XIN

XOUT

TCCK

TDCK
TCOUT
TDOUT

RESET

EA

Main
OSC

Timers

A and B

Basic

Timer

Timers

C and D

(A8-A15)

Port I/O

& Interrupt

Control

(A0-A7)

External Interface Block

SAM8 BUS

Watch-dog

Timer

SAM88 RC CPU

784-Byte Register File

SAM8 BUS

(D0-D7)

Port 0

Port 1

Port 2

Port 3

VDD1
VSS1

P0.0-P0.3/
ADC0-ADC3
P0.4-P0.7

P1.0-P1.7
TDCK,TCCK
TDCAP,TCCAP
TCOUT,TDOUT
PWM0,PWM1

P2.0-P2.3/
INT0-INT3
P2.4-P2.6
P2.7/WAIT

P3.0-P3.1/
A16-A17
P3.2, P3.3/
CS0-CS1
P3.4

AVSS (Internally)

AVREF

A/D

Converter

ADC0/P0.0­ADC3/P0.3

4-Kbyte

ROM

PWM0 PWM1

Figure 1-1. S3C84A4 Block Diagram

PWM

Module

1-3

PRODUCT OVERVIEW S3C84A4/P84A4

PIN ASSIGNMENT

A10

A11

A12

A13

A14

A15

64

63

62

61

60

59

A9

58

A8

57

A7

56

A6

55

A5

54

A4

53

A3

53

PM
DM

RD

WR

P3.4
CS1/P3.3
CS0/P3.2

A17/P3.1

VDD

VSS

XOUT

XIN
TEST/EA
A16/P3.0

WAIT/P2.7

RESET

P2.6
P2.5
P2.4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

23

22

21

20

P2.0/INT0

P2.1/INT1

P2.2/INT2

P2.3/INT3

S3C84A4

(64-QFP)

28

27

26

25

24

P1.3/TCCAP

P1.4/TCOUT

P1.5/TDOUT

P1.6/PWM0

P1.7/PWM1

32

31

30

29

P0.7

P1.0/TDCK

P1.1/TCCK

P1.2/TDCAP

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
AVREF
P0.0/ADC0
P0.1/ADC1
P0.2/ADC2
P0.3/ADC3
P0.4
P0.5
P0.6

1-4

Figure 1-2. S3C84A4 Pin Assignments

S3C84A4/P84A4 PRODUCT OVERVIEW

PIN DESCRIPTIONS

Table 1-1. S3C84A4/P84A4 Pin Descriptions

Pin

Name

P0.0–P0.7 I/O Bit programmable port; input or output mode

P1.0–P1.7 I/O Bit programmable port; input or output mode

P2.0–P2.7 I/O General I/O port with normal input or push-pull

P3.0–P3.4 I/O General I/O port with bit programmable pins.

Pin

Type

Pin

Description

selected by software; normal input or push-pull
Software assignable pull-up.
Alternately, P0.0–P0.3 can be use as a ADC input
port with 8-bit resolution.

selected by software ; normal input or push-pull.
Software assignable pull-up. Respectively, each pin
can serve as:
P1.0 / timer D clock input (TDCK)
P1.1 / timer C clock input (TCCK)
P1.2 / timer D capture input (TDCAP)
P1.3 / timer C capture input (TCCAP)
P1.4 / timer C out (TCOUT) / PWM out (TCPWM)
P1.5 / timer D out (TDOUT) / PWM out (TDPWM)
P1.6 / PWM0 output port
P1.7 / PWM1 output port

output. Software assignable pull-up.
Bit programmable;
Alternately, P2.0– P2.3 can be used as inputs for
external interrupts,INT0– INT3( with noise filter and
interrupt control). INT0/INT1 are level interrupts

Normal input or push-pull output with software
assignable pull-up. Input or output mode is
selectable by software. P3.0-P3.1 can alternately be
used as outputs of high address (A16,A17).
P3.2–P3.3 can alternately be used as outputs for
embedded chip selection output.
P3.0 / A16
P3.1 / A17
P3.2 / CS0
P3.3 / CS1

Circuit

Type

2,3 39–32 ADC0–

3,5 31–24 TDCK

3,4,5 23–17

3,5 14,

Pin

Number

15

8–5

Share

Pins

ADC3

TCCK
TDCAP
TCCAP

TCOUT/
TCPWM
TDOUT/
TDPWM

PWM0
PWM1

INT0–INT3

A16, A17
CS0,CS1

1-5

PRODUCT OVERVIEW S3C84A4/P84A4

Table 1-1. S3C84A4/P84A4 Pin Descriptions (Continued)

Pin

Name

ADC0-ADC3 I Analog input pins for A/D converter module.

Pin

Type

Pin

Description

Circuit

Type

Pin

Number

Share

2 39–36 P0.0-P0.3

Pins

Alternatively, used as general-purpose I/O

AV

REF

– A/D converter reference voltage

– 40 –

AVSS is connected to ground internally

PWM0,

O Pulse width modulation output pins 5 25,24 P1.6, P1.7

PWM1
INT0-INT3 I External interrupt input pins 4 23-20 P2.0–P2.3
TCCK, TDCK I External clock input for timer C and timer D 3 30,31 P1.1/P1.0
TCCAP,

I Timer C/ Timer D capture input 3 28,29 P1.3/P1.2

TDCAP
TCOUT,

TDOUT

WAIT

O Timer C/D 8-bit PWM mode output or counter

match toggle output

I Input pin for the slow memory timing signal

5 27,26 P1.4, P1.5

5 15 P2.7

from the external interface

I

RESET

System reset pin (pull-up resistor: 50 kΩ)

EA I 5V: ROMless operating

1 16 –

– 13 –
0V: internal 4K and external 60K
addressing mode

VDD, V
XIN, X

SS

OUT

– Power input pins – 9,10 –

– Main oscillator pins – 12,11 –
A0–A15 O Address output for external device 6 49–64 –
D0–D7 I/O Data I/O for external device 7 41–48 –

PM, DM
RD,WR
A16, A17
CS0–CS1

O External memory selection output – 1,2 –
O External memory read/write output – 3, 4 –
O Extended memory high address output 5 14, 8 P3.0, P3.1
O Embedded chip selection output 5 7, 6 P3.2, P3.3

1-6

S3C84A4/P84A4 PRODUCT OVERVIEW

PIN CIRCUITS

Table 1-2. Pin Circuit Assignments for the S3C84A4/P84A4

Circuit Number Circuit Type S3C8414X Assignments

1 Input
2 I/O A/D converter input pins, ADC0–ADC3, P0.0–P0.3
3 I/O Port 0, 2, and 3
4 I/O P2 (INT0–INT3)
5 I/O P1 (TDCK, TCCK, TDCAP, TCCAP, TCOUT, TDOUT, TCPWM,

6 Output
7 I/O D0–D7

RESET pin

TDPWM, PWM0, PWM1)
A0–A15, PM, DM, RD, WR

1-7

PRODUCT OVERVIEW S3C84A4/P84A4

VDD

Pull-up
Resistor
(Typical 50 kΩ)

Input

Figure 1-4. Pin Circuit Type 1 (RESETRESET)

VDD

Pull-Down

Enable

Data

Output

Disable

Normal

Input

ADC Port

Selection

ADC In

Pull-up
Resistor

VDD

I/O

Vss

1-8

Enable ADC

Figure 1-5. Pin Circuit Type 2 (ADC0–ADC3)

S3C84A4/P84A4 PRODUCT OVERVIEW

VDD

Pull-Up

Enable

VDD

Data

I/O

Output

Disable

Normal

Input

Figure 1-6. Pin Circuit Type 3

1-9

PRODUCT OVERVIEW S3C84A4/P84A4

VDD

External

Interrupt

Input

Normal

Input

Pull-Up

Enable

Data

Output

Disable

Noise Filter

Figure 1-7. Pin Circuit Type 4

Pull-Up
Resistor

VDD

I/O

Vss

1-10

S3C84A4/P84A4 PRODUCT OVERVIEW

VDD

Pull-Up

Selection Bits
for Ports or
Other Function

Data

Other

Function

Input

Pull-Up

Enable

VDD

Output

Disable

Vss

Resistor

I/O

Figure 1-8. Pin Circuit Type 5

V

DD

In

Figure 1-9. Pin Circuit Type 6

Out

1-11

PRODUCT OVERVIEW S3C84A4/P84A4

VDD

Data

I/O

Output

Disable

Normal

Input

Figure 1-10. Pin Circuit Type 7

1-12

S3C84A4/P84A4 ELECTRICAL DATA

17 ELECTRICAL DATA

OVERVIEW

In this section, S3C84A4 electrical characteristics are presented in tables and graphs. The information is
arranged in the following order:

— Absolute maximum ratings
— D.C. electrical characteristics
— A.C. electrical characteristics
— I/O capacitance
— Oscillation characteristics
— Oscillation stabilization time

17-1

ELECTRICAL DATA S3C84A4/P84A4

Table 17-1. Absolute Maximum Ratings

(TA = 25°C)

Parameter Symbol Conditions Rating Unit

Supply voltage V
Input voltage V
Output voltage V
Output current high I

DD

OH

I

O

One I/O pin active – 18 mA

– 0.3 to + 6.5 V

– 0.3 to V

DD

+ 0.3

– 0.3 to VDD + 0.3 V

All I/O pins active – 60

Output current low I

OL

One I/O pin active + 30 mA
Total pin current for port + 100

Operating

T

A

– 40 to + 85 °

C

temperature
Storage temperature T

STG

– 65 to + 150 °

C

17-2

S3C84A4/P84A4 ELECTRICAL DATA

Table 17-2. D.C. Electrical Characteristics

(T

= – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Operating voltage V

DD

F

OSC

= 30 MHz

4.5 – 5.5 V

(instruction clock = 7.5 MHz)

Input high V
voltage V

Input low voltage V

Output high V

IH1
IH2

V

IH3
IL1

V

IL2
OH

voltage IOH = – 100 uA V
Output low voltage V

OL1

All input pins except V

IH2, VIH3

RESET

X

IN

All input pins except V
X

IN

IL2

VDD= 5 V, IOH = – 1 mA V

V

= 5 V, IOL = 2 mA

DD

0.51 V

DD

0.8 V

DD

V

– 0.5

DD

– – 0.2 V

– V

DD

DD

0.4

– 1.0 – – V

DD

– 0.5 – –

DD

– – 0.4 V

V

V

All output pins except port 2

V

OL2

V

DD

= 5 V

– 0.5 1.0

IOL = 15 mA, port 2

Input high leakage
current

Input low leakage
current

Output high
leakage current

Output low leakage
current

Pull-up and pull­down resistor

I

LIH1

I

LIH2

I

LIL1

I

LIL2

I

LOH

I

LOL

R

R

L1

L2

VIN = V
All input pins except X

VIN = V
X

V
All input pins except X

V
V

IN

= 0 V

IN

= 0 V, X

IN

= V

OUT

DD

IN

DD

IN

IN

DD

All I/O pins and output pins
V

= 0 V

OUT

All I/O pins and output pins
V

= 0 V; V

IN

DD

= 5 V

Ports 0–3, TA = 25 °C
V

= 0 V; V

IN

DD

= 5 V

TA = 25 °C, RESET only

– – 3

20

– – – 3

– 20

– – 5

– – 0 – 5

30 46 80

30 50 80

µA

kΩ

17-3

ELECTRICAL DATA S3C84A4/P84A4

Table 17-2. D.C. Electrical Characteristics (Continued)

(T

= – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Supply current

(note)

I

DD1

I

DD2

V

= 5 V ± 10%

DD

30 MHz oscillation
Idle mode; V

= 5 V ± 10%

DD

– 30 60 mA

10 20

30 MHz oscillation

I

DD3

NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.

Stop mode;
V

= 5 V ± 10%

DD

LVD enable, T

= 25°C

A

100 200

µA

Table 17-3. A.C. Electrical Characteristics

(T

= -40°C to + 85°C)

A

Parameter Symbol Conditions Min Typ Max Unit

Interrupt input
high, low width
(P2.0-P2.7)

RESET input low

t

INTH,

t

INTL

t

RSL

VDD = 5V 180 – – nS

VDD = 5V 1000 – – nS

width

NOTES:

1. The unit t

2. The oscillator frequency is the same as the CPU clock frequency.

means one CPU clock period.

CPU

t

INTL

0.2 V

Figure 17-1. Input Timing for External Interrupts (Ports 2)

0.8 V

DD

DD

t

INTH

17-4

S3C84A4/P84A4 ELECTRICAL DATA

t

RSL

RESET

0.2 V

DD

Figure 17-2. Input Timing for RESETRESET

Table 17-4. Input/Output Capacitance

(TA = – 40°C to + 85°C, V

DD

= 0 V)

Parameter Symbol Conditions Min Typ Max Unit

Input
capacitance

Output

C

C

OUT

IN

f = 1 MHz; unmeasured
pins are connected to V

SS

– – 10 pF

capacitance
I/O capacitance C

IO

Table 17-5. Data Retention Supply Voltage in Stop Mode

(TA = – 40°C to + 85°C)

Parameter Symbol Conditions Min Typ Max Unit

Data retention

V

DDDR

2 – 5.5 V

supply voltage
Data retention

I

DDDR

Stop mode, V

= 2.0 V – – 50

DDDR

supply current

NOTES:

1. During the oscillator stabilization wait time (t

2. Supply current does not include drawn through internal pull-up resistors and external output current loads.

), all CPU operations must be stopped.

WAIT

µA

17-5

ELECTRICAL DATA S3C84A4/P84A4

V

DD

RESET

Execution of

Stop Instruction

NOTE

: t

WAIT

Figure 17-3. Stop Mode Release Timing Initiated by RESETRESET

Stop Mode

Data Retention Mode

V

DDDR

is the same as 4096 x 16 x 1 / f .

OSC

0.2 V

DD

Reset

Occurs

t

WAIT

Oscillation

Stabilization

Time

Normal
Operating
Mode

17-6

S3C84A4/P84A4 ELECTRICAL DATA

Table 17-6. A/D Converter Electrical Characteristics

(T

= – 40°C to + 85°C)

A

Parameter Symbol Conditions Min Typ Max Unit

Resolution – 8 – bit
Total accuracy V

= 5 V – – ± 3 LSB

DD

Integral linearity error ILE Conversion time = 5 us – ± 2
Integral linearity error DLE AV

Offset error of top EOT AV

= 5 V – ± 1

REF

= 0 V ± 1 ± 3

SS

Offset error of bottom EOB ± 0.5 ± 2
Conversion time

(1)

Analog input voltage V
Analog input

t

CON

R

IAN

AN

17 30 250

AVss – AVref V

– 2 1000 –

µs

MΩ

impedance
Analog reference

AV

REF

– 3.0 – V

DD

V

voltage
Analog input current I

Analog block I
current

(2)

ADIN

ADC

AV

AV

REF

AV

REF

AV

REF

= VDD = 5V

REF

= VDD = 5V – – 10 uA
= VDD = 5V 1 3 mA
= VDD = 3V 0.5 1.5 mA

100 500 nA

When Power Down mode

NOTES:

1. 'Conversion time' is the time required from the moment a conversion operation starts until it ends.

2. I

is an operating current during A/D conversion.

ADC

17-7

ELECTRICAL DATA S3C84A4/P84A4

VDD

Reference

R

Voltage

Input

10 pF

+

-

C

103

VDD

Analog

Input Voltage

C

101

VSS

NOTE: The symbol "R" signifies an offset resistor with a value of from 50 to 100.
If this resistor is omitted, the absolute accuracy will be maximum of 3 LSBs.

AVREF

S3C84A4

ADC0-ADC3

17-8

Figure 17-4. Recommended A/D Converter Circuit for Highest Absolute Accuracy

S3C84A4/P84A4 ELECTRICAL DATA

(TA = – 40°C + 85°C, V

Table 17-7. Main Oscillator Frequency (f

= 4.5 V to 5.5 V)

DD

OSC1

)

Oscillator Clock Circuit Test Condition Min Typ Max Unit

Crystal

Ceramic

External clock

C1

XIN

XOUT

C2

C1

XIN

XOUT

C2

XIN

XOUT

CPU clock oscillation

4 – 25 MHz

frequency

CPU clock oscillation

4 – 30 MHz

frequency

XIN input frequency 4 – 30 MHz

Table 17-8. Main Oscillator Clock Stabilization Time (t

ST1

)

(TA = -40°C + 85°C, VDD = 4.5 V to 5.5 V)

Oscillator Test Condition Min Typ Max Unit

Crystal VDD = 4.5 V to 5.5 V – – 10 ms
Ceramic Stabilization occurs when VDD is equal to the minimum

– – 4 ms

oscillator voltage range.

External clock XIN input high and low level width (tXH, tXL) 50 – – ns

NOTE: Oscillation stabilization time (t
frequency after a power-on occurs, or when Stop mode is ended by a RESET signal. The RESET should therefore

be held at low level until the t

) is the time required for the CPU clock to return to its normal oscillation

ST1

time has elapsed.

ST1

17-9

ELECTRICAL DATA S3C84A4/P84A4

1 / f

OSC1

X

IN

Figure 17-6. Clock Timing Measurement at X

Table 17-9. Characteristics of Voltage Level Detect circuit

(TA = – 40°C + 85°C) When Power off

Parameter Symbol Conditions Min Typ Max Unit

Operating Voltage of VLD V
Detect Voltage V
Current consumption I

DD

DET

VLD

t

XL

t

XH

IN

V

DD

– 0.5

0.4 V

V

– 4.5 – 5.5 V
– 3.1 3.7 4.1 V

VDD = 5.5 V – 100 200 uA

(TA = – 40°C + 85°C) When Power on

Parameter Symbol Conditions Min Typ Max Unit

Operating Voltage of VLD V
Detect Voltage V
Current consumption I

17-10

DD

DET

VLD

– 4.5 – 5.5 V
– 3.4 4.0 4.4 V

VDD = 5.5 V – 100 200 uA

S3C84A4/P84A4 ELECTRICAL DATA

fOSC

30 MHz

20 MHz
18 MHz
16 MHz
14 MHz

12 MHz

4 MHz

1 2 3 4 5 6 7

Supply Voltage (V)

Minimum Instruction Clock = 1/4 x oscillator frequency

Figure 17-7. Operating Voltage Range ( LVD Enable)

17-11

S3C84A4/P84A4 MECHANICAL DATA

18 MECHANICAL DATA

OVERVIEW

The S3C84A4 microcontroller is available in a 64-pin QFP package (64-QFP-1420C) .

23.90 ± 0.30

17.90 ± 0.30

14.00 ± 0.20
#64

1.00

64-QFP-1420C

#1

20.00 ± 0.20

+ 0.10

0.40

- 0.05

0.15 MAX

(1.00)

0-8

+ 0.10

- 0.05

0.15

0.10 MAX

0.80 ± 0.20

0.05 MIN

2.65 ± 0.10

3.00 MAX

0.80 ± 0.20

NOTE: Dimensions are in millimeters.

Figure 18-1. 64-QFP-1420C Package Dimensions

18-1

S3C84A4/P84A4 S3P84A4 OTP

19 S3P84A4 OTP

OVERVIEW

The S3P84A4 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C84A4

microcontrollers. It has an on-chip EPROM instead of masked ROM. The EPROM is accessed by serial data
format.

S3C84A4 is fully compatible with S3C84A4, both in function and in pin configuration. As it has simple
programming requirements, S3P84A4 is ideal for use as an evaluation chip for the S3C84A4.

19-1

S3P84A4 OTP S3C84A4/P84A4

A10

A11

A12

A13

A14

A15

64

63

62

61

60

59

A9

58

A8

57

A7

56

A6

55

A5

54

A4

53

A3

52

PM

DM

RD

WR

P3.4
CS1/P3.3
CS0/P3.2

A17/P3.1

VDD

VSS

XOUT

XIN

TEST/EA

A16/P3.0

WAIT/P2.7

RESET

P2.6

P2.5

P2.4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

SDAT
SCLK
VDD
Vss

Vpp

RESETRESET

20

P2.3/INT3

S3P84A4

24

23

22

21

P1.7/PWM1

P2.0/INT0

P2.1/INT1

P2.2/INT2

(64-QFP)

28

27

26

25

P1.3/TCCAP

P1.4/TCOUT

P1.5/TDOUT

P1.6/PWM0

32

31

30

29

P0.7

P1.0/TDCK

P1.1/TCCK

P1.2/TDCAP

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
AVREF
P0.0/ADC0
P0.1/ADC1
P0.2/ADC2
P0.3/ADC3
P0.4
P0.5
P0.6

Figure 19-1. S3P84A4 Pin Assignments (64-QFP Package)

19-2

S3C84A4/P84A4 S3P84A4 OTP

Table 19-1. Descriptions of Pins Used to Read/Write the EPROM

Main Chip During Programming

Pin Name Pin Name Pin No. I/O Function

P3.2 SDAT 7 I/O Serial Data Pin (Output when reading, Input

when writing) Input and Push-pull Output Port

can be assigned.
P3.1 SCLK 8 I Serial Clock Pin (Input Only Pin)
EA

V

PP

13 I EPROM Cell Writing Power Supply Pin

(Indicates OTP Mode Entering) When writing

12.5V is applied and when reading 5 V is applied

(Option).

RESET RESET

V

DD1/VSS1

VDD/V

SS

16 I Chip Initialization

9/10 I

Logic Power Supply Pin. VDD should be tied to

5V during programming.

Table 19-2. Comparison of S3P84A4 and S3C84A4 Features

Characteristic S3P84A4 S3C84A4

Program Memory 4 K byte EPROM 4 K bytes mask ROM
Operating Voltage (VDD)

OTP Programming Mode

2.7 V to 5.5 V 2.7 V to 5.5V
VDD = 5 V, V

(TEST) = 12.5V

PP

Pin Configuration 64 QFP 64 QFP
EPROM Programmability User Program 1 time Programmed at the factory

OPERATING MODE CHARACTERISTICS

When 12.5 V is supplied to the V

(TEST) pin of S3P84A4, the EPROM programming mode is entered. The

PP

operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 19-3 below.

Table 19-3. Operating Mode Selection Criteria

V

DD

Vpp

(TEST)

REG/

MEMMEM

Address

(A15-A0)

R/WW

Mode

5 V 5 V 0 0000H 1 EPROM read

12.5 V 0 0000H 0 EPROM program

12.5 V 0 0000H 1 EPROM verify

12.5 V 1 0E3FH 0 EPROM read protection

NOTE: "0" means Low level; "1" means High level.

19-3

S3P84A4 OTP S3C84A4/P84A4

D.C. ELECTRICAL CHARACTERISTICS

Table 19-4. D/C Electrical Characteristics

(T

= – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Operating voltage

Input high
voltage

Input low voltage

Output high
voltage

Output low voltage

V

DD

V

IH1

V

IH2

V

IH3

V

IL1

V

IL2

V

OH

V

OL1

V

OL2

F

= 30 MHz

OSC

(instruction clock = 7.5 MHz)
All input pins except V

IH2, VIH3

RESET

X

IN

All input pins except V
X

IN

IL2

VDD= 5 V, IOH = – 1 mA V
IOH = – 100 uA V
V

= 5 V, IOL = 2 mA

DD

All output pins except port 2
V

= 5 V

DD

IOL = 15 mA, port 2

4.5 – 5.5 V

0.51 V

0.8 V

DD

V

– 0.5

DD

– –

DD

–

V

DD

0.2 V

DD

0.4

DD
DD

– 1.0
– 0.5

– – V
– –

– – 0.4 V

– 0.5 1.0

V

V

Input high leakage
current

Input low leakage
current

Output high
leakage current

Output low leakage
current

Pull-up and pull­down resistor

I

LIH1

I

LIH2

I

LIL1

I

LIL2

I

LOH

I

LOL

R

R

L1

L2

VIN = V
All input pins except X

VIN = V
X

V
All input pins except X

V
V

IN

= 0 V

IN

= 0 V, X

IN

= V

OUT

DD

IN

DD

IN

IN

DD

All I/O pins and output pins
V

= 0 V

OUT

All I/O pins and output pins
V

= 0 V; V

IN

DD

= 5 V

Ports 0–3, TA = 25 °C
V

= 0 V; V

IN

DD

= 5 V

TA = 25 °C, RESET only

– – 3

20

– – – 3

– 20

– – 5

– – 0 – 5

30 46 80

30 50 80

µA

kΩ

19-4

S3C84A4/P84A4 S3P84A4 OTP

Table 19-4. D/C Electrical Characteristics (Continued)

(T

= – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Supply current

(note)

I

DD1

I

DD2

V

= 5 V ± 10%

DD

30 MHz oscillation
Idle mode; V

= 5 V ± 10%

DD

– 30 60 mA

10 20

30 MHz oscillation

I

DD3

NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.

Stop mode;
V

= 5 V ± 10%

DD

LVD enable, T

= 25°C

A

100 200

µA

19-5