Page 1
S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW
1 PRODUCT OVERVIEW
SAM87RI PRODUCT FAMILY
Samsung's SAM87RI family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable ROM sizes.
A dual address/data bus architecture and a large number of bit- or nibble-configurable I/O ports provide a flexible
programming environment for applications with varied memory and I/O requirements. Timer/counters with
selectable operating modes are included to support real-time operations. Many SAM87RI microcontrollers have
an external interface that provides access to external memory and other peripheral devices.
S3C9004/P9004/C9014/P9014 MICROCONTROLLER
The S3C9004/P9004/C9014/P9014 single-chip 8-bit microcontroller is fabricated using an advanced CMOS
process. It is built around the powerful SAM87RI CPU core.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The S3C9004/P9004/C9014/P9014 has 4 K
bytes of program memory on-chip.
Using the SAM87RI design approach, the following peripherals were integrated with the SAM87RI core:
— Five configurable I/O ports (32 pins)
— 12 bit-programmable pins for external interrupts
— 8-bit timer/counter with three operating modes
The S3C9004/P9004/C9014/P9014 is a versatile microcontroller that can be used in a wide range of general
purpose applications. It is especially suitable for use as a keyboard controller and is available in a 40-pin DIP and
a 44-pin QFP package.
OTP
The S3C9004/C9014 microcontroller is also available in OTP (One Time Programmable) version,
S3P9004/P9014. S3P9004/P9014 microcontroller has an on-chip 8-Kbyte one-time-programmable EPROM
instead of masked ROM. The S3P9004/P9014 is comparable to S3C9004/C9014, both in function and in pin
configuration.
1-1
Page 2
PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014
FEATURES
CPU
• SAM87RI CPU core
Memory
• 4-Kbyte internal program memory (ROM)
• 208-byte internal register file
• 8-Kbyte external program memory
• 8-Kbyte external data memory
Instruction Set
• 41 instructions
• IDLE and STOP instructions added for powerdown modes
Instruction Execution Time
• 1.5 µs at 4 MHz f
OSC
Interrupts
• 14 interrupt sources with one vector, Each
source has its pending bit
• One level, one vector interrupt structure
General I/O
• Five ports (32 pins total)
• Three bit-programmable ports (20 pins total)
• Two bit-programmable ports with external
interrupts (12 pins total)
Timer/Counter
• One 8-bit basic timer for watchdog function and
programmable oscillation stabilization interval
generation function
• One 8-bit timer/counter with PWM mode
Operating Temperature Range
• – 40°C to + 85°C
Operating Voltage Range
• 4.5 V to 5.5 V for S3C9004/P9004
• 2.7 V to 5.5 V for S3C9014/P9014
Package Types
• 40-pin DIP
Oscillation Circuit Options
• 4 MHz RC oscillator with on chip capacitor for
S3C9004/P9004 ( –10% RC accuracy at VDD ±
5% and Ta = 0°C–70°C, using 1% external
precision resistor)
• RC oscillator for S3C9004/P9004
• Crystal/ceramic oscillator for S3C9014/P9014
1-2
Page 3
S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW
BLOCK DIAGRAM
X
X
IN
OUT
RESET
V
DD
V
SS1
MAIN
OSC
Basic
Timer
Timer 0
P0.0-P0.4/A8-A12,
P0.5-P0.7
PORT
INTERRUPT CONTROL
P1.0-P1.7/
AD0-AD7
PORT PORT
SAM87RI BUS
I/O PORT AND
SAM87RI CPU
P2.0-P2.7/INT,
AS, DS
, R/W,
DM
EA (TEST)
V
DD
V
SS1
PORT
PORT
P3.0
P3.1
P3.2
P3.3/CLO
P4.0/INT
P4.1/INT/T0CLK
P4.2/INT
P4.3/INT/T0OUT
4-KB ROM
208-BYTE
REGISTER
FILE
Figure 1-1. Block Diagram
1-3
Page 4
PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014
PIN ASSIGNMENTS
P3.0
INT/P4.0
T0CLK/INT/P4.1
INT/P4.2
T0OUT/INT/P4.3
/INT/P2.0
AS
/INT/P2.1
DS
R/W/INT/P2.4
/INT/P2.3
DM
INT/P2.4
INT/P2.5
INT/P2.6
INT/P2.7
NC
V
SS1
AD7/P1.7
AD6/P1.6
AD5/P1.5
AD4/P1.4
AD3/P1.3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(Top View)
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
S3C9004/P9004
S3C9014/P9014
28
27
26
40-DIP
25
24
23
22
21
P3.1
P3.2
P3.3/CLO
V
DD
P0.0/A8
P0.1/A9
P0.2/A10
P0.3/A11
P0.4/A12
P0.5
P0.6
P0.7
X
OUT
X
IN
RESET
V
SS2
EA
P1.0/AD0
P1.1/AD1
P1.2/AD2
1-4
Figure 1-2. Pin Assignment Diagram (40-Pin DIP Package)
Page 5
S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW
PIN DESCRIPTIONS
Table 1-1. S3C9004/P9004/C9014/P9014 Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
P0.0-P0.7 I/O Bit-programmable I/O port for Schmitt trigger
input or open-drain output. Port0 can also be
configured as external interface address lines A8A12.
P1.0-P1.7 I/O Bit-programmable I/O port for Schmitt trigger
input, push-pull, or open-drain output. Port1 can
alternatively be used as external interface
address/data lines AD0-AD7.
P2.0-P2.7 I/O Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Port2 can be
individually configured as external interrupt
inputs. Especially, P2.0-2.3 can be configured for
external bus control signal.
P3.0-P3.3 I/O Same general characteristics as Port1. Port3 are
designed for to drive LED directly. P3.3 can be
used to system clock output (CLO) port.
P4.0-P4.3 I/O Bit-programmable I/O port. Input mode or n-
channel open-drain output mode is software
assignable. Port4 can be individually configured
as external interrupt inputs. Pull-up resistors are
also software assignable. Especially, P4.1 can be
used T0CLK input and P4.3 also T0OUT for
Timer 0.
XIN, X
OUT
– System clock input and output pin (for RC
oscillator, crystal/ceramic oscillator, or external
clock source)
INT I External interrupt for bit-programmable port2 and
port4 pins when set to input mode.
RESET
I
RESET signal input pin. Schmitt trigger input with
internal pull-up resistor.
EA I External Memory Access (EA) pin with 2 modes:
0V = Normal Operation Mode
5V = ROMLESS Operation Mode
(Must be connected to VSS during normal
operation mode)
V
SS1
V
DD
V
,
SS2
– Power input pin – 37 –
– Vss1 is a ground power for CPU core.
Vss2 is a ground power for I/O and OSC block
NC – No connection
(This pin would be better connecting to VSS)
Circuit
Number
Pin
Numbers
C 36-29 A8-A12
C 23-16 AD0-AD7
D 6-13
INT, AS,
DS, R/W,
C 1, 40-38 P3.3/CLO
D 2-5 INT,
T0CLK,
T0OUT
– 27, 28 –
– 2-13 PORT2/
PORT4
A 26 –
B 24 –
– 15, 25 –
– 14 –
Share
Pins
DM
1-5
Page 6
PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014
PIN CIRCUITS
Table 1-2. Pin Circuit Assignments for the S3C9004/P9004/C9014/P9014
Circuit Number Circuit Type S3C9004/P9004/C9014/P9014 Assignments
A I
B I EA input
C I/O Ports 0, 1, and 3
D I/O Ports 2 and 4
VDD
RESET signal input
PULL-UP
RESISTOR
IN
Noise
Filter
Figure 1-3. Pin Circuit Type A (RESETRESET)
OUTPUT
DATA
OPEN
DRAIN
OUTPUT
DISABLE
INPUT
DATA
MUX
D0
D1
IN
0 V = Internal ROM Access
5 V = External ROM Access
Figure 1-4. Pin Circuit Type B (EA)
VDD
I/O
V
SS
1-6
MODE INPUT DATA
OUTPUT
INPUT
D0
D1
Figure 1-5. Pin Circuit Type C (Ports 0, 1, and 3)
Page 7
S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW
VDD
PULL-UP
RESISTOR
PULL-UP
ENABLE
VDD
OUTPUT
DATA
OPEN
DRAIN
I/O
OUTPUT
DISABLE
V
SS
INPUT
DATA
MUX
D0
D1
MODE INPUT DATA
OUTPUT D0
INPUT
D1
Figure 1-6. Pin Circuit Type D (Ports 2 and 4)
1-7
Page 8
PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014
APPLICATION CIRCUIT
5V
5V
V
DD
0
1
PORT 3
PORT 0PORT 1PORT 2
EA
2
3
15
S3C9004
X
IN
R
OSC
X
OUT
S3P9004
0
1
RESET
H
O
S
T
CLK
DATA
PORT 4
V
SS1
V
SS2
2
3
7
KEYBOARD
MATRIX
Figure 1-7. Keyboard Control Application Circuit Diagram
1-8
Page 9
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
12 ELECTRICAL DATA
OVERVIEW
In this section, the following S3C9004/P9004/C9014/P9014 electrical characteristics are presented in tables and
graphs:
— Absolute maximum ratings
— D.C. electrical characteristics
— I/O capacitance
— A.C. electrical characteristics
— Input timing for RESET
— Input timing for external interrupts (ports 2 and 4, RESET, and EA)
— Oscillator characteristics
— Oscillation stabilization time
— Clock timing measurement points at X
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by a reset
— Stop mode release timing when initiated by an external interrupt
— External Memory timing characteristics (8 MHz)
— External Memory Read and Write timing
— Characteristic curves
IN
12-1
Page 10
ELECTRICAL DATA S3C9004/P9004/C9014/P9014
Table 12-1. Absolute Maximum Ratings
(TA = 25°C)
Parameter Symbol Conditions Rating Unit
Supply Voltage
Input Voltage
Output Voltage
Output Current
High
Output Current
Low
V
DD
V
I
V
IN
O
OH
All input ports
All output ports
One I/O pin active – 18 mA
– – 0.3 to + 6.5 V
– 0.3 to V
DD
+ 0.3
– 0.3 to VDD + 0.3
V
V
All I/O pins active – 60
I
OL
One I/O pin active + 25 mA
Total pin current for ports 3 + 100
Total pin current for ports 0, 1, 2, 4 + 100
Operating
T
A
– – 40 to + 85
°
C
Temperature
Storage
T
STG
– – 65 to + 150
°
C
Temperature
Table 12-2. D.C. Electrical Characteristics
(T
= – 40°C to + 85°C, VDD = 4.5 V to 5.5 V
A
(1)
)
Parameter Symbol Conditions Min Typ Max Unit
Input High
V
IH1
All inputs except V
IH2
0.8 V
DD
–
V
DD
Voltage
Input Low Voltage
Output High
Voltage
V
IH2
V
IL1
V
IL2
V
OH
X
IN
All inputs except V
X
IN
IL2
IOH = – 200 µA
All outputs except P4.1,
V
– 0.5 V
DD
–
V
DD
– 1.0
– – V
DD
0.2 V
0.4
DD
P4.3, and port0
Output Low
Voltage
Output Low
Current
Input High
Leakage Current
V
I
OL
I
LIH1
OL
IOL = 2 mA
All outputs except port3
VOL= 3 V
Port3 only
V
= V
IN
DD
All inputs except I
LIH2
, P4.0
– – 0.4 V
8 15 23 mA
– – 3 µA
and P4.1
I
LIH2
V
= V
IN
DD
X
, X
IN
OUT
20
V
V
12-2
Page 11
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
Table 12-2. D.C. Electrical Characteristics (Continued)
(T
= – 40°C to + 85°C, VDD = 4.5 V to 5.5 V
A
(1)
)
Parameter Symbol Conditions Min Typ Max Unit
Input Low
Leakage Current
I
LIL1
V
= 0 V
IN
All inputs except I
, P4.0 and
LIL2
– – – 3 µA
P4.1
Output High
Leakage Current
Output Low
Leakage Current
Pull-up Resistors
Supply Current
(2)
I
LIL2
I
LOH
I
LOL
R
R
R
I
DD1
L1
L2
L3
V
= 0 V
IN
X
X
,
OUT
IN
V
= V
OUT
DD
All outputs
V
= 0 V
OUT
All outputs
V
= 0 V; Port 2 only
IN
V
= 0 V; Port 4 only
IN
V
= 0 V; RESET only
IN
Normal operation mode
– 20
– – 3 µA
– – – 3 µA
30 60 90
1.8 2.8 4.0
50 90 150
– 4.5 10 mA
4 MHz CPU clock
I
DD2
I
DD3
Idle mode; 4 MHz oscillator 0.9 3 mA
Stop mode 0.5 5 µA
KΩ
NOTES:
1. The operating voltage range of S3C9014/P9014 is from 2.7 V to 5.5 V according to oscillation frequency.
2. Supply current does not include current drawn through internal pull-up resistors or external output current loads.
12-3
Page 12
Page 13
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
Table 12-3. Input/Output Capacitance
(T
= – 40°C to + 85°C, V
A
DD
= 0 V)
Parameter Symbol Conditions Min Typ Max Unit
C
C
OUT
IN
f = 1 MHz; unmeasured pins
are connected to V
SS
– – 10 pF
Input
Capacitance
Output
Capacitance
I/O Capacitance
C
IO
Table 12-4. A.C. Electrical Characteristics
(T
= – 40°C to + 85°C, V
A
= 4.5 V to 5.5 V)
DD
Parameter Symbol Conditions Min Typ Max Unit
t
Interrupt Input
INTH
, t
P2 and P4 – 200 – ns
INTL
High, Low Width
RESET Input
t
RSL
RESET
– 1,000 –
Low Width
RESET
t
RSL
0.2 V
Figure 12-1. Input Timing for RESETRESET
DD
12-5
Page 14
ELECTRICAL DATA S3C9004/P9004/C9014/P9014
Figure 12-2. Input Timing Measurement Points for Port 2, Port 4, and RESETRESET
(TA = – 40°C + 85°C, V
Oscillator Clock Circuit Test Condition Min Typ Max Unit
RC Oscillator (with
Internal Capacitor;
for S3C9004/P9004)
Crystal/Ceramic
Oscillator
(for S3C9014/P9014)
Table 12-5. Oscillator Characteristics
= 4.5 V to 5.5 V)
DD
R
C1
C2
t
INTL
X
X
IN
OUT
X
IN
X
OUT
t
INTH
0.8 V
DD
0.2 V
DD
VDD = 4.75 to 5.25 V
TA = 0°C + 70°C
Tolerance: ± 10%
(note)
Crystal/Ceramic
oscillation frequency
– 4 – MHz
1.0 – 8.0
NOTE: The S3C9004/P9004 provides an internal capacitor to accommodate an RC oscillator configuration. A 1%
precision resistor must be used to achieve an oscillation frequency with an acceptable tolerance.
12-6
Page 15
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
CPU CLOCK
8 MHz
6 MHz
4 MHz
3 MHz
2 MHz
1 MHz
2 3 4 5 6 71 2.7 3.5 5.5
SUPPLY VOLTAGE (V)
Figure 12-3. Operating Voltage Range (S3C9014/P9014)
12-7
Page 16
Page 17
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
Table 12-6. Oscillation Stabilization Time
(T
= – 40°C + 85°C, V
A
= 4.5 V to 5.5 V)
DD
Oscillator Test Condition Min Typ Max Unit
f
Main Crystal
Main Ceramic
= 4 MHz
OSC
(Oscillation stabilization occurs when VDD is equal to
– – 10 ms
the minimum oscillator voltage range.)
t
Oscillator
Stabilization Wait
stop mode release time by a reset
WAIT
–
216 /
f
OSC
–
Time
t
stop mode release time by an interrupt
WAIT
–
(note)
–
NOTE: The oscillator stabilization wait time, t
X
IN
Figure 12-4. Clock Timing Measurement Points at X
Table 12-7. Data Retention Supply Voltage in Stop Mode
(TA = – 40°C + 85°C)
, is determined by the setting in the basic timer control register, BTCON.
WAIT
1 / f
OSC
t
XL
t
XH
VDD – 0.5 V
0.4 V
IN
Parameter Symbol Conditions Min Typ Max Unit
Data Retention
V
DDDR
Stop mode 2.0 – 6 V
Supply Voltage
Data Retention
I
DDDR
Stop mode; V
DDDR
= 2.0 V
– – 5 µA
Supply Current
12-9
Page 18
ELECTRICAL DATA S3C9004/P9004/C9014/P9014
V
DD
RESET
V
DD
EXTERNAL
INTERRUPT
INTERNAL RESET
OPERATION
~
~
STOP MODE
DATA RETENTION
~
~
MODE
V
DDDR
EXECUTION OF
STOP INSTRUCTION
0.2 V
DD
t
WAIT
Figure 12-5. Stop Mode Release Timing When Initiated by a Reset
~
~
~
~
EXECUTION OF
STOP INSTRUCTION
STOP MODE
DATA RETENTION
MODE
V
DDDR
0.2 V
DD
0.8 V
0.8 V
DD
IDLE MODE
(BASIC TIMER
ACTIVE)
NORMAL
OPERATING
MODE
IDLE MODE
(BASIC TIMER
ACTIVE)
NORMAL
OPERATING
MODE
DD
12-10
t
WAIT
Figure 12-6. Stop Mode Release Timing When Initiated by an External Interrupt
Page 19
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
Table 12-8. External Memory Timing Characteristics (4 MHz)
(T
= – 40°C to + 85°C, V
A
= 4.5 V to 5.5 V)
DD
Number Symbol Parameter Normal Timing (ns)
Min Max
1
2
3
4
5
6a
6b
7
8
9
10
11
12
13
tdA (AS)
t
(A)
dAS
t
(DR)
dAS
t
wAS
tdA (DS)
t
(read)
wDS
t
(write)
wDS
t
(DR)
dDS
t
(DR)
hDS
t
(A)
dDS
t
(AS)
dDS
t
(DS)
dDO
t
(AS)
dRW
t
(DW)
dDS
Address valid to AS ↑ delay
AS ↑ to address float delay
AS ↑ to read data required valid
AS Low width
Address float to DS ↓
DS (read) Low width
DS (write) Low width
DS ↓ to read data required valid
Read data to DS ↑ hold time
DS ↑ to address active delay
DS ↑ to AS ↓ delay
Write data valid to DS (write) ↓ delay
R/W valid to AS ↑ delay
DS ↑ to write data not valid delay
10 –
35 –
– 140
88 –
0 –
314 –
164 –
– 80
0 –
20 –
30 –
10 –
20 –
20 –
NOTES:
1. All times are in nano seconds (ns) and assume an 4 MHz input frequency.
2. Wait states add 100 ns to the time of numbers 3, 6a, 6b, and 7.
12-11
Page 20
ELECTRICAL DATA S3C9004/P9004/C9014/P9014
R/ (P2.2)
W
12
PORT0
DM
(P2.3)
A8−A12,
DM
PORT1
AS
DS
(P2.0)
(P2.1)
3
A0−A7 D0−D 7 OUT D0−D7 IN OUT
1 2 11
5
4
7
6
Figure 12-7. External Memory Read and Write Timing
(See Table 12-8 for a description of each timing point.)
9
10
8
13
12-12
Page 21
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
CHARACTERISTIC CURVES
NOTE
The characteristic values shown in the following graphs are based on actual test measurements. They do
not, however, represent guaranteed operating values.
(TA = 25 C)
7
f
= 10 MHz
OSC
f
OSC
f
OSC
= 8 MHz
= 5 MHz
I
DD1
6
5
4
(mA)
3
f
OSC
= 2 MHz
2
1
~
0
~
2.5
3.0 3.5 4.0 4.5 5.0 5.5 6.0
f
OSC
= 1 MHz
VDD (V)
Figure 12-8. I
DD1
vs. V
DD
12-13
Page 22
ELECTRICAL DATA S3C9004/P9004/C9014/P9014
I
DD2
(µA)
1400
1200
1000
800
600
400
200
0
(TA = 25 C)
~
~
2.5
3.0 3.5 4.0 4.5 5.0 5.5 6.0
VDD (V)
f
OSC
f
OSC
f
OSC
f
OSC
= 10 MHz
= 5,8 MHz
= 1 MHz
= 2 MHz
Figure 12-9. I
DD2
vs. V
DD
12-14
Page 23
S3C9004/P9004/C9014/P9014 ELECTRICAL DATA
(TA = 25 C)
750
700
650
600
I
DD3
(nA)
550
500
450
400
f
= 5 MHz
OSC
~
0
~
2.5
3.0 3.5 4.0 4.5 5.0 5.5 6.0
VOH (V)
VDD (V)
Figure 12-10. I
6
5
4
3
2
1
0
-1
0 9 10 11 12
2 3 4 5 6 7 81
DD
vs. V
DD3
= 4.5V V
DD
V
DD
= 5.0VV
DD
= 5.5V
IOH (mA)
Figure 12-11. IOH vs. V
OH
12-15
Page 24
ELECTRICAL DATA S3C9004/P9004/C9014/P9014
7
6
5
VOL (V)
4
3
V
= 4.5V
2
1
0 10 12 14 17
2 3 4 5 6 7 81
DD
9 11 13 15 16
DD
= 5.0V
V
DD
= 5.5VV
IOL (mA)
Figure 12-12. VOL vs. I
7
6
(Port 0, 1, 2, and 4)
OL
12-16
VOL (V)
5
4
V
= 4.5V
3
2
1
0 10 12 14 17
2 3 4 5 6 7 81
DD
9 11 13 15 16
V
DD
V
= 5.0V
DD
= 5.5V
IOL (mA)
Figure 12-13. VOL vs. I
OL
(Port 3)
Page 25
S3C9004/P9004/C9014/P9014 MECHANICAL DATA
13 MECHANICAL DATA
OVERVIEW
The S3C9004/P9004/C9014/P9014 is currently available in a 40-pin DIP package.
(2.00)
#40 #21
± 0.2
13.85
#1 #20
40-DIP-600B
52.82 MAX
52.42
0.46
± 0.1
1.27
± 0.1
± 0.2
2.54
15.24
± 0.2
0.51MIN 3.95
5.08MAX
± 0.3
3.30
+0.1
– 0.05
0.25
0-15
°
: Dimensions are in millimeters.
NOTE
Figure 13-1. 40-Pin DIP Package Mechanical Data (40-DIP-600B)
13-1
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MECHANICAL DATA S3C9004/P9004/C9014/P9014
NOTES
13-2
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