Page 1
RT9237
Multi-Phase DC/DC Controller for CPU Core Power Supply
General Description
The RT9237 is a multi-phase buck DC/DC controller
integrated with all control functions for high
performance processor VRM. The RT9237 drives 2,
3 or 4 buck switching stages operating in interleaved
phase set automatically. The multi-phase
architecture provides high output current while
maintaining low power dissipation on power devices
and low stress on input and output capacitors. The
high equivalent operating frequency also reduces
the component dimension and the output voltage
ripple in load transient.
RT9237 regulates both easily set voltage and
current loops. Precise current sharing for power
stage is achieved by differential input current sense
and processing circuit. The settings of current
sense, droop tuning and over current protection are
independent to compensation circuit of voltage loop.
The feature greatly facilitates the flexibility of CPU
power supply design and tuning.
The RT9237 uses a 5-bit DAC of 1.1V to 1.85V
(25mV/step) output with load current droop
compensation to meet the strict VRM transient
requirement. The IC monitors the VCORE voltage
for PGOOD and over voltage protection. Soft start,
over current protection and programmable under
voltage lockout are also provided to assure the
safety of microprocessor and power system.
Features
z Multi-Phase Power Conversion with Automatic
Phase Selection
z VRM 9.0 DAC Output with Active Droop
Compensation for Fast Load Transient
z Precise Channel Current Sharing with
Differential Sense Input
z Hiccup Mode Over Current Protection
z Programmable Under Voltage Lockout and
Soft Start
z High Ripple Frequency, (Channel Frequency
200KHz) Times Channel Number
Pin Configurations
Part Number Pin Configurations
RT9237CS
(Plastic SOP-28)
VID4
VID3
VID2
VID1
VID0
COMP
FB
ADJ
GND
VSEN
IRMP
DVD
IMAX
SS
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12 17
13
14
28
27
26
25
24
23
22
21
20
19
18
16
15
VDD
PGOOD
PWM4
ISP4
ISP1
PWM1
PWM2
ISP2
ISP3
PWM3
ISN1
ISN2
ISN3
ISN4
Applications
z Power Supply for Server and Workstation
z Power Supply for High Current Microprocessor
Ordering Information
RT9237
Package Type
S : SOP-28
Operating temperature range
C: Commercial standard
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RT9237
Absolute Maximum Ratings
z Supply Voltage 7V
z Input, Output or I/O Voltage GND-0.3V ~ VDD+0.3V
z Ambient Temperature Range 0°C ~ 70°C
z Operating Junction Temperature Range 0°C ~ 125°C
z Storage Temperature Range -65°C ~ 150°C
z Power Dissipation, P
SOP-28 0.625W
z Package Thermal Resistance
SOP-28, θ
z Lead Temperature (Soldering, 10 sec.) 260°C
JA
Electrical Characteristics
(V
= 5V, GND = 0V, TA = 25°C, unless otherwise specified)
DD
Parameter Symbol Test Conditions Min Typ Max Units
VDD Supply Current
@ TA = 25°C
D
60°C /W
Nominal Supply Current
I
DD
PWM 1,2,3,4 Open -- 512mA
Power-On Reset
VDD Rising Threshold
VDD Falling Threshold
Hysteresis 0.2 0.6 --
4.2 4.35 4.6 V
-- 3.85 -- V
V
VDVD Rising Trip Threshold 1.19 1.25 1.31 V
Oscillator
Frequency For each phase 170 200 230 kHz
Ramp Amplitude
∆V
OSC
R
IRMP
= 56kΩ
-- 1 -- V
Ramp Valley 1.0 1.3 -- V
Maximum On Time of Each Channel 70 75 80 %
IRMP Pin Voltage
R
IRMP
= 56kΩ
0.95 1 1.05 V
Reference and DAC
DACOUT Voltage Accuracy -1.0 -- +1.0 %
DAC (VID0-VID4) Input Low Voltage -- -- 0.8 V
DAC (VID0-VID4) Input High Voltage 2.0 -- -- V
DAC (VID0-VID4) Bias Current 20 28 36
µA
PWM Controller Error Amplifier
DC Gain -- 85 -- dB
Bandwidth -- 10 -- MHz
Slew Rate
C
= 10pF
L
-- 5 --
V/µS
To be continued
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Parameter Symbol Test Conditions Min Typ Max Units
Current Sense GM Amplifier
RT9237
ISP 1,2,3,4 Full Scale Source Current 10 18 26
ISP 1,2,3,4 Current for OCP 80 95 110
Protection
IMAX Voltage
SS Current
R
V
IMAX
= 1V
SS
= 15k
0.55 0.6 0.65 V
81318
Over-Voltage Trip (VSEN/DACOUT) 118 122 126 %
Power Good
Upper Threshold (VSEN/DACOUT) VSEN Rising 106 110 114 %
Lower Threshold (VSEN/DACOUT) VSEN Rising 86 92 94 %
Function Block Diagram
IRMPIMAXDVD
VDD
PGOOD
VID0
VID1
VID2
VID3
VID4
VSEN
ADJ
FB
GND
DAC
Power On Reset
120%
VDAC
108%
VDAC
92%
VDAC
+
+
+
_
_
_
Droop
Control
+
EA
_
OVP, PGOOD
POR Logic
SS
Control
INH
Current
Limit
Oscillator
Current
Balance
Processor
INH
+
_
PWMCP
INH
+
_
PWMCP
INH
+
_
PWMCP
INH
+
_
PWMCP
CS1
CS2
CS3
CS4
PWM Logic
& Driver
PWM Logic
& Driver
PWM Logic
& Driver
PWM Logic
& Driver
+
_
+
_
+
_
+
_
µA
µA
µA
PWM1
PWM2
PWM3
PWM4
ISP1
ISN1
ISP2
ISN2
ISP3
ISN3
ISP4
ISN4
COMP SS
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RT9237
Table 1 Output Voltage Program
Pin Name
VID4 VID3 VID2 VID1 VID0
11111 Off
11110 1.100V
11101 1.125V
11100 1.150V
11011 1.175V
11010 1.200V
11001 1.225V
11000 1.250V
10111 1.275V
10110 1.300V
10101 1.325V
10100 1.350V
10011 1.375V
10010 1.400V
10001 1.425V
Nominal Output Voltage DACOUT
10000 1.450V
01111 1.475V
01110 1.500V
01101 1.525V
01100 1.550V
01011 1.575V
01010 1.600V
01001 1.625V
01000 1.650V
00111 1.675V
00110 1.700V
00101 1.725V
00100 1.750V
00011 1.775V
00010 1.800V
00001 1.825V
00000 1.850V
Note: (1) 0:Connected to GND (2) 1:Open
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RT9237
Typical Application Circuit
12V
L1
2
2µH
C
100µF
1
Q
3
1
C
C
1µF
2
6
PHB83NO3LT
1µF
1
BOOT
VCC
7
CORE
V
6
C
1000µF
5
C
1000µF
L2
2µH
9
C
100µF
0.01µF
8
C
1µF
2
Q
3
PHB83NO3LT
Q
11
C
1µF
PHB95NO3LT
5
8
1
16
C
1000µF
15
C
1000µF
L3
2µH
0.01µF
4
Q
PHB95NO3LT
5
8
2
UGATE
PVCC
LGATE
PHASE
RT9600
4
GND
PWM
3
C41µF
UGATE
6
VCC BOOT
PVCC
7
C131µF
LGATE
PHASE
RT9600
4
GND
PWM
3
Typical 12V
Typical 12V
3
R
+5V
7
C
1µF
PGOOD
10K
28
5V
R1
2.4K
27
VDD
PGOOD
24
ISP4
23
ISP1
26
25
PWM4
PWM1
R10
2.4K
22
21
ISP2
PWM2
20
ISP3
R2
2.4K
5V
R13
2.4K
18
17
19
PWM3
16
15
ISN2
ISN1
ISN3
RT9237
VID4
1
VID4
VID2
VID1
VID0
VID3
2
4
3
VID3
VID2
VID1
6
R
10
C
6.6nF
COMP
6
5
VID0
12
C
24K
7
R
ADJ
FB
8
7
33pF
VSEN
GND
9
10
DVD
IRMP
11
IMAX
SS ISN4
13
14
12
12
R
13K
17
0.1µF
C
11
R
12K
14
2.4K
R
8
9
R
R
5
R
2.4K
14
C
1K
15
12V
39K
R
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RT9237
Functional Pin Description
VID4, VID3, VID2, VID1 and VID0 (Pin1,2,3,4,5)
DAC voltage identification inputs for VRM9.0. These
pins are TTL-compatible and internally pulled to VDD
if left open.
COMP (Pin 6)
Output of the error amplifier and input of the PWM
comparator.
FB (Pin 7)
Inverting input of the internal error amplifier.
ADJ (Pin 8)
Current sense output for active droop adjust.
Connect a resistor from this pin to GND to set the
amount of load droop.
GND (Pin 9)
Ground for the IC.
VSEN (Pin 10)
Power good and over voltage monitor input. Connect
to the microprocessor-CORE voltage.
ISEN1 (Pin 18), ISEN2 (Pin 17), ISEN3 (Pin 16) and
ISEN4 (Pin 15)
Current sense inputs from the individual converter
channel’s sense component GND nodes.
ISP1 (Pin 24), ISEN2 (Pin 21), ISEN3 (Pin 20) and
ISEN4 (Pin 25)
Current sense inputs for individual converter
channels. Tie this pin to the component sense node.
PWM1 (Pin 23), PWM2 (Pin 22), PWM3 (Pin 19)
and PWM4 (Pin 26)
PWM outputs for each driven channel. Connect these
pins to the PWM input of the MOSFET driver. For
systems which use 3 channels, connect PWM4 high.
Two channel systems connect PWM3 and PWM4
high.
PGOOD (Pin 27)
Power good open-drain output.
VDD (Pin 28)
IC power supply. Connect this pin to a 5V supply.
IRMP (Pin 11)
PWM ramp amplitude set by external resistor. Ramp
amplitude = 1V × (R [IRMP] / 56KΩ)
DVD (Pin 12)
Programmable power UVLO detection input. Trip
threshold = 1.25V at V(DVD) rising
IMAX (Pin 13)
Over current protection amplitude set.
SS (Pin 14)
Connect this SS pin to GND with a capacitor to set
the start time interval. Pull this pin below 1V(ramp
valley of saw-tooth wave in pulse width modulator) to
shutdown the converter output.
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RT9237
Simplified Block Diagram Control Loops for a Two Phase Converter
GND
ADJ
FB
VDAC
COMP
Droop
Control
+
EA
_
R
LOAD
SS
Control
SS
C
OUT
Current
Balance
Processor
+
_
PWMCP
+
_
PWMCP
CS1
V
IN
V
IN
CS2
PWM Logic
& Drive r
PWM Logic
& Drive r
+
_
+
_
RT9600
PWM1
PWM2
ISP1
ISN1
ISP2
ISN2
Voltage loop
RT9600
Cur ren t lo op
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RT9237
Operation
RT9237 is a multi-phase DC/DC controller that
precisely regulates CPU core voltage and balances
the current of different power channels. The
converter consists of RT9237 and its companion
MOSFET driver provide high quality CPU power and
all protection function to meet the requirement of
modern VRM.
Voltage control
The reference of V
is provided by a 5-bit DAC of
CORE
VRM9.0 specification. Control loop consists of error
amplifier, multi-phase pulse width modulator, driver
and power components. Like conventional voltage
mode PWM controller, the output voltage is locked at
the VREF of error amplifier and the error signal is
used as the control signal VC of pulse width
modulator. The PWM signals of different channels
are generated by comparison of EA output and spiltphase saw-tooth wave. Power stage transforms V
IN
to output by PWM signal on-time ratio.
Current balance
RT9237 senses the current of low side MOSFET in
each synchronous rectifier when it is conducting for
channel current balance and droop tuning. The
differential sensing GM amplifier converts the voltage
on the sense component (can be a sense resistor or
the R
of the low side MOSFET) to current
DS(ON)
signal into internal balance circuit. The current
balance circuit sums and averages the current
signals then produces the balancing signals injected
to pulse width modulator. If the current of some
power channel is greater than average, the balancing
signal reduces the output pulse width to keep the
balance.
Fault detection
The chip detects V
for over voltage and power
CORE
good detection. The “hiccup mode” operation of over
current protection is adopted to reduce the short
circuit current. The in-rush current at the start up is
suppressed by the soft start circuit through clamping
the pulse width and output voltage.
Application Circuit setting
Phase setting and converter start up
RT9237 interface with companion MOSFET driver
(like RT9600 or HIP660X series) for correct converter
initialization. The tri-phase PWM output (high, low,
high impedance) pins sense the interface voltage at
IC POR acts (both VDD and DVD trip). The channel
is enabled if the pin voltage is 1.2V less than VDD.
Please tie the PWM output to VDD and the current
sense pins to GND or left float if the channel is
unused. For 2-channel application, connect PWM3
and PWM4 high. 3-channel application connect
PWM4 high.
Current sensing setting
RT9237 senses the current of low side MOSFET in
each synchronous rectifier when it is conducting for
channel current balance and droop tuning. The
differential sensing GM amplifier converts the voltage
on the sense component (can be a sense resistor or
the R
signal into internal circuit (see Fig.1).
of the low side MOSFET) to current
DS(ON)
I
I
X
X
R
Load Droop
The sensed power channel current signals regulate
the reference of DAC to form a output voltage droop
proportional to the load current. The droop or so call
“active voltage positioning” can reduce the output
voltage ripple at load transient and the LC filter size.
Sample & Hold
Sample & Hold
To Current Balance
To Current Balance
2/3 I
2/3 I
X
2/3 I
2/3 I
2/3 I
2/3 I
X
X
X
X
X
To Droop Tune
To Droop Tune
To Ove r Current Detection
To Ove r Current Detection
GM
GM
_
_
I
I
BP
BP
+
+_+
I
I
BN
BN
ISP
ISP
ISN
ISN
R
SP
SP
X
X
R
R
S
X
X
R
R
SN
SN
S
Fig.1 Current Sense Circuit
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I
I
L
L
Page 9
RI ×
The sensing circuit gets IX = by local feedback.
R
= RSN to cancel the voltage drop caused by GM
SP
amplifier input bias current. I
SL
SP
R
is sampled and held
X
just before low side MOSFET turns off (See Fig.2).
Therefore,
OFFO
T
I
)AVG(L)H/S(L
µ×
I
L
L (S/H)
V
×−=
2
L
S5
S
R
SP
R
I
L (AVG)
S)H/S(L
RI
, ,
)H/S(X
I
=
T
=
OFF
, for operating frequency = 200kHz
×
SP
R
VV
−
OIN
S5
µ×
V
IN
)AVG(L)H/S(X
II ×
Falling Slope = VO /L
Inductor Current
−
O
V
−=
II
−
OIN
VV
IN
V
L2
RT9237
Protection and SS function
For OVP, the RT9237 detects the V
pin. Eliminate the parasitic delay and noise influence
on the PCB path for fast and accurate detection. The
trip point of OVP is 120% of normal output level. The
PWM outputs are pulled low to turn on the low side
MOSFET and turn off the high side MOSFET of the
synchronous rectifier at OVP. The OVP latch can
only be reset by VDD or DVD restart power on reset
sequence. The PGOOD detection trip point of V
is ±8% out of the normal level. The PGOOD open
drain output pulls low when V
OCRE
range.
Soft start circuit generates a ramp voltage by
charging external capacitor with 10uA current after IC
POR acts. The PWM pulse width and V
clamped by the rising ramp to reduce the in-rush
current and protect the power devices.
by V
CORE
SEN
CORE
exceeds the
are
CORE
PWM Signal & High Side MOSFET Gate Signal
Low Side MOSFET Gate Signal
Fig. 2 Inductor Current and PWM Signal
Droop Tuning
The S/H current signals from power channels are
injected to ADJ pin to create droop voltage.
RV
The DAC output voltage decreases by V
∑
3
to form
ADJ
2
×= XADJADJ I
the VCORE load droop(see Fig.3).
2/3 I
2/3 I
2/3 I
2/3 I
COMP
EA
V
ADJ
DAC
+
V
ADJ
_
∑
ADJ
R
ADJ
∑
I
X
_
FB
+
V
- V
DAC
Over current protection trip point is set by the resistor
R
connected to IMAX pin. OCP is triggered if one
IMAX
channel S/H current signal I
> . Controller
X
6.0
3
×
IMAXR
2
forces PWM output latched at high impedance to turn
off both high and low side MOSFET in the power
stage and initial the hiccup mode protection. The SS
pin voltage is pulled low with a 10µA current after it is
less than 90% VDD. The converter restarts after SS
pin voltage < 0.2V. Three times of OCP disable the
converter and only release the latch by POR acts
(see Fig.4).
COUNT = 1 COUNT = 2 COUNT = 3
4V
V
CORE
2V
0V
X1
X2
X3
X4
0A
I
L
T0T1 T2
OVERLOAD
APPLIED
T3T4
TIME
SS
Fig. 4
Fig. 3 Droop Tune Circuit
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RT9237
3-Phase Converter and Components Function Grouping
VCC BOOT
UGATE
PVCC
PHASE
RT9600
PWM
+5V
VDD
LGATE
GND
12V
VID
Compensation
& Offset
Droop Setting
12V
Driver P ower
UVLO
COMP
FB
VSEN
ADJ
DVD
IRMP
SS
Ramp Setting
IMAX
OCP Setting
Design Procedure Suggestion
Voltage Loop setting
a. Output filter pole and zero (Inductor, output
capacitor value & ESR)
b. Error amplifier compensation & saw-tooth wave
amplitude(compensation network & IRMP pin
resistor)
Current loop setting
a. GM amplifier S/H current(current sense
component Ron, ISPx & ISNx pin external resistor
value, keep ISPx current < 50uA at full load
condition)
RT9237
GND
PWM1
ISP1
ISN1
PWM2
ISP2
ISN2
PWM3
ISP3
ISN3
12V
BOOT
VCC
UGATE
PVCC
PHASE
RT9600
PWM
PWM
GND
VCC BOOT
UGATE
PVCC
PHASE
RT9600
GND
LGATE
12V
LGATE
Current Sense
Components
b. Over current protection trip point(IMAX pin
resistor, keep ISPx current<80uA at OCP
condition)
VRM load line setting
a. Droop amplitude (ADJ pin resistor)
b. No load offset(additional resistor in compensation
network)
Power sequence & SS
DVD pin external resistor and SS pin capacitor
PCB layout
a. Kelvin sense for current sense GM amplifier
input
b. Refer to layout guide for other item
+V
CORE
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Design Example
RT9237
Three phase converter V
CORE
= 1.5V, V
= 12V, full
IN
load current = 60Amp, droop voltage at full load =
120mV, OCP trip point for each power stage =
30Amp (at Sample/Hold), low side MOSFET R
= 6mΩ at room temperature, L = 2µH, C
DS(ON)
OUT
9000µF, capacitor ESR = 2m Ω.
1. Compensation setting
a. Modulator Gain, Pole and Zero
IN
ESR =π
V
V1V
V
RAMP
×=
k56
Ω
IMP
R
1
=
LC2
π
IRMP
kHz2.1
kHz8.8CR
Modulator Gain = , saw-tooth wave
amplitude , choose R
= 39K, V
RAMP
= 1.4V, modulator Gain = 8.6 =
RAMP
18.7dB, LC filter pole = ,
ESR zero =
1
2
b. EA compensation network
Use type 2 compensation scheme (see Fig. 5),
, ,
F
mid-band gain = . Choose R
24KΩ, C
1
=
Z
12
CR2
π
= 6.6nF, C2 = 33pF, get FZ = 1KHz,
1
=
P
F
R
2
1
R
1
×
21
π
CC
(R2
2
)
21
+
CC
= 2.4KΩ, R2 =
1
Fp = 200KHz, mid-band Gain=10=20dB,
modulator asymptotic Bode plot of EA
compensation and PWM loop Gain Bode
shown as Fig. 6.
C
COMP
1
C
EA
2
_
R
2
+
DACOUT
FB
C
R
3
3
R
1
R3, C3 are used i n typ e 3
compensation scheme (left
NC in type 2)
R
OL
ROL for no load offset
setting
V
CORE
Fig. 5 EA Compensation Network
Asymptotic Bode Plot of PWM Loop Gain
100
80
60
=
40
20
Gain (d B )
0
-20
-40
-60
10 100 1K 10K 100K 1M 10M
10 100 1000 10000 100000 1000000 10000000
Frequency (Hz)
Uncompensated EA Gain
Compensated EA Gain
PWM Loop Gain
Modulator Gain
Fig. 6 Asymptotic Bode Plot of PWM Loop Gain
2. Droop setting
Full load current of each power channel = 60A/3 =
20Amp, the ripple current = ∆I
V5.1
S5 =
×µ
H2
µ
V5.1
1
−×
V12
, load current at S/H = , GM
Amp S/H , suggested I
I
=
)MAX(X
at full = 40µA∼50µA, choose R
I
X(MAX)
40.8µA×3×2/3×R
= 40.8µA, required Droop = 120mV =
ADJ ，RADJ
L
∆
A20
−
2
×
)ON(DS
SP
R
= 1.47KΩ.
=
A28.3
I
L
SP
A36.18
=
A36.18R
= R
SN
X
= 2.7KΩ,
Take the temperature rising for consideration, if
MOSFET working temperature=70°C and the
temperature coefficient =5000ppm/°C, the
R
5000ppm/°C} = 7.3 mΩ, R
× {R
(70°C) = 6mΩ × {1+(70°C-27°C) ×
DS(ON)
ADJ
DS(ON)
(27°C)/R
(70°C)} = 1.21KΩ
DS(ON)
(70°C) = R
ADJ
(27°C)
3. Over Current Protection setting
OCP trip point current = 30A (at Sample/Hold)，
A30R
×
I ×=
=
X
)ON(DS
R
3
2
V6.0
，R
IMAXSP
R
IMAX
=13.6KΩ
Take the temperature rising for consideration,
R
IMAX
{R
DS(ON)
(70°C) = R
(27°C)/R
IMAX
DS(ON)
(27°C) ×
(70°C)} = 11.2KΩ
4. SS capacitor
C
= 0.1µF is the suitable value for most
SS
application.
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RT9237
Layout Guide
Layout Guide
Place the high-power switching components first, and
separate them from sensitive nodes.
1. Most critical path: the current sense circuit is
the most sensitive part of the converter. The
current sense resistors tied to ISP1,2,3,4 and
ISN1,2,3,4 should be located not more than 0.5
inch from the IC and away from the noise
switching nodes. The PCB trace of sense
nodes should be parallel and as short as
possible. Kelvin connection of the sense
component (additional sense resistor or
MOSFET R
current sensing.
) ensures the accurate stable
DS(ON)
No Kelvin sense, no guarantee
for stable operation!
2. Switching ripple current path:
a. Input capacitor to high side MOSFET
b. Low side MOSFET to output capacitor
c. The return path of input and output capacitor
d. Separate the power and signal GND
e. The switching nodes(the connection node of
high/low side MOSFET and inductor) is the
most noisy points. Keep them away from
sensitive small-signal node.
f. Reduce parasitic R, L by minimum length,
enough copper thickness and avoiding of via.
3. MOSFET driver should be close to MOSFET
4. The compensation, bypass and other function
setting components should be near the IC and
away from the noisy power path.
SW1
V
IN
R
IN
C
IN
V
SW2
Fig.7 Power Stage Ripple Current Path
L1
L2
V
C
OUT
OUT
R
L
www.richtek.com DS9237-01 September 2002
12
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RT9237
Next to IC Pin (s)
C
BP
+12V
VCCPVCC
RT9600
PHASE
Locate near Transistor
C
C
BOOT
IN
Use Individ ua l Metal Runs for
Each Channel to help Isolate
Ou t put S t ages
L
O1
V
CORE
C
OUT
Kelvin
Sense
Parallel Trac e
+12V or +5V
R
ISP
R
ISN
Locat e next
to IC
PWM
IMAX
IRMP
ADJ
RT9237
ISP
ISN
+5V
VCC
COMP
FB
X
X
VSEN
IN
C
BP
Next to IC Pin (s)
C
C
R
C
Locate next
to FB Pin
R
FB
Fig.8 Layout Consideration
DS9237-01 September 2002 www.richtek.com
13
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RT9237
Package Information
H
M
B
A
C
FD
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 17.704 18.110 0.697 0.713
B 7.391 7.595 0.291 0.299
C 2.362 2.642 0.093 0.104
I
B
J
D 0.330 0.508 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.229 0.330 0.009 0.013
I 0.102 0.305 0.004 0.012
J 10.008 10.643 0.394 0.419
M 0.381 1.270
28–Lead SOP Plastic Package
www.richtek.com DS9237-01 September 2002
0.015 0.050
14
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RT9237
DS9237-01 September 2002 www.richtek.com
15
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RT9237 Preliminary
RICHTEK TECHNOLOGY CORP.
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
www.richtek.com DS9237-01 September 2002
RICHTEK TECHNOLOGY CORP.
Taipei Office (Marketing)
8F-1, No. 137, Lane 235, Paochiao Road, Hsinti en City
Taipei County, Taiwan, R.O.C.
Tel: (8862)89191466 Fax: (8862)89191465
Email: [email protected]
16
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