Datasheet RFD8P06LE, RFP8P06LE Datasheet (Intersil)

RFD8P06LE, RFD8P06LESM, RFP8P06LE

Data Sheet July 1999 File Number

8A, 60V, 0.300 Ohm, ESD Rated, Logic
Level, P-Channel Power MOSFET

These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.

Formerly developmental type TA49203.

Ordering Information

PART NUMBER PACKAGE BRAND

RFD8P06LE TO-251AA F8P6LE
RFD8P06LESM TO-252AA F8P6LE
RFP8P06LE TO-220AB FP8P06LE

NOTE: When ordering, usethe entire part number .Add thesuffix9A to
obtain the TO-252AA variant in the tape and reel, i.e.,
RFD8P06LESM9A.

Features

• 8A, 60V

DS(ON)

= 0.300Ω

•r

• 2kV ESD Protected

• Temperature Compensating PSPICE

• PSPICE Thermal Model

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

o

C Operating Temperature

• 175

Symbol

D

G

S

®

Model

4273.1

Packaging

DRAIN (FLANGE)

JEDEC TO-251AA JEDEC TO-252AA

SOURCE

DRAIN

GATE

GATE

SOURCE

JEDEC TO-220AB

SOURCE

DRAIN

GATE

DRAIN (FLANGE)

DRAIN (FLANGE)

7-11

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

PSPICE® is a registered trademark of MicroSim Corporation.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

RFD8P06LE, RFD8P06LESM, RFP8P06LE

Absolute Maximum Ratings T

= 25oC Unless Otherwise Specified

C

RFD8P06LE, RFD8P06LESM,

RFP8P06LE UNITS

Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DS

DGR

-60 V

-60 V

Continuous Drain Current

TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

D
D

DM

GS

D

-8

-6.3

See Figure 5

±10 V

48 W

A
A

Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.32 W/oC

Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, T

STG

Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

AS

L

See Figure 6

-55 to 175
300

o

C

o

C

(0.063in (1.6mm) from case for 10s)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. TJ= 25oC to 150oC.

Electrical Specifications T

= 25oC Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V
Zero Gate Voltage Drain Current I

DSSID

GS(TH)VGS

DSS

= 250µA, VGS = 0V (Figure 11) -60 - - V

= VDS, ID = 250µA (Figure 12) -1 - -2 V

VDS =- 60V, VGS = 0V TJ = 25oC---1µA

TJ = 150oC - - -50 µA
Gate to Source Leakage Current I
On Resistance (Note 1) r

GSS

DS(ON)ID

VGS = ±10V - - ±10 µA

= 8A, VGS = -5V (Figure 9, 10) - - 0.300 Ω

ID = 8A, VGS = -4.5V (Figure 9, 10) - - 0.330 Ω
Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t
Total Gate Charge Q

g(TOT)VGS

Gate Charge at -5V Q
Threshold Gate Charge Q

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

OFF

g(TH)VGS

ON

r

VDD = -30V, I

(Figure 13)

≅8A, R

D

= 9.1Ω, RL = 3.75Ω

GS

- - 90 ns

-10- ns

-50- ns

-30- ns

f

-20- ns

- - 75 ns

= 0 to -10V VDD = -48V, I

g(-5)VGS

= 0 to -5V - 15 18 nC
= 0 to -1V - 1.2 1.5 nC

VDS =- 25V, VGS = 0V, f = 1MHz

ISS

(Figure 15)

OSS
RSS

θJC

TO-251AA, TO-252AA - - 100oC/W

θJA

RL = 6Ω
I

= -0.2mA

g(REF)

(Figure 14)

D

≅8A,

-2530nC

- 675 - pF

- 175 - pF

-50-pF

- - 3.125oC/W

TO-220AB 80oC/W

Source to Drain Diode Specifications T

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage (Note 1) V
Reverse Recovery Time t

NOTE:

2. Pulse Test: Pulse width ≤300µs, Duty Cycle ≤2%.

7-12

= 25oC Unless Otherwise Specified

C

TJ = 25oC, ISD =- 8A, VGS = 0V - - -1.5 V

SD

TJ = 25oC, ISD =- 8A, dISD/dt = 100A/µs - - 125 ns

rr

RFD8P06LE, RFD8P06LESM, RFP8P06LE

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 175

TC, CASE TEMPERATURE (oC)

Unless Otherwise Specified

125

FIGURE 1. NORMALIZEDPOWER DISSIPATION vs CASE

TEMPERATURE

2.0

1.0

0.5

150

-10

-8

-6

-4

, DRAIN CURRENT (A)

D

I

-2

0

25 50 75 100

TC, CASE TEMPERATURE (oC)

125

150

FIGURE 2. MAXIMUMCONTINUOUSDRAIN CURRENT vs

CASE TEMPERATURE

175

0.2

0.1

0.1

, NORMALIZED

θJC

Z

THERMAL IMPEDANCE

0.05

0.02

0.01

SINGLE PULSE

0.01

-5

10

-100
TC = 25oC, TJ = MAX RATED

-10

-1

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

-0.1

-1 -10

DS(ON)

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

NOTES:DUTY FACTOR: D = t
PEAK TJ = PDM x Z

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

-2

10

-1

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

2

-10
TC = 25oC
FOR TEMPERATURES ABOVE 25oC

DERATE PEAK CURRENT

CAPABILITY AS FOLLOWS:

-3

10

t, PULSE WIDTH (ms)

V

DS(MAX)

= -60V

100µs

1ms

10ms
100ms

DC

-100

VGS = -10V

VGS = -5V

, PEAK CURRENT (A)

DM

-10

I

-5
10

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION

-5

-4

10

II

-2

10

P

DM

t

1

t

2

xR

θJC

θJC

0

10

175 TC–



=

----------------------- -



25

150



-1

10

1/t2

10

+ T

C

1

10

0

1

10

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

7-13

RFD8P06LE, RFD8P06LESM, RFP8P06LE

Typical Performance Curves

-30

-10

STARTING TJ = 150oC

If R = 0

, AVALANCHE CURRENT (A)

tAV = (L) (IAS) / (1.3RATED BV

AS

I

If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BV

-1

0.01 0.1 1 10
, TIME IN AVALANCHE (ms)

t

AV

DSS

Unless Otherwise Specified

STARTING TJ = 25oC

- VDD)

- VDD) + 1]

DSS

NOTE: Refer to Intersil Application Notes AN9321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

-30

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

V

DD

= -15V

-25

-20

-15

-55oC
25oC

175oC

-30

PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX

= 25oC

T

-25

C

-20

-15

-10

, DRAIN CURRENT (A)

D

I

-5

0

0 -1.5 -3.0 -4.5 -7.5

VDS, DRAIN TO SOURCE VOLTAGE (V)

V

GS

VGS = -5V

VGS = -4.5V
VGS = -4V

VGS = -3V

-6.0

FIGURE 7. SATURATION CHARACTERISTICS

600

ID = -8A

= -4A

I

500

400

D

I

D

I

D

= -2A
= -1A

= -10V

-10

, ON-STATE DRAIN CURRENT (A)

-5

D(ON)

I

0

0 -3.0 -4.5 -6.0 -7.5-1.5

VGS, GATE TO SOURCE VOLTAGE (V)

300

, ON-STATE RESISTANCE (mΩ)

DS(ON)

r

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

200

-2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5.0
V

, GATE TO SOURCE VOLTAGE (V)

GS

FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

2.25

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

2.00

VGS = -5V, ID = -8A

1.75

1.50

1.25

1.00

0.75

NORMALIZED ON RESISTANCE

0.50

-80

-40 0
T

, JUNCTION TEMPERATURE (oC)

J

40

160 200

120

80

2.0
ID = -250µA

1.15

1.1

1.05

1.0

BREAKDOWN VOLTAGE

0.95

NORMALIZED DRAIN TO SOURCE

0.9

-80 160 200

-40 0 40
, JUNCTION TEMPERATURE (oC)

T

J

80

120

FIGURE 10. NORMALIZEDDRAINTO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

7-14

FIGURE 11. NORMALIZEDDRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

RFD8P06LE, RFD8P06LESM, RFP8P06LE

Typical Performance Curves

1.4
VGS = VDS,ID = -250µA

Unless Otherwise Specified

1.2

1.0

0.8

NORMALIZED GATE

THRESHOLD VOLTAGE

0.6

-80 -40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)

FIGURE 12. NORMALIZEDGATE THRESHOLD VOLTAGEvs

JUNCTION TEMPERATURE

-60

-45

-30

-15

, DRAIN TO SOURCE VOLTAGE (V)

DS

V

0

VDD =BV

I

G(REF)

20

I

G(ACT)

DSS

0.75 BV

0.50 BV

0.25 BV

V

RL = 7.5Ω
I

= -0.20mA

G(REF)

DSS
DSS
DSS

= -5V

GS

t, TIME ( µs)

0.75 BV

0.50 BV

0.25 BV

VDD = BV

DSS
DSS
DSS

80

DSS

I

G(REF)

I

G(ACT)

-5.00

-3.75

-2.50

-1.25

0.00

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 14. NORMALIZEDSWITCHING WAVEFORMS FOR

CONSTANT GATE CURRENT

200

, GATE TO SOURCE VOLTAGE (V)

GS

V

125

VDD = -30V, ID = -8A, RL= 3.75Ω

t

r

100

75

50

SWITCHING TIME (ns)

t

d(OFF)

t

f

25

t

d(ON)

0

10

20 30 40 500

RGS, GATE TO SOURCE RESISTANCE (Ω)

FIGURE 13. SWITCHING TIMEASA FUNCTION OF GATE

RESISTANCE

1000

800

600

400

C, CAPACITANCE (pF)

200

0

0

C

ISS

C

OSS

C

RSS

-10 -20 -30 -40 -50
VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 0V, f = 0.1MHz

= CGS + C

C
C
C

ISS
RSS
OSS

= C

≈ CDS + C

GD

GD

GD

-60

FIGURE 15. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

Test Circuits and Waveforms

V

DS

VARY tP TO OBTAIN
REQUIRED PEAK I

0V

t

P

-V

GS

AS

L

R

G

­V

DD

+

DUT

I

AS

0.01Ω

0

V

DD

I

AS

t

P

FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 17. UNCLAMPED ENERGY WAVEFORMS

7-15

BV

t

AV

DSS

V

DS

RFD8P06LE, RFD8P06LESM, RFP8P06LE

Test Circuits and Waveforms

0V

R

GS

-V

GS

FIGURE 18. SWITCHING TIME TEST CIRCUIT FIGURE 19. RESISTIVE SWITCHING WAVEFORMS

V

DS

(Continued)

R

L

DUT

R

L

t

ON

t

d(ON)

t

0

-

+

V

DS

0

r

10%

90%

10%

50%

V

GS

Q

0

g(TH)

PULSE WIDTH

t

d(OFF)

V

DS

t

OFF

50%

90%

90%

t

f

10%

VGS= -1V

VGS= -5V

g(TOT)

-I

G(REF)

-V

V

GS

­V

DD

+

DUT

GS

Q

g(-5)

V

DD

Q

0

I

g(REF)

FIGURE 20. GATE CHARGE TEST CIRCUIT FIGURE 21. GATE CHARGE WAVEFORMS

VGS= -10V

7-16

PSpice Electrical Model

RFD8P06LE, RFD8P06LESM, RFP8P06LE

.SUBCKT RFD8P06LE 2 1 3 REV 7/29/96

CA 12 8 1.50e-9
CB 15 14 1.50e-9
CIN 6 8 6.30e-10

DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DESD1 91 9 DESD1MOD
DESD2 91 7 DESD2MOD
DPLCAP 10 6 DPLCAPMOD

EBREAK 5 11 17 18 -67.9
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTHRES 21 6 19 8 1
EVTEMP 6 20 18 22 1

IT 8 17 1

LDRAIN 2 5 1e-10
LGATE 1 9 2.92e-9
LSOURCE 3 7 2.92e-9

MSTRONG 16 6 8 8 MstrongMOD
MMED 16 6 8 8 MmedMOD
MWEAK 16 21 8 8 MweakMOD

RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 95e-3
RGATE 9 20 2.89
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RSourceMOD 97e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1

S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD

GATE

LGATE

1

RLGATE

RGATE

9

DESD1
91
DESD2

CA

10

DPLCAP

EVTEMP

-

+

18
22

20

S1A

12

13

8

S1B

EGS EDS

13

RSLC2

6

14
13

+

+

6
8

-

-

ESG

+-

8
6

EVTHRES

+

19

8

S2A

S2B

15

CIN

CB

-

+

5
8

-

5

RSLC1

51

+

5

51

-

50

RDRAIN

21

MSTRO

14

ESLC

16

8

EBREAK

MMED

IT

8

+

17
18

-

MWEAK

DBREAK

RSOURCE

17 18

11

7

RBREAK

-

+

RVTHRES

22

LDRAIN

RLDRAIN

DBODY

LSOURCE

RLSOURCE

RVTEMP
19

VBAT

DRAIN

2

SOURCE

3

VBAT 22 19 DC 1

ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/26,7))}

.MODEL DBDMOD D (IS=2.5e-12 RS=4e-2 IKF=0.01 N=0.97 TIKF=0.012 TRS1=0.8e-4 TRS2=-5e-6 CJO=5.25e-10 VJ=0.75 M=0.41 TT=7.50e-8)
.MODEL DBKMOD D (IKF=5 N=0.75 RS=0.245 TRS1=1e-3 TRS2=1.6e-4)
.MODEL DESD1MOD D (BV=16.4 TBV1=-1.25e-3 TBV2=5.79e-7 RS=36 NBV=50 IBV=7e-6)
.MODEL DESD2MOD D (BV=16.2 TBV1=-8.3e-4 TBV2=8.9e-7 NBV=50 IBV=7e-6)
.MODEL DPLCAPMOD D (CJO=4.25e-10 IS=1e-30 N=10 VJ=0.499 M=0.561)
.MODEL MSTRONGMOD PMOS (VTO=-1.91 KP=11.55 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MMEDMOD PMOS (VTO=-1.51 KP=0.95 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MWEAKMOD PMOS (VTO=-1.18 KP=0.03 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.045e-3 TC2=-3.5e-7)
.MODEL RDSMOD RES (TC1=0.92e-2 TC2=1.55e-5)
.MODEL RSOURCEMOD RES (TC1=2e-3 TC2=0.5e-6)
.MODEL RSCLMOD RES (TC1=2e-3 TC2=0)
.MODEL RVTHRESMOD RES (TC1=-2.5e-3 TC2=0)
.MODEL RVTEMPMOD RES (TC1=-1.55e-3 TC2=7.5e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.25 VOFF=1.75)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.75 VOFF=5.25)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.5 VOFF=-0.5)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.5 VOFF=0.5)
.ENDS

NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature
Options; authored by William J. Hepp and C. Frank Wheatley.

7-17

RFD8P06LE, RFD8P06LESM, RFP8P06LE

PSpice Thermal Model

REV 7/29/96

RFP8P06LE

CTHERM1 7 6 1.3e-4
CTHERM2 6 5 4.5e-4
CTHERM3 5 4 1e-3
CTHERM4 4 3 2e-3
CTHERM5 3 2 1.5e-2
CTHERM6 2 1 0.55

RTHERM1 7 6 3.0e-2
RTHERM2 6 5 5.0e-2
RTHERM3 5 4 0.1
RTHERM4 4 3 1.15
RTHERM5 3 2 1.20
RTHERM6 2 1 0.55

RFD8P06LE, RFD8P06LESM

CTHERM1 7 6 1.3e-4
CTHERM2 6 5 4.5e-4
CTHERM3 5 4 1e-3
CTHERM4 4 3 2e-3
CTHERM5 3 2 1.5e-2
CTHERM6 2 1 0.12

RTHERM1 7 6 3.0e-2
RTHERM2 6 5 5.0e-2
RTHERM3 5 4 0.1
RTHERM4 4 3 1.15
RTHERM5 3 2 1.20
RTHERM6 2 1 0.55

RTHERM1

RTHERM2

RTHERM3

RTHERM4

RTHERM5

JUNCTION

7

CTHERM1

6

CTHERM2

5

CTHERM3

4

CTHERM4

3

CTHERM5

2

RTHERM6

CASE

1

CTHERM6

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications atan ytime with­out notice. Accordingly,the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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7-18