Page 1
RFP8N20L
Data Sheet July 1999
8A, 200V, 0.600 Ohm, Logic Level,
N-Channel Power MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is specifically designed for use with logic
level (5V) driving sources in applications such as
programmable controllers, automotive switching and
solenoid drivers. This performance is accomplished through
a special gate oxide design which provides full rated
conduction at gate biases in the 3V to 5V range, thereby
facilitating true on-off power control directly fromlogiccircuit
supply voltages.
Formerly developmental type TA09534.
Ordering Information
PART NUMBER PACKAGE BRAND
RFP8N20L TO-220AB RFP8N20L
NOTE: When ordering, include the entire part number.
File Number
Features
• 8A, 200V
•r
DS(ON)
• Design Optimized for 5V Gate Drives
• Can be Driven Directly from QMOS, NMOS,
TTL Circuits
• Compatible with Automotive Drive Requirements
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedence
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.600Ω
Components to PC Boards”
1514.3
Packaging
Symbol
D
G
S
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
6-278
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
Page 2
RFP8N20L
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
RFP8N20L UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
DS
D
DM
GS
D
200 V
200 V
8A
20 A
10 V
60 W
Above TC = 25oC, Derate Linearly. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.48 W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, T
STG
-55 to 150
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300
260
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V
GS(TH)
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
Drain to Source On-Voltage (Note 2) V
Drain to Source On Resistance (Note 2) r
Turn On Delay Time t
DS(ON)ID
DS(ON)ID
d(ON)
Rise Time t
Turn Off Delay Time t
d(OFF)
Fall Time t
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
DSS
DSS
GSS
r
f
ISS
OSS
RSS
JC
θ
ID = 250µA, VGS = 0 200 - - V
VGS = VDS, ID = 250µA 1-2V
VDS = 0.8 x Rated BV
VDS = 0.8 x Rated BV
DSS
DSS
TC = 25oC--1µA
TC = 125oC- -50µA
VGS = 10V, VDS = 0 - - 100 nA
= 8A, VGS = 5V - - 4.8 V
= 4A, VGS = 5V - - 0.600 Ω
ID= 4A, VDD = 50V, RG= 6.25 , VGS = 5V - 15 45 ns
- 45 150 ns
- 100 135 ns
- 60 105 ns
VGS = 0V, VDS = 25V, f = 1MHz - - 900 pF
- - 250 pF
- - 120 pF
RFP8N20L 2.083oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) V
Diode Reverse Recovery Time t
SD
rr
NOTES:
2. Pulsed: pulse duration = 300µs max, duty cycle = 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature.
6-279
ISD = 4A - - 1.4 V
ISD= 4A, dISD/dt = 100A/µs - 250 - ns
Page 3
RFP8N20L
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 50 100 150
TC, CASE TEMPERATURE (oC)
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWERDISSIPATION vs CASE
TEMPERATURE
24
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
20
16
VGS = 10V
12
8
4
DRAIN TO SOURCE CURRENT (A)
DS,
I
0
0 34567
VGS = 5V
21
V
DRAIN TO SOURCE VOLTAGE (V)
DS,
VGS = 4V
VGS = 3V
V
GS
TC = 25oC
= 2V
100
OPERATION IN THIS AREA
LIMITED BY r
10
1
, DRAIN CURRENT (A)
D
I
0.1
DS(ON)
DC OPERATION
60W
100 1000101
VDS, DRAIN TO SOURCE (V)
TC=25oC
= MAX RATED
T
J
FIGURE 2. FORWARD BIAS SAFE OPERATING AREA
16
VDS= 10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
12
8
4
, DRAIN TO SOURCE CURRENT (A)
DS(ON)
I
0
012345
125oC
, GATE TO SOURCE VOLTAGE (V)
V
GS
-40oC
o
25
-40oC
C
o
125
C
FIGURE 3. SATURATION CHARACTERISTICS FIGURE 4. TRANSFER CHARACTERISTICS
1.2
VDS = 5V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
1.0
0.8
0.6
0.4
RESISTANCE(Ω)
, DRAIN TO SOURCE ON
0.2
DS(ON)
r
0
0 5 10 15 20
I
DRAIN CURRENT (A)
D,
125oC
25oC
-40oC
FIGURE 5. DRAIN TO SOURCE ONRESISTANCEvs DRAIN
CURRENT
2.0
ID= 4A, VGS = 5V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
1.5
1.0
ON RESISTANCE
0.5
NORMALIZED DRAIN TO SOURCE
0
-50 0 50 100 150
T
, JUNCTION TEMPERATURE (oC)
J
FIGURE 6. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
6-280
Page 4
RFP8N20L
Typical Performance Curves
1.3
VDS= V
GS
ID= 250µA
1.2
1.1
1.0
0.9
0.8
NORMALIZED GATE
0.7
THRESHOLD VOLTAGE (V)
0.6
0.5
-50 0 50 100 150
, JUNCTION TEMPERATURE (oC)
T
C
Unless Otherwise Specified (Continued)
FIGURE 7. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
200
BV
DSS
150
100
50
DRAIN TO SOURCE VOLTAGE (V)
DS,
V
VDD= BV
0
I
G(REF)
20 80
I
G(ACT)
RL = 25
I
= 0.45mA
G(REF)
VGS = 5V
DSS
SOURCE
VOLTAGE
0.75 BV
0.50 BV
0.25 BV
DRAIN SOURCE VOLTAGE
VDD= BV
GATE
DSS
DSS
DSS
t, TIME (µs)
800
700
600
500
400
300
C, CAPACITANCE (pF)
200
100
0
0 1020304050
V
VGS = 0V, f = 1MHz
C
= CGS + C
ISS
C
= C
RSS
C
OSS
DRAIN TO SOURCE VOLTAGE (V)
DS,
GD
≈ CDS + C
GD
GD
C
C
C
ISS
OSS
RSS
FIGURE 8. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
8
6
DSS
4
2
GATE TO SOURCE VOLTAGE (V)
GS,
V
I
G(REF)
I
G(ACT)
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 9. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
R
G
V
GS
FIGURE 10. SWITCHING TIME TEST CIRCUIT FIGURE 11. RESISTIVE SWITCHING WAVEFORMS
6-281
t
ON
t
d(ON)
t
R
L
+
V
DD
-
DUT
V
DS
90%
0
V
GS
10%
0
r
10%
50%
PULSE WIDTH
t
d(OFF)
90%
t
OFF
50%
t
f
10%
90%
Page 5
RFP8N20L
Test Circuits and Waveforms
V
DS
V
GS
I
G(REF)
FIGURE 12. GATE CHARGE TEST CIRCUIT FIGURE 13. GATE CHARGE WAVEFORMS
(Continued)
R
L
DUT
V
DD
+
V
DD
-
VGS= 1V
0
I
G(REF)
0
V
GS
Q
g(TH)
Q
g(TOT)
V
DS
VGS= 10V
Q
g(5)
VGS= 5V
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6-282
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