Datasheet RFP2N12L Datasheet (Intersil)

RFP2N12L

Data Sheet April 1999

2A, 120V, 1.750 Ohm, Logic Level,
N-Channel Power MOSFET

The RFP2N12L is an N-Channel enhancement mode silicon
gate powerfield effect transistorspecifically designed for use
with logic level (5V) driving sources in applications such as
programmable controllers, automotive switching, and
solenoid drivers. This performance is accomplished through
a special gate oxide design which provides full rated
conduction at gate biases in the 3V - 5V range, thereby
facilitating true on-off power control directly from logic circuit
supply voltages.

Formerly developmental type TA09528.

Ordering Information

PART NUMBER PACKAGE BRAND

RFP2N12L TO-220AB RFP2N12L

NOTE: When ordering, include the entire part number.

File Number

Features

• 2A, 120V

•r

DS(ON)

• Design Optimized for 5V Gate Drives

• Can be Driven Directly from QMOS, NMOS,
TTL Circuits

• Compatible with Automotive Drive Requirements

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Majority Carrier Device

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 1.750Ω

Components to PC Boards”

2874.2

Packaging

Symbol

D

G

S

JEDEL TO-220AB

SOURCE

DRAIN

GATE

DRAIN (FLANGE)

6-252

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

RFP2N12L

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

RFP2N12L UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage RGS = 20KΩ (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

GS

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

DM

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

D

D

120 V
120 V
±10 V

2A
5A

25 W

Derate Above TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/oC

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

-55 to 150

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V
Zero-Gate Voltage Drain Current I

DSSID

GS(TH)VGS

DSS

= 250µA, VGS = 0 120 - - V

= VDS, ID = 250µA (Figure 8) 1 - 2 V
VDS = Rated BV
VDS = 0.8 x Rated BV

, VGS= 0V - - 1 µA

DSS

, VGS = 0V,

DSS

--25µA

TC = 125oC

Gate to Source Leakage Current I
Drain to Source On Voltage (Note 2) V
Drain to Source On Resistance (Note 2) r
Turn-On Delay Time t

DS(ON)ID

DS(ON)ID

d(ON)ID

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R

GSS

OSS

VGS = ±10V, VDS = 0V - - ±100 nA

= 2A, VGS = 5V - - 3.5 V
= 2A, VGS = 5V (Figure 6, 7) - - 1.750 Ω

≈ 2A, V

RL= 75Ω, VGS = 5V

r

(Figures 10, 11, 12)

= 75V, RG= 6.25Ω,

DD

-1025ns

-1045ns

-2445ns

f

VGS = 0V, VDS = 25V, f = 1MHz

ISS

(Figure 9)

RSS

JC

θ

-2025ns

- - 200 pF

- - 80 pF

- - 35 pF

--5oC/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage (Note 2) V
Diode Reverse Recovery Time t

NOTES:

2. Pulsed: pulse duration = 300µs max, duty cycle = 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature.

6-253

ISD = 2A - - 1.4 V

SD

ISD = 2A, dlSD/dt = 50A/µs - 150 - ns

rr

RFP2N12L

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 125 150

, CASE TEMPERATURE (oC)

T

C

Unless Otherwise Specified

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

10

OPERATION IN THIS AREA
LIMITED BY r

1

DS(ON)

TJ = MAX RATED

= 25oC

T

C

2.5

2.0

1.5

1.0

, DRAIN CURRENT (A)

D

I

0.5

0

25 50 75 100 125 150

T

, CASE TEMPERATURE (oC)

C

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

4

T

= 25oC

C

PULSE DURATION = 80µs

3

VGS = 10V

VGS = 5V

V

= 4V

GS

2

0.10

, DRAIN CURRENT (A)

D

I

0.01
1

V

DS

10 100 1000

, DRAIN TO SOURCE VOLTAGE (V)

, DRAIN CURRENT (A)

1

D

I

0

1234567

V

DS,

DRAIN TO SOURCE VOLTAGE (V)

FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. SATURATION CHARACTERISTICS

6

VDS= 15V
PULSE DURATION = 80µs

5

4

3

2

o

125

, DRAIN TO SOURCE CURRENT (A)

1

DS(ON)

I

012 34 5

C

-40oC

V

, GATE TO SOURCE VOLTAGE (V)

GS

-40oC

25oC

125oC

VGS = 5V
PULSE DURATION = 80µs

4

3

2

RESISTANCE (Ω)

, DRAIN TO SOURCE ON

DS(ON)

r

1

0.5
01234

ID,DRAIN CURRENT (A)

VGS = 3V

VGS = 2V

8910

125oC

25oC

o

-40

C

FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN

CURRENT

6-254

RFP2N12L

Typical Performance Curves

= 250µA

I

D

VGS = 5V

2.0

1.5

1.0

ON RESISTANCE

0.5

NORMALIZED DRAIN TO SOURCE

-50 0 50 100 150 200
T

, JUNCTION TEMPERATURE (oC)

J

Unless Otherwise Specified (Continued)

FIGURE 7. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

240

200

160

120

80

C, CAPACITANCE (pF)

40

01020304050

V

DRAIN TO SOURCE VOLTAGE (V)

DS,

VGS = 0V, f = 1MHz

= CGS + C

C

ISS

C

= C

RSS
OSS

GD

≈ CDS + C

C

ISS

C

OSS

C

RSS

C

FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

GD

GD

1.5
VGS = V

DS

ID = 250µA

1.0

0.5

NORMALIZED GATE

THRESHOLD VOLTAGE

50 0 50 100 150

, JUNCTION TEMPERATURE (oC)

T

J

FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGEvs

JUNCTION TEMPERATURE

150

112.5

75

37.5

, DRAIN TO SOURCE VOLTAGE (V)

DS

V

RL = 75Ω

I

G(REF)

V

SOURCE

VDD= BV

0

I

G(REF)

20 80

I

G(ACT)

VOLTAGE

DSS

0.75BV

0.50BV

0.25BV

DRAIN SOURCE

= 0.095mA

= 10V

GS

GATE

VDD= BV

DSS
DSS
DSS

VOLTAGE

t, TIME (µs)

DSS

I

G(REF)

I

G(ACT)

10

8

6

4

2

0

NOTE: Refer to Intersil Applications Notes AN7254 and AN7260

FIGURE 10. NORMALIZED SWITCHING WAVEFORMSFOR

CONSTANT GATE CURRENT

, GATE TO SOURCE VOLTAGE (V)

GS

V

Test Circuits and Waveforms

R

G

V

GS

FIGURE 11. SWITCHING TIME TEST CIRCUIT FIGURE 12. RESISTIVE SWITCHING WAVEFORMS

6-255

t

ON

t

d(ON)

t

R

L

+

V

DD

-

DUT

V

DS

0

V

GS

0

90%

10%

r

10%

50%

PULSE WIDTH

t

d(OFF)

90%

t

OFF

50%

t

f

90%

10%

RFP2N12L

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Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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