Datasheet RF2713, RF2713PCBA-D, RF2713PCBA-M Datasheet (RF Micro Devices)

Page 1
Preliminary
RF2713
7
Typical Applications
• Digital and Analog Receivers and Transmitters
• High Data Rate Digital Communications
Product Description
The RF2713 is a monolithic integrated quadrature modu­lator/demodulator. The demodulator is used to recover the I and Q baseband signals from the amplified and fil­tered IF. Likewise, the inputsand outputs can be reconfig­ured to modulate I/Q signals onto an RF carrier. The RF2713 is intended for IF systems where the IF fre­quency ranges from 100 kHz to 250MHz, and the LO fre­quency is two times the IF. The IC contains all of the required components to implement the modulation/ demodulation function and contains a digital divider type 90 ° phase shifter, two double balanced mixers, and base­band amplifiers designed to interface with Analog to Digi­tal Converters. The unit operates from a single 3V to 6V power supply.
QUADRATURE MODULATOR/DEMODULATOR
• Spread-Spectrum Communication Systems
• Interactive Cable Systems
• Portable Battery-Powered Equipment
.
0
8
0
0
4
0
.
0
0
8
4
8
6
.
0
0
3
5
0
.
0
0.337
0.334
8° MAX
0° MIN
0.034
0.016
0.157
0.150
2
0
.
0
.
2
1
.
0
0
0
.
0
1
0.050
4
4
2
9
0.009
0.007
5
UPCONVERTERS
MODULATORS AND
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS
ü
I INPUT A
I INPUT B
Q INPUT A
Q INPUT B
BG OUT
IIFOUT
QIFOUT
SiGe HBT
1
2
3
4
5
6
7
Si CMOS
QUAD
DIV.
BY 2
14
VCC
13
LO INPUT
12
GND
11
GND
10
GND
9
I OUT
8
Q OUT
Functional Block Diagram
Package Style: SOIC-14
•3Vto6VOperation
• Modulation or Demodulation
• IF From 100kHz to 250MHz
• Baseband From DC to 50MHz
• Digital LO Quadrature Divider
• Low Power and Small Size
Ordering Information
RF2713 Quadrature Modulator/Demodulator RF2713 PCBA-D Fully Assembled Evaluation Board (Demodulator) RF2713 PCBA-M Fully Assembled Evaluation Board (Modulator)
RF Micro Devices, Inc. 7625 Thorndike Road Greensboro,NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A2 010129
7-17
Page 2
RF2713
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.5 to 7.0 V IF Input Level 500 mV Operating Ambient Temperature -40 to +85 ° C
Storage Temperature -40 to +150 °C
DC
PP
Preliminary
Caution! ESD sensitive device.
RF Micro Devices believesthe furnishedinformation is correctand accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice.RF Micro Devices does not assume responsibility for the use of the described product(s).
5
Parameter
Min. Typ. Max.
Overall
IF Frequency Range 0.1 to 250 MHz For IF frequencies below ~2.5MHz, the LO
Baseband Frequency Range DC to 50 MHz Input Impedance 1200 || 1pF Each input, single-ended
Specification
Unit Condition
T=25°C, VCC=3.0V,IF=100MHz, LO=200MHz, F
should be a square wave. IF frequencies lower than 100kHz are attainable if the LO is a square waveand sufficiently large DC blocking capacitors are used.
MOD
=500kHz
LO
Frequency Twice (2x) the IF frequency. For IF frequen-
UPCONVERTERS
MODULATORS AND
Level 0.06 to 1 V Input Impedance 500 || 1pF
PP
Demodulator
cies below ~2.5MHz, the LO should be a square wave. IF frequencies lower than 100kHz are attainable if the LO is a square wave and sufficiently large DC blocking capacitors are used.
IFIN=28mVPP,LO=200mVPP,Z
LOAD
=10k
Configuration
LOAD
OUT OUT
OUT
and Q
=50
and Q and Q
OUT OUT
OUT
to GND to GND
Output Impedance 50 || 1pF Each output, I Maximum Output 1.4 V Voltage Gain 20 dB V
22.5 24 25.1 dB V
Noise Figure 24 dB Single Sideband, IF Input of device reac-
35 dB Single Sideband, 50 shuntresistoratIF
Input Third Order Intercept Point
)
(IIP
3
I/Q Amplitude Balance 0.1 0.5 dB Quadrature Phase Error 1 ° DC Output 800 mV V
2.0 2.4 2.8 V V
DC Offset <10 100 mV I
-22 dBm V
-11 dBm V
-19 VCC=5.0V,IF Input of device reactively
-8 dBm V
-28 dBm V
PP
Saturated
=3.0V
CC
=5.0V
CC
tively matched Input
=3.0V,IF Input of device reactively
CC
matched
=3.0V,50shunt resistor at IF Input
CC
matched
=5.0V,50shunt resistor at IF Input
CC
=5.0V,IF Input of device reactively
CC
matched, Z
=3.0V,I
CC
=5.0V,I
CC
to Q
OUT
OUT
7-18
Rev A2 010129
Page 3
Preliminary
RF2713
Parameter
Min. Typ. Max.
Modulator Configuration
Maximum Output 200 mV Input Voltage 90 mV Voltage Gain 6 dB Single Sideband
I/Q Amplitude Balance 0.1 dB Quadrature Phase Error <±1 ° Carrier Suppression 25 dBc Unadjusted. Carrier Suppression may be
Sideband Suppression 30 dBc
Specification
Unit Condition
IFIN=28mVPP, LO=200mVPP, Z
=1200
LOAD
Saturated
PP
Single Sideband, 1dB Gain Compress ion.
PP
optimized further by adjusting the DC offset level between the A and B inputs.
Power Supply
Voltage 2.7 to 6 V Operating limits Current 8 mA V
81012mAV
CC CC
=3.0V =5.0V
5
UPCONVERTERS
MODULATORS AND
Rev A2 010129
7-19
Page 4
5
RF2713
Preliminary
Pin Function Description (Demodulator Configuration) Interface Schematic
1IINPUTA
2IINPUTB 3QINPUTA
UPCONVERTERS
MODULATORS AND
4QINPUTB 5BGOUT
6 I IF OUT
When the RF2713 is configured as a Quadrature Demodulator, both mixers are driven by the IF. Whether driving the mixers single-endedly (as shown in the appl ication schematic) or differentially, the A Inputs (pins 1 and 3) should be connected to each other.Likewise, both B Inputs (pins 2 and 4) should be connected to each other. This ensures that the IF will reach each mixer with the same amplitude and phase, yielding the best I and Q output amplitude and quadrature balance. Note that connecting the inputs in parallel changes the input imped­ance (see the Gilbert Cell mixer equivalent circuit). The single-ended input impedance (as shown in the application circuit) becomes 630Ω, but in the balanced configuration, the input impedance would remain 1260Ω.
The mixers are Gilbert Cell designs with balanced inpu ts. The equiva­lent schematic for one of the mixers is shown on the following page. The input impedance of each pin is determined by the 1260resistor
in parallel with a transistor base. Note from the schematic that
to V
CC
all four input pins have an internally set DC bias. For this reason, all four inputs (pins 1 through 4) should be DC blocked. The capacitance values of the blocking capacitors is determined by the IF frequency. When dr iving single-endedly, both the series (pins 1 and 3) and shunt (pins 2 and 4) blocking capacitors should be low impedances, relative to the 630input impedance.
Same as pin 1, except complementary input. See pin 1. Same as pin 1, except Q Buffer Amplifier. See pin 1. Same as pin 3, except complementary input. See pin 1. Band Gap voltage reference output. This voltage output is held con-
stant over variations in supply voltage and operatin g temperature and may be used as a reference for other external circuitry. This pin should not be loaded such that the sourced current exceeds 1mA. This pin should be bypassed with a large (0.1µF) capacito r.
This pin is not used in the Demodulator Configuration, but must be con­nected to V
in order to properly bias the I mixer.
CC
INPUT A
V
CC
1260
V
CC
1260
INPUT B
IF OUT
7 Q IF OUT 8QOUT
9IOUT
10 GND 11 GND
12 GND
7-20
Same as pin 6, except Q mixer. Same as pin 6. Q Mixer’s Base band Output. This pin is NOT internally DC blockedand
has DC present due to internal biasing. This is an emitter-follower type output with an internal 2kpull-down resistor.Even though the AC out­put impedance is ~50, this pin is intended to drive only high imped­ance loads such as an opamp or an ADC. The output transistor is NOT biased su ch that it can drive a large signal into a 50load. DC cou­pling of this output is permitted provided that the D C impedance to ground, which appears in parallel with the internal pull-down resistor, is significantly greater than 2kΩ.
Same as pin 8, except Q Mixer’s Baseband Output. Same as pin 8. Ground connection. Keep traces physically short and connect imm edi-
ately to ground plane for best performance. Same as pin 10.
Same as pin 10.
V
CC
I/Q OUT
2k
Rev A2 010129
Page 5
Preliminary
RF2713
Pin Function Description (Demodulator Configuration) Interface Schematic
13 LO INPUT
14 VCC
High impedance, single-ended modula tor LO input. The LO applied to this pin is frequency divided by a factor of 2 and becomes the "Carrier". For direct de m odulation, the Carrier is equal in frequency to the center of the input IF spectrum (except in the case of SSB/SC). The input impedance is determined by an internal 500bias resistor to V
external blocking capacitor should be provided if the pin is connected to a device with DC present. Matching the input impedance is typically achieved by adding a 51resistor to ground on the source side of the ACcouplingcapacitor.For the LO input, maximum power transfer is not critical. The internal LO switching circuits are controlled by the voltage, not power, into the part. In cases where the LO source does not have enough available voltage, a reactive match (voltage transformer) can be used. The LO circuitry consis ts of a limiting amplifier followed by a digital divider. The limiting amp ensures that the flip-flop type divider is driven with a square wave over a wide range of input levels. Because the flip-flop uses the rising and falling edges of the limiter output, the quadrature accuracy of the Carrier supplied to the mixers is directly related to the duty cycle, or equivalently to the even harmonic content, of the input LO signal. In particular, care should be taken to ensure that the 2xLO level input to this pin is at least 20dB below the LO level. Oth­erwise, the LO input is not sensitive to the type of input wave form, except for IF frequencies below ~2.5MHz, in which case the LO input should be a square wave, in order to ensu re proper triggering of the flip-flops. IF frequencies below 100kHz are attainable if the LO is a square wave and sufficiently large DC blocking capacitors are used.
Voltage supply for the entire device. This pin should be well bypassed at all frequencies (IF, LO, Carrier, Baseband) that are present in the part.
CC
.An
LO IN
V
CC
500
V
CC
500
5
UPCONVERTERS
MODULATORS AND
Rev A2 010129
7-21
Page 6
5
RF2713
Preliminary
Pin Function Description (Modulator Configuration) Interface Schematic
1IINPUTA
UPCONVERTERS
MODULATORS AND
2IINPUTB 3QINPUTA 4QINPUTB 5BGOUT
6 I IF OUT
When the RF2713 is configured as a Quadrature Modulator, each mixer is driven by an independent baseband modulation channel (I and Q). The mixers can be driven single-endedly (as shown in the modula­tor application circuit) or differentially. When driving single-endedly, the B Inputs (pins 2 and 4) should be connected to each other. This ensures that the baseband signals will reach each mixer with the same DC reference, yielding the best carrier suppression. Note that the input impedance changes according to the drive mode (see the mixer equiv­alent circuit on the previous page). The single-ended input impedance (as shown in the modulator application circuit) is 1200for each of the two inputs. In the balanced configuration, the input impedance would be 2400for each of the two inputs.
The mixers are Gilbert Cell designs with balanced inpu ts. The equiva­lent schematic for one of the mixers is shown on the previous page. The input impedance of each pin is determined by the 1200resistor
in parallel with a transistor base. Note from the schematic that
to V
CC
all four input pins have an internally set DC bias. For this reason, all four inputs (pins 1 through 4) should be DC blocked. The capacitance values of the blocking capacitors is determined by the baseband fre­quency.When driving single-endedly,both the series(pi ns 1 and 3) and shunt (pins 2 and 4) blocking capacitors should be lowimpedances, rel­ative to the input impedance.
DC bias voltages may be supplied to the inputs pins, if required, in order to increase the amount of carrier suppression. For example, the DC levels on the reference inputs (pins 2 and 4) may be offset from each other by adding different resistor values to ground. These resis­tors should be larger than 2kΩ. Note from the mixer schematic that all four input pins have an internally set DC bias. If DC bias is to be sup­plied, the allowable ranges are limited. For 5V applications, the DC ref­erence on both I pins or both Q pins must not go below 2.7V
no case should the DC voltageon any of the fourpinsgo below2.0V or above 5.5VDC. IF a DC reference is to be supplied, the source must also be capable of sinking current. If optimizing carrier suppression fur-
ther is not a concern, it is recommended that all four inputs (pins 1 through 4) be DC blocked.
Same as pin 1, except complementary input. See pin 1. Same as pin 1, except Q Buffer Amplifier. See pin 1. Same as pin 3, except complementary input. See pin 1. Band Gap voltage reference output. This voltage output is held con-
stant over variations in supply voltage and operatin g temperature and may be used as a reference for other external circuitry. This pin should not be loaded such that the sourced current exceeds 1mA. This pin should be bypassed with a large (0.1µF) capacito r.
Connecting pins 6 and 7 to each other accomplishes the summing function of the upconverted I and Q channels. In addition, because these outpu ts are open collector type, they must be connected to V
in order to properly bias the Gilbert Cell mixers. Maximum gain and out­put power occur when the load on these two pins is ~1200.Inmost applications the impedance of the next stage will be lower and a reac­tive impedance transforming match should be used if maximum gain and output level are of concern. Biasing, DC blocking, and impedance transformation can simultaneously be achieved with the shunt-L / series-C topology shown in the Application Circuit. The inductance and capacitance values are chosen to achieve a specific impedance trans­forming ratio at a specific IF frequency. For applications where the gain is not as critical, a 1200resistor maybe added in parallel with a choke inductor in place of the matching inductor. If neither gain nor out­put level is critical, the inductor may be replaced with a resistor that sets the desired source impedance to drive the next stage. If the next stage is an "open" at DC, the blocking capacitor may be eliminated.
, and in
DC
INPUT A
DC
CC
V
CC
1260
V
CC
1260
INPUT B
IF OUT
7-22
Rev A2 010129
Page 7
Preliminary
RF2713
Pin Function Description (Modulator Configuration) Interface Schematic
7QIFOUT 8QOUT
9IOUT
10 GND 11 GND
12 GND 13 LO INPUT
14 VCC
Same as pin 6, except complementary input. Same as pin 6. Pins 8 and 9 are not used in a normal quadrature modulator applica-
tion, and are left unconnec ted. Note, however,that the outputs of each of these pins are independent upconverted I and Q channels. These signals may be useful in other applications where independent IF chan­nels are needed. Also note that these outputs are optimized as base­band outputs for the de modulator configuration. As a result, the gain rolls-off quickly with increasing frequency. This gain ro ll-off will limit the usefulness of these pins as independent I and Q upconverters. If these outputs are to be used, please refer to the D emodulator pin descrip­tions regarding load impedances.
Same as pin 8, except Q Mixer’s Output. Same as pin 8. Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performanc e. Same as pin 10.
Same as pin 10. High impedance, single-ended modula tor LO input. The LO applied to
this pin is frequency divided by a factor of 2 and becomes the "Carrier". For modulation, the Carrier is the center of the modulated output spec­trum (except in the case of SSB/SC). The input impedance is deter­mined byan internal 500bias resistor to V
capacitor should be provided if thepin isconn ectedto a devicewith DC present. Matching the input impedance is typically achieved by adding a51Ω resistor to ground on the source side of the AC coupling capaci- tor. For the LO input, maximum power transfer is not critical. The inter­nal LO switching circuits are controlled by the voltage, not power, into the part. In caseswhere the LOsourcedoes nothave enough available voltage, a reactive match (voltage transformer) can be used. The L O circuitry consists of a limiting amplifier followed bya digital divider. The limiting amp ensures that the flip-flop type divider is driven with a square wave over a wide range of input levels. Because the flip-flop uses the rising and falling edges of the limiter output, the quadrature accuracy of the Carrier supplied to the mixers is directly related to the duty cycle, or equivalently to the evenharmonic content, of the input LO signal. In particular, care should be taken to ensure that the 2xLO level input to this pin is at least 20dB below the LO level. Otherwise, the LO input is not sensitive to the type of input wave form, except for IF fre­quencies below ~2.5MH z, in which case the LO input should be a square wave, in order to ensure proper triggering of the flip-flops. IF fre­quencies below 100kHz are attainable if the LO is a square wave and sufficiently large DC blocking capacitors are used.
Voltage supply for the entire device. This pin should be well bypassed at all frequencies (IF, LO, Carrier, Baseband) that are present in the part.
. An external blocking
CC
LO IN
V
CC
V
CC
500
2k
I/Q OUT
V
CC
500
5
UPCONVERTERS
MODULATORS AND
Rev A2 010129
7-23
Page 8
5
RF2713
Preliminary
Gilbert Cell Mixer Equivalent Circuit
IF+ IF-
LO/2+
LO/2-
I/Q INPUT B I/Q INPUT A
UPCONVERTERS
MODULATORS AND
7-24
Rev A2 010129
Page 9
Preliminary
Application Schematic - Demodulator Configuration
IF IN
51
10 nF
10 nF
10 nF
RF2713
V
CC
100 nF
1
2
3
4
5
QUAD
DIV.
BY 2
14
13
100 nF
12
11
10
LO
51
V
CC
6
7
9
8
I OUT
Q OUT
Application Schematic - Modulator Configuration
V
CC
100 nF
10 nF
LO
51
BASEBAND I
BASEBAND Q
IF OUT
100 nF
51
100 nF
51
100 nF
100 nF
10 nF
1K
1
2
3
4
5
6
7
V
CC
QUAD
DIV.
BY 2
14
13
12
11
10
9
8
5
UPCONVERTERS
MODULATORS AND
Rev A2 010129
7-25
Page 10
RF2713
Preliminary
Evaluation Board Schematic - Demodulator Configuration
(Download Bill of Materials from www.rfmd.com.)
C5
0.1 uF
14
13
12
11
C4
0.1 uF
50 Ωµstrip
R2
50
VCC
J4
LO
J1
IF IN
50 Ωµstrip
C2
0.1 uF
C1
0.1 uF
R1
50
1
2
3
4
QUAD
DIV.
BY 2
5
C3
0.1 uF
VCC
P1
1
NC GND
2
UPCONVERTERS
MODULATORS AND
P1-3 VCC
3
CON3
5
6
7
10
9
8
2713401-
50 Ωµstrip
50 Ωµstrip
J3
I OUT
J2
Q OUT
Evaluation Board Schematic - Modulator Configuration
C6
14
13
12
11
10
9
8
2713400-
0.1 uF
C5
0.1 uF
50 Ωµstrip
R4
50
P1
P1-1 VCC
1 2 3
CON3
GND NC
VCC
J4
LO
J3
IF OUT
VCC
C1
R3
1k
0.1 uF
R1
50
C4
0.1 uF
1
2
3
4
5
6
7
QUAD
DIV.
BY 2
50 Ωµstrip
J1
I
R2
50 Ωµstrip
J2
Q
50 Ωµstrip
50
C2
0.1 uF
C3
0.1 uF
7-26
Rev A2 010129
Page 11
Preliminary
Demodulator Configuration (2713 PCBA-D)
RF2713
Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.031”, Board Material FR-4
5
UPCONVERTERS
MODULATORS AND
Rev A2 010129
7-27
Page 12
5
RF2713
Preliminary
Evaluation Board Layout
Modulato r Configuration (2713 PCB A-M)
Board Size 2.0” x 2.0”
Board Thickness 0.031”, Board Material FR-4
UPCONVERTERS
MODULATORS AND
7-28
Rev A2 010129
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