Datasheet RF2667, RF2667PCBA Datasheet (RF Micro Devices)

ü

7-1

7

QUADRATURE

DEMODULATORS

Product Description

Ordering Information

Typical Applications

Features

Functional Block Diagram

RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro,NC 27409, USA

Tel [phone]

Fax [phone]

http://www.rfmd.com

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS

SiGe HBT

Si CMOS

Quad.

÷

2

Input

Select

Gain

Control

Band Gap
Reference

19

4
5

8
9

CDMA IN+

CDMA IN-

FM IN+

FM IN-

BG OUT

23

GC

FL+FL-

10 24

PD

14IN SEL

18

Q OUT+

I OUT+

Q OUT­13
12

LO+

LO-

16
15

21
22

I OUT-

RF2667

RECEIVE AGC AND DEMODULATOR

• CDMA/FM Cellular Systems

• CDMA PCS Systems

• GSM/DCS Systems

• TDMA Systems

• Spread-Spectrum Cordless Phones

• Wireless Local Loop Systems

The RF2667 is an integrated complete IF AGC amplifier
and quadrature demodulator developed for the receive
section of dual-mode CDMA/FM cellular and PCS appli­cations and for GSM/DCS and TDMA systems. It is
designed to amplify received IF signals, while providing
100 dB of gain control range, and demodulate to base­band I and Q signals. Noise figure, IP

3

, and other specifi-

cations are designed to be compatiblewith the IS-98, and
J-STD-018 Interim Standard for CDMA cellular communi­cations. This circuit is part of the RFMD line of complete
solutions for digital radio applications.The IC is manufac­turedonanadvanced15GHzF

T

Silicon Bipolar process,

and is packaged in a standard miniature 24-lead plastic
QSOP package.

• Similar to RF9957with Higher I/Q Output
Voltage

• Supports Dual Mode Operation

• Digitally Controlled Power Down Mode

• 2.7V to 3.3V Operation

• IF AGC Amp with 100dB Gain Control

RF2667 Receive AGC and Demodulator
RF2667 PCBA Fully Assembled EvaluationBoard

7

Rev A14 010622

NOTES:

1. Shaded lead is Pin1.

2. All dimensions are excludingmold flash.

3. Lead coplanarity: 0.005with respect to datum "A".

Dimensions in inches.

0.2440

0.2284

0.344

0.337

0.157

0.150

0.012

0.008

0.025

0.0098

0.0040

-A-

0.0688

0.0532

0.0098

0.0075

0.050

0.016

8° MAX

0° MIN

Package Style: QSOP-24

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RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

Absolute Maximum Ratings

Parameter Rating Unit

Supply Voltage -0.5 to +5 V

DC

Power Down Voltage(VPD) -0.5toVCC+0.7 V

DC

Input RF Power +3 dBm
Ambient Operating Temperature -40 to +85 °C
Storage Temperature -40 to +150 °C

Parameter

Specification

Unit Condition

Min. Typ. Max.

Overall (Cascaded)

T=25°C, VCC=3.0V, Z

LOAD

=5kΩ,

LO =170MHz @400mV

PP

,IFFreq=85MHz,

Z

S

=500Ω(CDMA), ZS=850Ω (FM)

Maximum Gain +45 +50 dB V

GC

=2.5V, FM or CDMA Input, Balanced

Minimum Gain -55 -50 dB V

GC

=0.5V, FM or CDMA Input, Balanced

Gain Variation -3 +3 dB T=-20°C to +85°C, Ref = 25°C
Input IP3 -54 -50 dBm V

GC

=2.5V, Maximum Gain

-7 -4 dBm V

GC

=0.5V, Minimum Gain

-39 -36 dBm Gain = 35 dB, P

IN

=-61dBm

Noise Figure 5 8 dB V

GC

=2.5V, Maximum Gain

70 77 dB V

GC

=0.5V, Minimum Gain

IF Input Frequency Range 50 70 to 230 250 MHz
IF Input Impedance 2040 2400 2760 Ω FM or CDMA, Balanced

1020 1200 1380 Ω FM or CDMA, Single-ended
I/Q Frequency Range 0 50 MHz
I/Q Amplitude Balance 0.1 0.5 dB
I/Q Phase B alance 1 5 deg
Max I/Q Output Voltage 2.0 2.4 V

PP

Balanced, maximum output level

I/Q Output Impedance 1020 1200 1380 Ω Single-end ed

2040 2400 2760 Ω Balanced
I/Q DC Output 2.0 V

DC

Common Mode

I/Q DC Offset 20 mV

DC

IOUT+toIOUT-;QOUT+toQOUT-

LO Input Frequency Ra nge 100 140 to 460 600 MHz
LO Input Level 60 400 600 mV

PP

Balanced

LO Input Impedance 680 800 920 Ω Balanced

340 400 460 Ω Single Ended

Power Supply

Supply Voltage 2.7 3.0 3.3 V
Current Consumption 20 23 mA CDMA Mode

20 23 mA FM Mode
Power Down Current 20 µA
V

PD

HIGH Voltage VCC-0.7 V

V

PD

LOW Voltage 0.5 V

Caution! ESD sensitive device.

RF Micro Devices believes thefurnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).

7-3

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

Pin Function Description Interface Schematic

1VCC1

Supply voltage forthe LO flip-flop divider and limiting amp. Thispin may
be connected in parallel with pins 2 and 3. It should be bypassed by a
10nF capacitor. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci­tor should con nect immediately to ground pl ane. The part is designed
to work from a 2.7V to 3.3V supply.

2VCC2

Supply voltage for the bandgap, gain control bias circuitry,and AGC
stages 2, 3, and 4. This pin may be connected in parallel with pins 1
and 3. It should be bypassed by a 10nF capac itor. The trace length
between the pin and the bypass capacitor should be minimized. The
ground side of the bypass capacitor should connect immediately to
ground plane. The p art is designed to work from a 2.7V to 3.3V supply.

3VCC3

Supply voltage for the FM and CDMA AGC input stages. This pin may
be connected in parallel with pins 1 and 2. It should be bypassed by a
10nF capacitor. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci­tor should con nect immediately to ground pl ane. The part is designed
to work from a 2.7V to 3.3V supply.

4 CDMA IN+

CDMA Balanced Input pin. This pin is internally DC biased and should
be DC blocked if connected to a device with a DC level present. For sin­gle-ended input operation, one pin is used as an input and the other
CDMA input is ACcoupledto ground. The balanced input impedance is

2.4kΩ, while the single-ended input impedance is 1.2kΩ.

5 CDMA IN-

Same as pin 4, except complementary input. See pin 4.

6GND

Ground connection. Keep traces physically short and connect immedi­ately to ground plane for best performance.

7GND

Same as pin 6.

8FMIN+

FM Balanced Input pin. This pin is internally DC biased and should be
DC blocked if connected to a device with DC present.For singl e-ended
input operation, one pin is used as an input and the other FM input is
AC coupled to ground. The balanced input impe dance is 2.4kΩ, while
the single-ended input impedance is 1.2kΩ.

9FMIN-

Same as pin 8, except complementary input. See pin 8.

10 BG OUT

Bandgap Voltage Reference. This voltage, constant over temperature
and supply variation, is used to bias internal circuits. A 10nF external
bypass capacitor is required. The trace length between the pin and the
bypass capacitor should be minimized. The ground side of the bypass
capacitor should connect immediately to ground plane.

11 DEC

AGC decoupling pin. An external bypass capacitor of10nF capacitor is
required. The trace length between the pin and the bypass capacitor
should be mi nimized. The ground side of the bypass capacitor should
connect immediately to ground plane.

12 LO-

LO Balanced Input pin. This pin is internally DC biased and should be
DC blocked if connected to a device with DC present.For singl e-ended
input operation, one pin is used as an input and the other LO input is
AC coupled to ground. The frequency of the signal applied to these
pins is internally divided by a factor of2,hence the carrierfrequencyfor
the modulator becomes one half of the applied frequency. The single­ended input impedance is 400Ω (balanced is 800Ω). The LO input may
be driven single-ended but balanced provides optimum gain and phase
balance.

13 LO+

Same as pin 12, except complementary input. See pin 12.

1200

Ω

1200

Ω

CDMA IN+

BIAS BIAS

CDMA IN-

1200

Ω

1200

Ω

FM IN+

BIAS BIAS

FM IN-

400

Ω

400

Ω

LO-

BIAS BIAS

LO+

7-4

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

Pin Function Description Interface Schematic

14 IN SEL

Selects between CDMA and FM mode. This is a digitally controlled
input. A logic “high” (≥VCC-0.7V

DC

) selects CDMA mode. A logic “low”

(<0.5V

DC

) selects FM mode. The impedance on this pin is 30kΩ.

15 Q OUT-

Balanced Baseband Outputof QM ixer. This pin is internallyDC biased
and should be DC blocked externally.T his output is active in both
CDMA and FM modes. The output can be used in a single-ended con­figuration by leaving one of the two pins unconnected, however half the
output voltage wil l be lost. Each pin should be loaded with 2.5kΩ.The
balanced load should be 5kΩ. The single-en ded output impedance is

1.2kΩ, while the balanced output impedance is 2.4kΩ.

16 Q OUT+

Same as pin 15, except complementary output. See pin 15.

17 GND

Same as pin 6.

18 FL-

Balanced AGC Outpu t/Demod Input. This bala nced node is pinned out
to allow shunt filtering of the AGC output signal as it enters the demod­ulator. The basic configuration of the filter should consist of a shunt
inductor and shunt capacitor, both connected to the power supply,as
the internal circuitry requires t his power supply connection through the
inductor to operate.

19 FL+

Same as pin 18, except complementary. See pin 18.

20 GND

Same as pin 6.

21 I OUT+

Balanced Baseband Output of I Mixer. This pin is internally DC biased
and should be DC blocked externally.T his output is active in both
CDMA and FM modes. The output can be used in a single-ended con­figuration by leaving one of the two pins unconnected, however half the
output voltage wil l be lost. Each pin should be loaded with 2.5kΩ.The
balanced load should be 5kΩ. The single-en ded output impedance is

1.2kΩ, while the balanced output impedance is 2.4kΩ.

22 I OUT-

Same as pin 21, except complementary output. See pin 22.

23 GC

Analog Gain Control for AGC Amplifiers. The valid control range is from

0.5to2.5V

DC

. These voltages are valid for ONLY a 37kΩ source

impedance. The gain range for the AGC is 95dB.

60 k

Ω

BIAS

IN SEL

60 k

Ω

1.2 kΩ1.2 k

Ω

V

CC

V

CC

Q OUT+

Q OUT-

1.2 kΩ1.2 k

Ω

V

CC2VCC2

FL+FL-

V

CC1VCC1

1.2 kΩ1.2 k

Ω

V

CC

V

CC

I OUT+

I OUT-

21 k

Ω

BIAS

40 k

Ω

GC

7-5

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

Pin Function Description Interface Schematic

24 PD

Power Down Control. When logic “high” (≥VCC-0.3 V), all circuits are
operating;when logic“low” (≤0.5V), all circuits are turned off. The input

impedance of this pin is 10kΩ.

10 k

Ω

PD

7-6

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

RF2667 Pin-Out

Applicatio n Schematic

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

VCC1

VCC2

VCC3

CDMA IN+

CDMA IN-

GND

GND

FM IN+

FM IN-

BG OUT

DEC

LO-

PD

GC

I OUT-

I OUT+

GND

FL+

FL-

GND

Q OUT+

Q OUT-

IN SEL

LO+

CDMA IN+

CDMA IN-

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

VCC1

VCC2

VCC3

CDMA IN+

CDMA IN-

GND

GND

FM IN+

FM IN-

BG OUT

DEC

LO-

PD

GC

I OUT-

I OUT+

GND

FL+

FL-

GND

Q OUT+

Q OUT-

IN SEL

LO+

10 nF

680

Ω

CDMA

SAW Filter

V

CC

10 nF

10 nF

10 nF

10 nF

FM IN+

1nF

LO IN

Input Select

100 pF

100 nF

100 nF

Q OUT-

Q OUT+

100 nF

I OUT-

100 nF

I OUT+

7pF

7pF

390 nH

390 nH

V

CC

10 nF

Gain Control

10 nF

37 k

Ω

Power Down

100 pF

1nF

7-7

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

Evaluation Board Schematic

85MHz IF

(Download Bill of Materials from www.rfmd.com.)

C7

20 pF

P1-3

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

VCC1

VCC2

VCC3

CDMA IN+

CDMA IN-

GND

GND

FM IN+

FM IN-

BG OUT

DEC

LO-

PD

GC

IOUT-

IOUT+

GND

FL+

FL-

GND

QOUT+

QOUT-

IN SEL

LO+

R1

680 Ω

C3

10 nF

C4

10 nF

C5

13 pF

C6

13 pF

L1

390 nH

L2

390 nH

T1

50 Ω µstrip

J1

CDMA

C1

10 nF

C2

10 µF

C6

13 pF

C8

9.1 pF

R14

3kΩ

50 Ω µstrip

J2

FM

L3

330 nH

C9 10 nF

C10 10nF

C11 10nF

C12 1 nF

R2

270 Ω

1

T2

1

50 Ω µstrip

J3

LO

C13
1nF

P1-1

C26

100 nF

C19 6.8 pF

C20 6.8 pF

L4 390 nH

L5 390 nH

C27

4.6 nF

V+
V-

+

-

327

4

6

C31

100 nF

C30

100 nF

R9

820 Ω

R8

4.3 kΩ

R12

1.6 kΩ

R10

8.2 kΩ

R11

51 Ω

50 Ω µstrip

J5

IOUT

P3-3

P3-1

C24

10 µF

C23

100 nF

C22

10 µF

C21

100 nF

P2-1

C28

100 nF

C29

100 nF

R4

820 Ω

R3

4.3 kΩ

R5

1.6 kΩ

R6

8.2 kΩ

R7

51 Ω

50 Ω µstrip

J4

QOUT

P3-3

P3-1

C16

10 µF

C15

100 nF

C18

10 µF

C17

100 nF

P2-3

C14

100 nF

CLC426/CL

U2

CLC426/CL

U1

P1-1

P1-3

P1

PD
GND

1
2
3

VCC

P2-1

P2-3

P2

GC
GND

1
2
3

IN SEL

P3-1

P3-3

P3

+5 VDC
GND

1
2
3

-5 VDC

2667400-

R15
1kΩ

R13

36 kΩ

C25

100 nF

V+
V-

+

-

327

4

6

P1-3

7-8

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

Evaluation Board Layout

3.025” x 3.025”

(Assembly, Top layer, Bottom layer)

7-9

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

7-10

RF2667

Rev A14 010622

7

QUADRATURE

DEMODULATORS

CDMA Cascade Conversion Gain versus Gain Control

Gain Control Voltage

(VCC=3.0V, 85MHz)

-80

-60

-40

-20

0

20

40

60

0 0.5 1 1.5 2 2.5

VGC(V)

Gain (dB)

Temp=25 deg C
Temp=-30deg C
Temp=85 deg C

CDMA OIP3 versus Gain

(VCC=3.0V, 85 MHz)

-70

-60

-50

-40

-30

-20

-10

0

10

-80 -60 -40 -20 0 20 40 60

Gain (dB)

Output IP3 (dBm)

Temp= 25 degC
Temp= -30 deg C
Temp= 85 degC

CDMAIIP3 versus Gain

(VCC=3.0V, 85 MHz)

-60

-50

-40

-30

-20

-10

0

-80 -60 -40 -20 0 20 40 60

Gain (dB)

Input IP3 (dBm)

Temp= 25 degC
Temp= -30 deg C
Temp= 85 degC