Datasheet RF2658, RF2658PCBA Datasheet (RF Micro Devices)

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5
MODULATORS AND
UPCONVERTERS
Product Description
Ordering Information
Typical Applications
Functional Block Diagram
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro,NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS
SiGe HBT
Si CMOS
Gain
Control
Band Gap Reference
GOUT
1
MODE
MOD OUT+
10
PD2
Q SIG
Q REF
I REF
I SIG
LO1-
LO1+
13
PD1
LO2+
LO2-
17
Quad.
÷
2
27
GC
RF OUT
Σ
MOD OUT­MIX IN­MIX IN+
24
25
2019
22
21
15
8 9
2 3
5 4
RF2658
TRANSMIT MODULATOR, IF AGC, AND
UPCONVERTER
• CDMA/FM Cellular Systems
• CDMA PCS Systems
• GSM/DCS Systems
• TDMA Systems
• Spread Spectrum Cordless Phones
• Wireless Local Loop Systems
The RF2658 isan integrated complete Quadrature Modu­lator, IF AGC amplifier, and Upconverter developed for the transmit section of dual-mode CDMA/FM cellular and PCS applications and for GSM/DCS and TDMA systems. It is designed to modulate baseband I and Q signals, amplify the resulting IF signals while providing 95dB of gain control range, and perform the final upconversion to UHF. Noise Figure, IP
3
, and other specifications are designed to be compatible with the IS-98 Interim Stan­dard for CDMA cellular communications. This circuit is
part of RFM D’s line of complete solutions for digital radio applications. The IC is manufactured on an advanced 15 GHz F
T
Silicon Bipolar process, and is supplied in a
28-lead plastic SSOPpackage.
• Similarto RF9958with increased IF range
• Supports Dual Mode Operation
• Digitally Controlled Power Down Modes
• 2.7V to 3.3V Operation
• Double-Balanced UHF Upconvert Mixer
•IFAGCAmpwith95dBGainControl
RF2658 Transmit Modulator, IF AGC, and Upconverter RF2658 PCBA Fully Assembled Evaluation Board
5
Rev A8 010720
6.20
5.79
3.99
3.81
10.01
9.80
8° 0°
1.27
0.38
0.25
0.10
1.73
1.47
0.635 TYP
0.36
0.23
TYP
0.25
0.10
PIN 1
INDENT
NOTES:
1. Shaded lead is Pin1.
2. Lead frame material: Copper 194
3. Mold flash shall not exceed 0.006 (0.15 mm) per end.
4. Interlead flash shall not exceed 0.010 (0.25 mm) per side.
5. All dimensions are excluding mold flash and protrusions.
Package Style: QSOP-28
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MODULATORS AND
UPCONVERTERS
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.5 to +5 V
DC
Power Down Voltage (VPD) -0.5toVCC+0.7 V I and Q Levels, per pin 1 V
PP
LO1 Level, balanced +3 dBm LO2 Level, balanced +6 dBm Operating Ambient Temperature -40 to +85 °C Storage Temperature -40 to +150 °C
Parameter
Specification
Unit Condition
Min. Typ. Max.
I/Q Modulator & AG C
T=25 °C, VCC=3.0V, Z
LOAD
=50Ω,
LO1=-8dBm@260MHz, LO2=-3dBm@960MHz, I SIG=Q SIG=300mV
PP
,
RF Output externally matched I/Q Input Fr equency Range 0 to 20 MHz Balanced I/Q Input Impedance 50 80 110 k Balanced I/Q Input Reference Level 0.6 V
DC
Per Pin LO1/FM Frequency R ange 240 to 600 MHz
LO1/FM Input Level -15 -8 -5 dBm LO1/FM Input Impedance 170 200 230 Balanced Sideband Suppression 35 40 dBc I/Q Amplitude adjusted to within ±20mV
30 dBc Unadjusted
Carrier Suppression 40 50 dBc I/Q DC Offset adjusted towithin ±20mV
30 dBc Unadjusted
Max Output, FM Mode +2.5 +4 dBm V
GC
=2.5 V
DC
Max Output, CDMA Mode -3 0 dBm VGC=2.5 V
DC
Min Output, CDMA Mode -95 -89 dBm VGC=0.5 V
DC
Adjacent Channel Power Rejec-
tion @ 885kHz
-55 dBc IS-95A CDMA Modulation P
OUT
=-5dBm
Adjacent Channel Power Rejec-
tion @ 1.98MHz
-67 dBc IS-95A CDMA Modulation P
OUT
=-5dBm
Output Noise Power -116 -111 dBm/Hz P
OUT
=-3dBm
Output Noise Power -164 -159 dBm/Hz P
OUT
<-70dBm
Output PowerAccuracy -3 +3 dB T=-20 to +85°C, Ref=25°C Output Impedance 170 200 230 Balanced
UHF Upconverter
Output externally matched
Conversion Gain -1 0.5 dB Noise Figure (SSB) 15 dB Output IP3 +14 dBm IF Input Impedance 170 200 230 Balanced IF Input Frequency Range 120 to 300 MHz LO2 Input Impedance 50 Single Ended LO2 Input Level -6 -3 0 dBm LO2 Input Frequency Range 700 to 1100 MHz RF to LO2 Isolation 20 dB
Power Supply
Supply Voltage 2.7 3.0 3.3 Current Consumption 43 mA Modulator and AGC only, CDMA Mode Current Consumption 20 mA Mixer Only Power Down Current 20 µA V
PD
HIGH Voltage VCC-0.7
V
PD
LOW Voltage 0.5
Caution! ESD sensitive device.
RF Micro Devices believesthe furnishedinformation is correctand accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
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MODULATORS AND
UPCONVERTERS
Pin Funct ion Description Interface Schematic
1MODE
Selects between CDMA and FM mode. This is adigitally controlled input. A logic “high” (≥V
CC
-0.7VDC) selects CDMA mode. A logic “low”
(0.5V
DC
) selects FM mode. In FM mode, this switch enables the FM
amplifier and turns off the I&Q modulator. The impedance on this p in is 30kΩ.
2QSIG
Baseband input tothe Qmixer. This pin isDC coupled. The DC level of
0.6V must be supplied to this pin to bias the transistor. Input imped­ance of this pin is 50km inimum.
3QREF
Reference voltage for the Q mixer. This voltage should be the same as the DC voltage supplied to the Q SIG pin. For maximum c a rrier sup­pression, DC voltage on this pin relative to the Q SIG DC voltage may be adjusted. Input impedance of this pin is 50kminimum.
See pin 2.
4IREF
Reference voltage for the I mixer. This voltage should be the same as the DC voltage supplied to the I SIG pin. For maximum carrier suppres­sion, DC voltage on this pin relative to the I SIG DC voltage may be adjusted. Input impedance of this pin is 50kminimum.
See pin 5.
5ISIG
Baseband input to the I mixer. This pin is DC coupled. The DC level of
0.6V must be supplied to this pin to bias the transistor. Input imped­ance of this pin is 50km inimum.
6GND1
Ground connection for all baseband circuits including bandgap,AGC, flip-flop, modulator and FM amp. Keep traces physically short and con­nect immediately to ground plane for best performance.
7VCC1
Supply voltage for the LO1 flip-flo p andlimitin g amponly. This supply is isolated to minimize the carrier leakage. A 1nF external bypass capaci­tor is required, and an additional 0.1µF will be required if no other low frequency bypass capacitors are nearby.The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. The part is designed to work from 2.7V to 3.3 V supply.
8LO1+,FM+
One half of the balanced modulator LO1 input. The other half of the input, LO1-, is AC grounded for single-ended input applications. The frequency on these pins is divided by a factor of 2, hence the carrier frequency for the modulator becomes one halfof the appliedfrequency. The single-ended input impedance is 100(balanced is 200). This pin is NOTinternally DC blocked. An external blocking capacitor (1nF recommended) must be provided if the pin is connected to a device with DC present. When FM mode is selected, the output of the flip-flop divider circuit is switched to the AGC amplifier inputs andthemodulator mixers are not used. Note that the frequency deviation input here will be reduced by a factor of two, due to the frequency divider operation.
9LO1-,FM-
One half of the balanced modulator LO1 input. In single-ended applica­tions (100input impedance), this pin is AC grounded with a 1nF capacitor.
See pin 8.
10 BG OUT
Bandgap voltage reference. This voltage, constant overtemperature and supply variation, is used to bias internal circuits. A 1nF external bypass capacitor is required.
60 k
60 k
BIAS
MODE
8k
8k
Q SIG Q REF
BIAS BIAS
8k
8k
I SIG I REF
BIAS BIAS
100
100
LO1+, FM+ LO1-, FM-
V
CC1
V
CC1
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MODULATORS AND
UPCONVERTERS
Pin Function Description Interface Schematic
11 VCC3
Supply voltage for the AGC and the Bandgap circuitry. A 1nF external bypass capacitor is required and an additional 0.1µF will be required if no other low frequency bypass capacitors are nearby. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should c onnect immediately to ground plane. The part is designed to work from 2.7V to 3.3V supply.
12 GND1
Same as pin 6.
13 PD1
Power down control for overall circuit. When logic “high” (≥VCC-0.7V), all circuits are operating; when logic “low” (<0.5V), all circuits are
turned off. The input impedance of this pin is >10kΩ.
14 VCC4
Supply for the mixer stage only.The supply for the mixer is separated to maximize IF to RF isolations and reduce the carrier leakage. A 100pF external bypass capacitor is required and an additional 0.1µFwillbe required if no other low f requency bypass capacitors are near by. The trace length between the pin and the bypass capacitors should be min­imized. The ground side of the bypass capacitors should connect immediately to ground plane. The part is designed to work from 2.7V to
3.3V supply.
15 PD2
Power down control for mixer only. When connected to pin 10 (BG OUT) the mixercircuits are operating; when connected to ground (0.5V), the mixer is turned off but all other circuits are operating.
16 GND2
Ground conn ection for the mixerstage. Keeptraces physically short and connect immediately to ground plane for best performance.
17 RF OUT
RF output pin. An external shunt inductor to VCCplus a series blocking/ matching capacitor are required for 50output.
18 DEC
Current mirror decoupling pin. A 1000pF external capacitor is required to bypass this pin. The ground side of the bypass capacitors sh ould connect immediately to ground plane.
19 LO2+
One half of the balanced mixerLO2 input. In single-ended applications, the other half of the input, LO2- is AC grounded. This is a 50imped­ance port. This pin is NOT internally DC blocked. An external blocking capacitor (100pF recommended) must be provided if the pin is con­nected to a device with DC present.
20 LO2-
One half of the balance mixer LO2 input. In single ended applications, this pin is AC grounded with a 100pF capacitor.
See pin 19.
21 MIX IN-
One half of the 200balanced impedance input to the mixer stage. This pin is NOT internally DC blocked. An external blocking capacitor (2200pF recommended) must be provided if the pin is connected to a device with DC present. If no IF filter is needed, this pin may be con­nected to MOD OUT+ through a DCblocking capacitor. An appropriate matching n etwork may be needed if an IF filter is used.
22 MIX IN+
Same as pin 21, except complementary input. See pin 21.
10 k
PD1
1k
PD2
450
300
V
CC4
RF OUT
40
BIAS
40
BIAS
LO2+ LO2-
100
BIAS
100
BIAS
MIX IN- MIX IN+
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MODULATORS AND
UPCONVERTERS
Pin Funct ion Description Interface Schematic
23 GND2
Same as pin 16.
24 MOD OUT-
One half of the balanced AGC output port. The imp edance of this port is 200balanced. If no filtering is required, this pin can be connected to the MIX IN- pin through aDC blocking capacitor. Thispin requires an inductor to V
CC
to achieve full dynamic range. In order to maxim ize
gain, this inductor should be a high-Q type and should be parallel reso­nated out with a capacitor (see application schematic). This pin is NOT DC blocked. A blocking capacitor of 2200pF is needed when this pin is connected to a DC path. An appropriate matching network may be needed if an IF filter is used.
25 MOD OUT+
Same as pin 24, except complementary output. See pin 24.
26 DEC
AGC decoupling pin. An external bypass capacitor of 10nF capacitor is required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane.
27 GC
Analog gain control for AGC amplifiers. Valid control voltage ranges are from 0.5V
DC
to 2.5VDC. The gain range for the AGC is 88dB. These
voltages are valid ONLY for a 37ksource impedance.
28 VCC2
Supply for the modulator stage only. A 10nF external bypass capacitor is required and an additional 0.1µF will be required if no other low fre­quency bypass capacitors are nearby.The trace length between the pin and the bypass capacitors should be minimi zed. The ground sideof the bypass capacitors should connect immediately to ground plane. The part is designed to work from 2.7V to 3.3V supply.
100Ω100
MOD OUT­MOD OUT+
V
CC3
V
CC3
21 k
GC
40 k
BIAS
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MODULATORS AND
UPCONVERTERS
RF2658 Pin-Out
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MODE
Q SIG
Q REF
I REF
I SIG
GND1
VCC1
LO1+
LO1-
BG OUT
VCC3
GND1
PD1
VCC4
VCC2
GC
DEC
MOD OUT+
MOD OUT-
GND2
MIX IN+
MIX IN-
LO2-
LO2+
DEC
RF OUT
GND2
PD2
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MODULATORS AND
UPCONVERTERS
Application Schematic
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MODE
Q SIG
Q REF
I REF
I SIG
GND1
VCC1
LO1+
LO1-
BG OUT
VCC3
GND1
PD1
VCC4
VCC2
GC
DEC
MOD OUT+
MOD OUT-
GND2
MIX IN+
MIX IN-
LO2-
LO2+
DEC
RF OUT
GND2
PD2
Q Signal
I Signal
Reference
10 nF
Mode Select
Gain Control
1nF
37 k
10 nF
V
CC
IF Filter,
DC Blocked
1000 pF
1nF
Power Down 2
100 pF
100 pF
LO2 In
L1
C1
RF Out
V
CC
1nF
10 nF
1nF
Power Down 1
V
CC
1nF
10 nF
100 pF
LO1/FM In
10 nF
V
CC
18 pF
82 nH
18 pF
82 nH
10 nF
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RF2658
Rev A8 010720
5
MODULATORS AND
UPCONVERTERS
Evaluation Board Schema t ic
(Download Bill of Materials from www.rfmd.com.)
R3
0
MODE
Q SIG
Q REF
I REF
I SIG
GND1
VCC1
LO1+
LO1-
BG OUT
VCC3
GND1
PD1
VCC4
VCC2
GC
DEC
MOD OUT+
MOD OUT-
GND2
MIX IN+
MIX IN-
LO2-
LO2+
DEC
RF OUT
GND2
PD2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
L2
12 nH
C7
1nH
VCC
C14
1.3 pF
C13
33 pF
L1
15 nH
50 Ωµstrip
J7
RF OUT
C11
1000 pF
C18
100 pF
50 Ωµstrip
J6
LO2 IN
C12
100 pF
C17
2.2 nF
C16
2.2 nF
50 Ωµstrip
J5
MIX IN
50 Ωµstrip
J4
MOD OUT
T1
1
C15
10 nF
T2
1
VCC
C8
10 nF
C10 1nF
R2
10 kR127 k
VGC
C9
10 nF
VCC
C20 1 µF
C6
1nF
C5
1nF
C4
100 nF
C3
1nF
C1
1nF
50 Ωµstrip
J1
LO IN
VCC
PD1
J2
I SIG
C2
10 nF
C19 1 µF
I REF
J3
Q SIG
MODE
P2
1 2 3
P2-1 VCC
GND
P2-3 I REF
P1
1 2 3
P1-1 MODE
GND
P1-3 GC
GND
GND
PD1P3-4
P3
1 2 3 4 5
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MODULATORS AND
UPCONVERTERS
Evaluation Board Layout
Board Size 2.689" x 2.521"
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MODULATORS AND
UPCONVERTERS
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