Datasheet RF2642, RF2642PCBA Datasheet (RF Micro Devices)

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6

MIXERS

Preliminary

Product Description

Ordering Information

Typical Applications

Features

Functional Block Diagram

RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro,NC 27409, USA

Tel [phone]

Fax [phone]

http://www.rfmd.com

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS

ü

SiGe HBT

Si CMOS

8

MIX OUT

7

PD

6

RF IN

1

GND16GAIN SELECT15VCC14LO+13LO-

9

GND

5

VPA1

10 IF-

11 IF+

12 GND2RF OUT

3RF GND2

4RF GND1

Logic

Control

RF2642

3V 900MHZ UPCONVERTER/

DRIVER AMPLIFIER WITH BYPASS MODE

• CDMA/AMPS Cellular Systems

• TDMA/AMPS Cellular Systems

• General Purpose Upconverter/Driver

• Portable Battery-Powered Equipment

The RF2642 is a complete upconverter and power ampli­fier driver designed for CDMA applications. The design
features driver amplifier high and low gain states. In the
low gain state, the gain is adjustable and the device
draws less current. The upconverter is always on. The
power down mode turns off the driver amplifier. The
device features balanced IF inputs, single-ended LO
input and RF output for ease of interface. Packagedin an
industry standard 4mmx4mm, 16-pin, leadless chip car­rier, the device provides a low-cost solution while easing
board space limitations.

• Single Supply 3.0V Operation

• Step Gain Control

• Power Down Control

• ACPR1=61dBc@885kHz with
P

OUT

=+5dBm

• Small Leadless LCC 16-Pin Package

RF2642 3V 900MHz Upconverter/ Driver Amplifier with

Bypass Mode

RF2642 PCBA Fully Assembled EvaluationBoard

6

Rev A2 010720

3.75

3.75

+

1.50 SQ

4.00

4.00

1

0.45

0.28

3.20

1.60

0.75

0.50

12°

INDEX AREA

3

1.00

0.90

0.75

0.65

0.05

0.00

NOTES:

5 PackageWarpage:0.05 max.

4

Pins 1and9 are fused.

Shaded PinisLead 1.1
Dimension appliestoplated terminal and is measuredbetween

0.10 mmand0.25 mm from terminal tip.

2

The terminal#1identifier and terminal numbering convention
shall conformtoJESD 95-1 SPP-012. Details ofterminal#1
identifier areoptional,but must be located withinthezone
indicated. Theidentifiermay be either a moldormarked
feature.

3

0.80
TYP

2

1

Dimensions in mm.

Package Style: LCC, 16-Pin, 4x4

Preliminary

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RF2642

Rev A2 010720

6

MIXERS

NOTE: The measured results do not include the losses from the IF balun and SAW filter. On the evaluation board, those
losses are as follows: IF B alun=1dB, SAW Filter=2.5dB to 3.5dB.

Absolute Maximum Ratings

Parameter Rating Unit

Supply Voltage -0.5 to +4.5 V

DC

Input RF Power +3 dBm
Operating Ambient Temperature -30 to +85 °C
Storage Temperature -30 to +150 °C

Parameter

Specification

Unit Condition

Min. Typ. Max.

Overall

T=25°C, VCC=3.0V,RF

OUT

=830MHz,

LO =960MHz@-3dBm, IF=130MHz
RF Output Frequency Range 824 to 849 MHz
IF Frequency Range 130 MHz
Output Power +5 dBm CW

High Gain Mode

GAIN SELECT=2.7 V, VPD=2.7V
Gain 33 34.5 36 dB

Noise Figure 12 14 dB
IF Input Impedance 250 Ω Differential @ 130MHz
RF Output VS WR 1.5 2:1 824MHz to 849MHz, external components

required
Current Consumption 52 mA
Adjacent Channel Power

Rejection (ACPR1)

55 61 dBc P

OUT

=+5dBm, 885kHz offset

Alternate C hannel Power

Rejection (ACPR2)

65 78 80 dBc P

OUT

=+5dBm, 1.98MHz offset

Bypass Mode

GAIN SELECT=0V, VPD=2.7V
Gain 11.9 dB

Noise Figure 11.9 14 dB
IF Input Impedance 250 Ω Differential @ 130MHz
RF Output VS WR 1.5 2:1 824MHz to 849MHz, external components

required
Output IP3 -4 +5.4 dBm
Current Consumption 26 mA

LO Input

954MHz to 979MHz
LO Frequency Range 954 to 979 MHz

LO Level -6 -3 0 dBm
LO Input Impedance 50 Ω
LO to Mixer RF Output Leakage -33 -20 dBm
LO Input VSWR 1.4 2:1 GAIN SELECT=0V

1.7 2:1 GAIN SELECT=2.7V

Power Supply

Voltage 2.7 3.0 3.3 V
Current Consumption 15 mA V

PD

=0V

Caution! ESD sensitive device.

RF Micro Devices believes thefurnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).

Preliminary

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Pin Function Description Interface Schematic

1GND

Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane. This pin is internally con­nected to the die flag.

2RFOUT

Output match of the second stage of the power amplifier driver. This
amplifier output pin is open collector. It is matched to 50Ω externally
using a simple LC match. Refer to the application schematic.

3 RF GND2

The ground connecti on for the second stage of the power amplifier
driver. The inductance between this pin and the ground plane deter­mines the gai n of the second stage. Increased inductance results in
reduced gain.
On the evaluation board, the emitter ground inductance is set by the
length of the PCB trace connected between this pin and the ground. By
sliding a 0Ω ground jumper along this line, the inductance, and hence
the gain, may be varied.
The evaluation board is shipped with the 0Ω jumper very close to the
part, resulting in minimum inductance, and therefore maximum second
stage gain. This translates to higher output IP3 and maximum ACPR1.
This setting res ults in performance 6dB better than the ACPR1 mini­mum specification of 50dBc in the CDMA IS-95 specification for a
P

OUT

=+5dBm.

4 RF GND1

The ground connecti on for the first stage of the power amplifier driver.
The inductance between this pin and the ground plane determines the
gain of the first stage. Increased inductance results in reduced gain.
On the evaluation board, the emitter ground inductance is set by the
length of the PCB trace connected between this pin and the ground. By
sliding a 0Ω ground jumper along this line, the inductance, and hence
the gain, may be varied.
The evaluation board is shipped with the 0Ω jumper far away from the
part, resulting in maximum inductance, and therefore minimum first
stage gain.
More gain may be obtained by shifting the 0 Ω jumper toward the part.
A maximum total gain of 40dB may be ac hieved if the first stage is set
to minimum emitter inductor trace length.

See pin 3.

5VPA1

Power supply pin for the first stage power amplifier.External compo­nents provide tuning for the interstage match.

6RFIN

RF input to the power amplifier. This input is DC-coupled, so an exter­nal blocking capacitor is needed if the pin is connecte d to a DC path.

7PD

PowerD own control When this pin is low,the amplifier section of the IC
is shut off. When this pin ishigh,theamplifiersectionof the IC is turned
on. The upconverter portion of the IC remains on regardless of the
state of PD.

8 MIX OUT

Output for the upconverting mixer. This input is DC-coupled, so an
external blocking capacitor is needed if the pin is connec ted to a DC
path. The output impedance is 50Ω.

9GND

Same as pin 1.

RF OUT

Gain

Select

PCB

Trace

VPA1Bias

RF IN

MIX OUT

Preliminary

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*See parameter specifications for conditions.

Pin Function Description Interface Schematic

10 IF-

Balanced IF Input Pin. This pin is internally DC-biased and should be
DC-blocked if connected to a device with a DC levelpresent. For single­ended input operation, one pin is used as an input and the other IF
input is AC coup led to ground. The input impedance is 250Ω in both
the balanced and single-ended modes.

11 IF+

Same as pin 10, except complementary input.

12 GND

Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.

13 LO-

Balanced LO Input Pin. This pin is internally DC-biased and should be
DC-blocked if connected to a device with a DC levelpresent. For single­ended input operation, one pin is used as an input and the other LO
input is AC coupled to ground. The input impedance is 50Ω in both the
balanced and single-ended modes.

14 LO+

Same as pin 13, except complementary input.

15 VCC

Supply voltage for all bias circuits and logic circuits.

16 GAIN

SELECT

When GAIN SELECT is high: the driver amplifier is switched to high
gain mode; both amplifier stages are active; the gain is maximized;
and, the enti re device draws approximately 51mA. When GAIN
SELECT is low, the second stage of the PA driver is turned off and
bypassed. This results in a device current of 26mA, which is approxi­mately a 50% current reduction. The upconverting mixer remains on in
both the high and low gain modes to prevent VCO pulling.

Pkg

Base

GND

Ground connection. The backside ofthe package should be soldered to
a top side ground pad which is connected to the ground plane with mul­tiple vias.

PD

Gain

Select

Mixer

Amplifier

First Stage

Amplifier

Second Stage

Gain

(dB)*

0 0 ON OFF OFF
0 1 ON OFF OFF
1 0 ON ACTIVE BYPASSED 11.9
1 1 ON ACTIVE ACTIVE 34.5

BIAS

IF-IF+

BIAS

LO-LO+

Preliminary

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MIXERS

Evaluation Board Schematic

(Download Bill of Materials from www.rfmd.com.)

876

1 16 15 14 13

95

10

11

122

3

4

Logic

Control

C9

10 nF

Gain Select

C10

10 nF

VCC

C11
1nF

50 Ωµstrip

J5

LO IN

C12
1nF

T1

TRANS6

C7

1nF

C8

1nF

50 Ωµstrip

J4

IF IN

C1

1nF

L4

3.9 nH

R8*
DNI

50 Ωµstrip

J1

PA OUT

L1

8.2 nH

R1*
DNI

C2

10 nF

VPA2

L2

8.2 nH

R2*
DNI

C3

10 nF

VPA1

PD

C5

10 nF

C4

1nF

R3*
DNI

50 Ωµstrip

J2

PA IN

R4

820 Ω

R5

5.1 Ω

R6

820 Ω

FL1

FLT BP

C6

1nF

R7*
DNI

50 Ωµstrip

J3

MIX OUT

2642400B

NOTE:

1. R1, R2 and R8 are optional.

2. R4, R5 and R6 form T-attenuator with a loss of 1 dB.
For 0 dBloss, R4 andR6 are removed,and R5 is a 0 Ω short.

3. R3 and R7 are normally open.

4. FLT BP recommended is a Murata filter: SAFC836.5MC90T-TC12.

5. The microstrip on pin 4 is bridgedto ground via 0 Ω 0402 size resistor.
The recommended setting isat maximum of PCB.

6. The microstrip on pin 3 is bridgedto ground via 0 Ω resistor. The

recommended setting is at a distance of 35 mils fromedge of device.

7. *DNI:Do Not Install

P1

1
2
3

CON3

P1-3 PD

GND

P2

1
2
3

CON3

P2-3 VCC

GND

P2-1 Gain Select

P3

1
2
3

CON3

P3-1 VPA1

GND

P3-3 VPA2

See Note 2

µstrip

µstrip

R9
0 Ω

R10
0 Ω

See Note 6

See Note 5

Preliminary

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Evaluation Board Layout

Board Size 2.981" x 2.981"

Board Thickness 0.031”, Board Material FR-4

Preliminary

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Preliminary

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LO to RF Leakage forUpconverterMixer Alone

-50.0

-45.0

-40.0

-35.0

-30.0

-25.0

-20.0

-10.0 -9.0 -8.0 -7.0 -6. 0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0

LO Drive (dBm)

LO to RF Leakage (dBm)

ACPR1 and ACPR2 versus LO Driveat VCC=3.0V

for Upconverter + PA Driver at High Gain Mode

0.0

10.0

20.0

30.0

40.0

50.0

60.0

70.0

80.0

90.0

-10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0

LO Drive (dBm)

ACPR2 Offset Freq of 1.98 MHz

0.0

10.0

20.0

30.0

40.0

50.0

60.0

70.0

80.0

ACPR1 Offset Freq of 880 kHz

ACPR2, 1.98MHz (dBc)
ACPR1, 880KHz (dBc)

Gain and Noise Figure versus LO Drive at VCC=3.0V

for Upconverter + PA Driver at High Gain Mode

0.0

5.0

10.0

15.0

20.0

25.0

30.0

35.0

40.0

-10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0

LO Drive(dBm)

Gain and Noise Figure (dB)

Gain (dB)
NoiseFigure(dB)

Gain and Noise Figure versus LO Drive at VCC=3.0V

for Upconverter + PA Driver at Low Gain Mode

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

16.0

-10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0

LO Drive(dBm)

Gain and Noise Figure (dB)

Gain (dB)
Noise Figure(dB)

OutputIP3 versus Drive Level at VCC=3.0V

for Upconverter + PA Driver at Low Gain Mode

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

8.0

-10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0

LO Drive (dBm)

Output IP3 (dBm)