Datasheet RF2628, RF2628PCBA Datasheet (RF Micro Devices)

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Product Description

Ordering Information

Typical Applications

Features

Functional Block Diagram

RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro,NC 27409, USA

Tel [phone]

Fax [phone]

http://www.rfmd.com

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS

SiGe HBT

Si CMOS

1IF+

2IF-

3GND

4LO BYPASS 5LO

6 GND

7 VCC

8 RF OUT

RF2628

CDMA/FM UPCONVERTER/BPSK MODULATOR

• CDMA/FM Cellular Systems

• Supports Dual-Mode AMPS/CDMA

• Supports Dual-Mode TACS/CDMA

• Commercial and Consumer Systems

• Battery-Operated Systems

The RF2628 is a complete upconverter designed for
CDMA/FM cellular applications. The IC contains a dou­ble-balanced mixer stage and an output buffer amplifier
stage. This device may also be used to directly BPSK
modulate a carrier. The mixer is a Gilbert cell with emitter
degeneration resistors to provide high IP

3

. The output

stage is a class-B, push-pull configuration to reduce the
overall current and still provide a good 50Ω outputmatch.
The unit operates at a supply voltage of 2.7V to 5.0V and
does not require any external matching components
other than coupling capacitors. This circuit is designed as
part of the RFMD CDMA Chip Set, consisting of a Trans­mit IF AGC Amp, this Transmit Upconverter, a Receive
LNA/Mixer, and a Receive IF AGC Amp.

• Supports Dual Mode Operation

• +9dBm Output Intercept Point

• Single 2.7V to 5.0V Power Supply

• Internally Matched Inputs and Outputs

• Buffered Output

• Double-Balanced Mixer

RF2628 CDMA/FM U pconverter/BPSK Modulator
RF2628 PCBA Fully Assembled EvaluationBoard

6

Rev B4 010720

NOTES:

1. Shaded lead ispin 1.

2. All dimensions are exclusiveof
flash, protrusions or burrs.

3. Lead coplanarity: 0.002 with
respect to datum "A".

0.012

6° MAX

0° MIN

0.021

+0.004

0.006

+0.002

0.192

+ 0.008

0.0256

0.118

+0.004sq.

0.006

+0.003

0.034

-A-

Package Style: MSOP-8

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Absolute Maximum Ratings

Parameter Rating Unit

Supply Voltage -0.5 to 5.5 V

DC

Input RF Power +20 dBm
Operating Ambient Temperature -40 to +85 °C
Storage Temperature -40 to +150 °C

Parameter

Specification

Unit Condition

Min. Typ. Max.

Overall

T=25°C, VCC=3.0V, RF=840MHz,
LO =970MHz @ -2 dBm, IF=130MHz @ -15

dBm
RF Output Frequency Range 500 824 to 849 1500 MHz
Conversion Gain -2 0 +1 dB
Noise Figure 15.5 18 dB
Output IP3 +5 +9 dBm
Output VSWR 1.6:1 1.8:1 50Ω
Spurious Product Rejection 30 dBc Referenced to RF output

IF Input

IF Frequency DC 130 500 MHz
Differential Input Impedance 215 265 315 Ω
IF to RF Output Isolation 21 23 dB IF=130MHz
IF to LO Isolation 40 45 dB

LO Input

LO Frequency Range 300 954 to 979 1700 MHz
LO Level -3 to +3 dBm
LO to RF Output Leakage -25 -28 dBm
LO Input VSWR 1.1:1 1.5:1 50Ω

Power Supply

Voltage 2.7 to 5.0 V
Current Consumption 21 24 mA V

CC

=3.0V

Caution! ESD sensitive device.

RF Micro Devices believes thefurnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).

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Pin Function Description Interface Schematic

1IF+

Balanced IF input pin. This pin is internally DC-biased and should be
DC blocked if connected to a device with a DC level present. For single­ended input operation, one pin is used as an input and the other IF
input is AC coupled to ground. The balanced, as well as single-ended,
input impedance is 265Ω. The IF input should be used differentially
when the part is used as a BPSK modulator.

2IF-

Same as pin 1, except complementary input. See pin 1.

3GND

Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.

4LOBYPASS

Bypass connectio n for the LO. A capacitor of 100pF to ground should
be connected to this pin

5LO

Balanced LO input pin. This pin is internally DC-biased and should be
DC-blocked if connected to a device with a DC levelpresen t. For single­ended input operation, one pin is u sed as an input and the other LO
input is AC-coupled to ground. The balanced, as well single-ended,
input impedance is 50Ω.

See pin 4.

6GND

Same as pin 3.

7VCC

Supply voltage pin. External bypassing is required. External RF, LO,
and IF bypassing is required. The trace length between the pin an d the
bypass capacitors should be minimized. The ground side of the bypass
capacitors should connect immediately to ground plane.

8RFOUT

RF output pin. This pin is internally DC-blocked.The output impedance
is 50Ω.

BIAS

IF-IF+

BIAS

LO
BYPASS

LO

RF OUT

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Applicatio n Schematic

Evaluation Board Schema t ic

(Download Bill of Materials from www.rfmd.com.)

1

2

3

4 5

6

7

8

1nF

IF+

1nF

IF-

100 pF

100 pF

LO

RF OUT

100 pF 100nF

V

CC

100 pF

2628400-

1

2

3

4 5

6

7

8

C4

22 pF

C2

470 pF

T1
1:1

C1

470 pF

C3

4pF

L1

100 nH

P1

1
2
3

NC

GND

P1-1 VCC

50Ωµstrip

J1

IF IN

C5

22 pF

50Ωµstrip

J2

LO IN

C6

47 pFC7100 nF

VCC

50Ωµstrip

J3

RF OUT

C8

100 pF

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Evaluation Board Layout

Board Size 1.500" x 1.500"

Board Thickness 0.031”, Board Material FR-4

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