Datasheet RF2627, RF2627PCBA Datasheet (RF Micro Devices)

ü

10-33

10

IF AMPLIERS

Product Description

Ordering Information

Typical Applications

Features

Functional Block Diagram

RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro,NC 27409, USA

Tel [phone]

Fax [phone]

http://www.rfmd.com

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS

SiGe HBT

Si CMOS

1

2

3

4

8

7

6

5

IN+

IN-

GND

GC

VCC1

VCC2

OUT+

OUT-

GAIN

CONTROL

RF2627

3V CDMA RECEIVE AGC AMPLIFIER

• 3V CDMA Cellular Systems

• 3V CDMA PCS Systems

• 3V TDMA Cellular/PCS Systems

• General Purpose Linear IF Amplifier

• Commercial and Consumer Systems

• Portable Battery Powered Equipment

The RF2627 is a complete AGC amplifier designed for
the receive section of 3V CDMA cellular and PCS appli­cations. It is designed to amplify IF signals while provid­ing more than 90dB of gain control range. Noise Figure,
IP

3

, and other specifications are designed for CDMA

handsets. This circuit is designed as part of the RFMD
CDMA Chip Set, consisting of a Transmit IF AGC Amp, a
Transmit Upconverter, a Receive LNA/Mixer, and this
ReceiveIFAGCAmp.TheICismanufacturedonan
advanced high frequency Silicon Bipolar process, and is
packaged in a standard miniature 8-lead plastic MSOP
package.

• Supports PCS and Cellular Applications

• -48dB to +48dB Gain Control Range

• Single 3V Power Supply

• -2dBm Input IP

3

• 12MHz to 285MHz Operation

• Monolithic Construction

RF2627 3V CDMA Receive AGC Amplifier
RF2627 PCBA Fully Assembled Evaluation Board

10

Rev A8 010711

NOTES:

1. Shaded lead is pin 1.

2. All dimensions are exclusive of
flash, protrusionsorburrs.

3. Lead coplanarity: 0.002 with
respect to datum "A".

0.012

6° MAX

0° MIN

0.021

+ 0.004

0.006

+0.002

0.192

+0.008

0.0256

0.118

+0.004sq.

0.006

+0.003

0.034

-A-

Package Style: MSOP-8

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RF2627

Rev A8 010711

10

IF AMPLIERS

Absolute M aximum Ratings

Parameter Value Unit

Supply Voltage -0.5 to +7.0 V

DC

Control Voltage -0.5 to +5.0 V

DC

Input RF Power +10 dBm
Operating Ambient Temperature -40 to +85 °C
Storage Temperature -40 to +150 °C

Parameter

Specification

Unit Condition

Min. Typ. Max.

Overall

T=25°C, 85MHz, VCC=3.0V, ZS=500Ω,
Z

L

=500Ω,500Ω External Input Terminating

Resistor, 500Ω External Output Terminating
Resistor (Effective Z

S

=333Ω,Effective

Z

L

=250Ω) (See Application Example)

Frequency Range 12 to 285 MHz
Maximum Gain +45 +48 dB V

GC

=2.4V
Minimum Gain -48 -45 dB VGC=0.3V
Gain Slope 57 dB/V Measured in 0.5V increments

Gain Control Voltage Range 0 to 3 V

DC

Source impedance of 4.7kΩ

Gain Control Input Impedance 30 kΩ
Noise Figure 5 8 dB At maximum gain and 85MHz
Input IP

3

-44 -40 dBm At +40dB gain, referenced to 500Ω

-4 -2 dBm At minimum gain, referenced to 500Ω

Stability (Max VSWR) 10:1 Spurious< - 70dBm

IF Input

Input Impedance 1 kΩ CDMA, differential

Power Supply

Voltage 2.7 to 3.4 V
Current Consumption 13 15 mA Minimum gain, V

CC

=3.0V

Current Consumption 14 16 mA Maximum gain, V

CC

=3.0V

Caution! ESD sensitive device.

RF Micro Devices believes the furnished informationis correct and accurate
at the time of this printing. However, RFMicro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for theuse of the described product(s).

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RF2627

Rev A8 010711

10

IF AMPLIERS

Pin Function Description Interface Schematic

1IN+

CDMA Balanced Input Pin. This pin is internally DC biased and should
be DC blocked if connected to a device wi th a DC level other than V

CC

present. A DC to connection to VCCis ac ceptable. For single-ended
input operation, one pin is used as an input and the other CDMA input

is AC coupled to ground. The balanced input impedance is 1kΩ,while
the single-ended input impedance is 500Ω.

2IN-

Same as pin 2, except complementary input. See pin 1.

3GND

Ground connection. Keep traces physically shor t and connect immedi­ately to ground plane for best performance.

4GC

Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selectedwith 0V. These voltagesare only valid for a 4.7kΩ DC source
impedance.

5OUT-

Balanced Output pin. This is an open-collector output, designed to
operate int o a 250Ω balanced load. The load sets the operating imped­ance, but an external choke or m atching inductor to V

CC

must also be

supplied in order to correctly bias this output. This bias inductor is typi­cally incorp o rated in the matchingnetworkb e tween the output and next
stage. Because this pin is biased to V

CC

, a DC blocking capacitor must

be used if the next stage’s input has a DC path to ground.

6OUT+

Same as pin 5, except complementary output. See pin 5.

7VCC1

Supply Voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane.

8VCC2

Same as pin 7.

700

Ω

BIAS

700

Ω

CDMA-CDMA+

23.5 k

Ω

15 k

Ω

12.7 k

Ω

V

CC

OUT-OUT+

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RF2627

Rev A8 010711

10

IF AMPLIERS

Applicatio n Schematic

Evaluation Board Schema t ic

(Download Bill of Materia ls from www.rfmd.com.)

1

2

3

4

8

7

6

5

GAIN

CONTROL

R1:

1kΩ

CDMA-

CDMA+

CDMA IF Filter

ZS=500 Ω

Z

IN, EFF

=500 Ω

Z

IN

=1 kΩ

Z

S, EFF

=333 Ω

Measurement

Reference Plane

L1

L1

V

CC

C2

OUT+

OUT-

V

CC

R2: 500Ω

C1

C1

C2

Measurement

Reference Plane

Z

LOAD

=500Ω

Z

LOAD,EFF

=250 Ω

Z

OUT

=500 Ω

10 nF

10 nF

R1 sets the CDMA balanced input impedance. The effective input impedance is then 500 Ω.
R2 sets the balanced output impedance to 500 Ω . L1 and C2 serve dual purposes. L1 serves

as an output bias choke, and C2 serves as a series DC block. In addition, the values of L1
and C2 may be chosen to form an impedance matching network of the load impedance is not
500 Ω. Otherwise, the values of L1 and C1 are chosen to form a parallel-resonant tank circuit
at the IF when the load impedance is 500 Ω.

GAIN

4.7 kΩ

GAIN

CONTROL

R3

510 Ω

C8

15 pF

C9

15 pF

L3

390nH

L4

390nH

C6

10 nF

R2

4.7 kΩ

T1

C3

15 pF

C1

10 nF

C4

15 pF

C2

10 nF

L1

390 nH

L2

390 nH

1

2

3

4

8

7

6

5

T2

C5

1nF

50 Ω µstrip

J2

SMA

OUT

50 Ω µstrip

J1

SMA

CDMA

GC

VCC

2627400A

R1

1kΩ

VCC

C10

10 nF

C7

10 nF

1
2
3

P1

P1-1

P1-3

VCC
GND

GC

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RF2627

Rev A8 010711

10

IF AMPLIERS

Evaluation Board Layout

Board Size 2.750" x 2.000"

Board Thickness 0.031”, Board Material FR-4

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RF2627

Rev A8 010711

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IF AMPLIERS

IIP3 versus V

GC

VCC=2.7VDC,FC=85MHz

-60.0

-50.0

-40.0

-30.0

-20.0

-10.0

0.0

10.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(VDC)

IIP3 (dBm)

IIP3 (-40°C)
IIP3 (25°C)
IIP3 (85°C)

IIP3versusV

GC

VCC=3.4VDC,FC=85MHz

-60

-50

-40

-30

-20

-10

0

10

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2

VGC(VDC)

IIP3 (dbm)

IIP3 (-40°C)
IIP3 (25°C)
IIP3 (85°C)

Gain versus V

GC

VCC=2.7VDC,FC=85MHz

-60.0

-40.0

-20.0

0.0

20.0

40.0

60.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(VDC)

Gain (dB)

Gain (-40°C)
Gain (25°C)
Gain (85°C)

Gain versus V

GC

VCC=3.4VDCFC=85MHz

-80.0

-60.0

-40.0

-20.0

0.0

20.0

40.0

60.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(VDC)

Gain (dB)

Gain (-40°C)
Gain (25°C)
Gain (85°C)

OIP3 versus V

GC

VCC=2.7VDC,FC=85MHz

-60.0

-50.0

-40.0

-30.0

-20.0

-10.0

0.0

10.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(VDC)

OIP3 (dBm)

OIP3 (-40°C)
OIP3 (25°C)
OIP3 (85°C)

OIP3 versus V

GC

VCC=3.4VDC,FC=85MHz

-60.0

-50.0

-40.0

-30.0

-20.0

-10.0

0.0

10.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(VDC)

OIP3 (dBm)

OIP3 (-40°C)
OIP3 (25°C)
OIP3 (85°C)