Datasheet RF2516, RF2516PCBA Datasheet (RF Micro Devices)

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11
TRANSCEIVERS
Preliminary
Product Description
Ordering Information
Typical Applications
Features
RF Micro Devices, Inc. 7625 Thorndike Road Greensboro,NC 27409, USA
Tel (336)664 1233
Fax (336)664 0454
http://www.rfmd.com
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS
ü
SiGe HBT
Si CMOS
Prescaler
32/64
Phase
Detector &
Charge Pump
Lock
Detect
LOOP FLT
14
16
DIV CTRL
DC
Bias
5TX OUT
2
OSC E
1
OSC B
15
LD FLT
MOD IN
8
RESNTR+13RESNTR-
12
3PD
RF2516
VHF/UHF TRANSMITTER
• 315/433MHz Band Systems
• Local Oscillator Source
• Part 15.231 Applications
• Remote Keyless Entry
• Wireless Security Systems
• AM/ASK/OOK Transmitter
The RF2516 is a monolithic integrated circuit intended for use as a low-cost AM/ASK transmitter. The device is pro­vided in a 16-pin QSOP-16 package and is designed to provide a phased locked frequency source for use in local oscillator or transmitter applications. The chip can be used in applicationsin the North American and European VHF/UHF bands. The integrated VCO, phase detector, prescaler, and reference oscillator transistor require only the addition of an external crystal to provide a complete phase-locked loop. In addition to the standard power­down mode, the chip also includes an automatic lock­detect feature that disables the transmitter output when the PLL is out-of-lock.
• Fully Integrated PLL Circuit
• Integrated VCO and Reference Oscillator
• 2.0V to 3.6V Supply Voltage
• Low Current and Power Down Capability
• 100MHz to 500MHz Frequency Range
• Out-of-Lock Inhibit Circuit
RF2516 VHF/UHF Transmitter RF2516 PCBA Fully Assembled EvaluationBoard
11
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0.157
0.150
0.196
0.189
0.2440
0.2284
0.0688
0.0532
0.050
0.016
0.0098
0.0075
8° MAX
0°MIN
NOTES:
1. Shaded lead is Pin 1.
2. All dimensions are excluding mold flash.
3. Lead coplanarity - 0.005 with respect to datum "A".
0.012
0.008
0.025
-A-
0.0098
0.0040
Package Style: QSOP-16
Preliminary
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Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.5 to +3.6 V
DC
Power Down Voltage(VPD) -0.5toV
CC
V
MOD IN -0.5 to 1.1 V Operating Ambient Temperature -40 to +85 °C Storage Temperature -40 to +150 °C
Parameter
Specification
Unit Condition
Min. Typ. Max.
Overall
T=25°C, VCC=2.8V, Freq=433MHz, R
MODIN
=3k
Frequency Range 100 to 500 MHz Modulation AM/ASK Modulation Frequency 1 MHz Incidental FM 15 kHz p-p Output Power +8.5 +10 dBm 50load ON/OFF Ratio 75 dB
PLL and Prescaler
Prescaler Divide Ratio 32/64 VCO Gain, K
VCO
20 MHz/V Frequency and board layout dependent.
PLL Phase Noise -97 dBc/Hz 10kHz Offset, 50kHz loop bandwidth
-102 dBc/Hz 100kHz Offset, 50kHz loop bandwidth Harmonics -60 dBc With output tuning. Reference Frequency 17 MHz Crystal Frequency Spurs -50 dBc 50kHz PLL loop bandwidth Max CrystalR
S
TBD 35 50 For a typ. 1ms turn-on time.
Max Crystal Motional Inductance 60 mH For a typ. 1 ms turn-on time. Charge Pump Current 100 µAK
PD
=100µA/2π=0.0159mA/rad
Power Down Control
Power Down “ON” VCC-0.3V V Voltage supplied to the input; device is “ON” Power Down “OFF” +0.3 V Voltage supplied to the input; device is “OFF”
Control Input Impe dance 100k Turn On Time 1 2 ms Crystal start-up, 13.57734MHz crystal. Turn Off Time 1 2 ms
Power Supply
Voltage 2.8 V Specifications
2.0 3.6 V Operating limits
Current Consumption (Avg.) 6 10.5 mA 50% Duty Cycle 10kHz Data applied to the
MOD IN input. R
MODIN
(R10)=3k. Output
power/DC current consumption externally adjustable by modulation input resistor (see applicable Application Schematic).
Power Down Current 0 1 uA PD
=0V, MOD IN=0V,DIV CTRL=0V
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Preliminary
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Pin Function Description Interface Schematic
1OSCB
This pin is connected directly to the reference oscillator transistor base. The intended reference oscillator configuration is a modified Colpitts. A 68pF capacitor should be conne cted between pin 1 and pin 2. Diodes shown in the interface schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
2OSCE
This pin is connected directly to the emitter of the reference oscillator transistor. A 33pF capaci tor should be connected from this pin to ground. Diodes shown in the interface schematic provide 3kV electro­static discharge (ESD) protection using the human body model.
See pin 1.
3PD
Power Down control for all circuitry.When this pin is a logic “low” all c ir­cuits are turned off. When this pin is a logic “high”, all circuits are oper­ating normally. A “high” is V
CC
. Diodes shown in the interface
schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
4GND
Ground connection for the TX OUT amp. Keep traces physically short and connect immediately to ground plane for best performance. Diodes shown in the interface schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
5TXOUT
Transmitter output. This output is an open collector and requires a pull­up inductor for bias/matching and a tapped capacitor for matching.
6GND1
Ground connection for the TX output buffer amplifier. Diodes shown in the interface schematic provide 3kV electrostatic discharge (ESD) pro­tection using the human body model.
See pin 4.
7VCC1
This pin is used to supply bias to the TX buffer amplifier. Diodes shown in the interface schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
8MODIN
AM analog or digital modulation can be imparted to the carrier by an input to this pin. An external resistor is used to bias the output amplifi­ers through this pin. The voltage at this pin must not exceed 1.1V. Higher voltages may damage the device. Diodes shown in the interface schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
9VCC2
This pin is used to supply DC bias to the VCO, crystal oscillator, pre­scaler, phase detector, and charge pump. An IF bypass capacitor should be connected directly to this pin and returned to ground. Diodes shown in the interface schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
See pin 7.
10 GND2
Digital PLL ground connection. Diodes shown in the interface sche­matic provide 3kV electrostatic discharge (ESD) protection using the human body mo del.
See pin 4.
OSC E
V
CC
OSC B
V
CC
PD
GND
V
CC
TX OUT
MOD IN
RF IN
VCC1
V
CC
1k
MOD IN
TX OUT
V
CC
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Pin Function Description Interface Schematic
11 VREF P
Bias voltage reference pin for bypassing. The bypass capacitor should be of appropriate size to provide filtering of the reference crystal fre­quency and be connected directly to this pin. Diodes shown in the inter­face schematic provide 3kV electrostatic discharge (ESD) protection using the h uman body model.
12 RESNTR-
The RESNTR pins are used to supply DC voltage to the VCO, as well as to tune the center frequency of the VCO. Equal value inductors should be connected to this pin and pin 13.
13 RESNTR+
See pin 12.
14 LOOP FLT
Output of th e charge pump. An RC network from this pin to ground is used to establish the PLL bandwidth. Diodes s h own in the interface schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
15 LD FLT
This pin is used to set the threshold of the lock-detect circuit. A shunt capacitor should be used to set an RC time constant with the on-chip series 1k resistor. This signal is used to clamp (enable or disable) the MOD IN circuitry. The time constant should be approximately 10 times the reference period. Diodes shown in the interface schematic provide 3kV electrostatic discharge (ESD) protection using the human body model.
16 DIV CTRL
Logic “High” input selects divide-by-64 prescaler. Logic “Low” input selects divide-by-32 prescaler. Diodes shown in the interface sche­matic provide 3kV electrostatic discharge (ESD) protection using the human body model.
VREF P
V
CC
RESNTR-RESNTR+
LOOP FLT
4k
LOOP FLT
V
CC
V
CC
LD FLT
1k
V
CC
DIV CTRL
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RF2516 Theory of Operation
Introduction
Short range radio devices are becoming commonplace in today’s environment. The most common examples are the remote keyless entr y systems popular on many new cars and trucks, and the ubiquitous garage door opener. Other applications are emerging with the growth in home security, automation and the advent of various remote control applications. Typically these deviceshave been simplex, or one-way, links.They are also typically built using surface acoustic wave (SAW) devices as the frequency control elements. This approach has been attractive because the SAW devices have been readily available and a transmitter, for example, could be built with only a few additional components. Recently however, RF Micro Devices, Inc. (RFMD), has introduced several new components that enable a new class of short-range radio devices based on the use of crystals and phase-locked loops for frequency control. These devices are superior in performance and comparable in cost to the traditional SAW-based designs. The RF2516 is an example of such a device. The RF2516 is targeted for applications such as 315MHz and 433MHz band remote keyless entry systems and wireless security systems, as well as other remote control applications.
The RF2516 Transmitter
The RF2516 is a low-cost AM/ASK VHF/UHF transmit­ter designed for applications operating within the fre­quency range of 100MHz to 500MHz. In particular, it is intended for 315MHz to 433MHz band systems, remote keyless entry systems, and FCC Part 15.231 periodic transmitters. It can also be used as a local oscillator signal source. The integrated VCO, phase detector, prescaler, and reference oscillator require only the addition of an external crystal to provide a complete phase-locked loop. In addition to the stan­dard power-down mode, the chip also includes an automatic lock-detect feature that disables the trans­mitter output when the PLL is out-of-lock.
Thedeviceismanufacturedona25GHzSiliconBipo­lar-CMOS process and packaged in an industry stan­dard SSOP-16 plastic package. This, combined with the low external parts count, enables the designer to achieve small-footprint, high-performance, low-cost designs.
The RF2516 is designed to operate from a supply volt­age ranging from 2.0V to 3.6V, accommodating designs using three NiCd battery cells, two AAA flash­light cells, or a lithium button battery. The device is
capable of providing up to +10dBm output power into a 50 load, and is intended to comply with FCC require­ments for unlicensed remote control transmitters. ESD protection is provided on all pins except VCO and TX OUT.
While this device is intended for OOK operation, it is possible to use narrowband FM. This is accomplished by modulating the r eference oscillator rather than applying the data to the MOD IN input pin. The MOD INpinshouldbetiedhightocausethedevicetotrans­mit. The deviation will be set by pulling limits of the crystal. Deviation sufficient for the transmission of voice and other low data rate signals can therefore be accomplished. Refer to the Application Schematic in the data sheet for details.
The RF2516 Functional Blocks
A PLL consists of a reference oscillator, a phase detec­tor, a loop filter, a voltage controlled oscillator (VCO), and a programmable divider in the feedback path. The RF2516 includes all of these internally, except for the loop filter and the reference oscillator’s crystal and two feedback capacitors.
The reference oscillator is a Colpitts type oscillator. Pins 1 (OSC B) and 2 (OSC E) provide connections to a transistor that is used as the reference oscillator. The Colpitts configuration is a low parts count topology with reliable performance and reasonable phase noise. Alternatively, an external signal could be injected into the base of the transistor. The drive level should, in either case, be around 500mV
PP
. This level prevents
overdriving the device and keeps the phase noise and reference spurs to a minimum.
The prescaler divides the VCO frequency by either 64 or 32, using a series of flip-flops, depending upon the logic level present at the DIV CTRL pin. A high logic level will select the 64 divisor. A low logic level will select the 32 divisor. This divided signal is then fed into the phase detector where it is compared with the refer­ence frequency.
The RF2516 contains an onboard phase detector and charge pump. The phase detector compares the phase of the reference oscillator to the phase of the VCO. The phase detector is implemented using flip­flops in a topology referred to as either “digital phase/ frequency detector” or “digital tri-state comparator”. The circuit consists of two D flip-flops whose outputs are combined with a NAND gate which is then tied to
Preliminary
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TRANSCEIVERS
the reset on each flip-flop. The outputs of the flip-flops are also connected to the charge pump. Each flip-flop output signal is a series of pulses whose frequency is related to the flip-flop input frequency.
When both inputs of the flip-flops are identical, the sig­nals are both frequency- and phase-locked. If they are different, they will provide signals to the charge pump which will either charge or discharge the loop filter, or enter into a high impedance state. The name “tri-state comparator” comes from this.
The main benefit of this type of detector is the ability to correct for errors in both phase and frequency. When locked, the detector uses phase error for correction. When unlocked, it uses frequency error for correction. This type of detector will lock under all conditions.
The charge pump consists of two transistors, one for charging the loop filter and the other for discharging the loop filter. Its inputs are the outputs of the phase detector flip-flops. Since there are two flip-flops, there are four possible states. If both amplifier inputs are low, then the amplifier pair goes into a high impedance state, maintaining the charge on the loop filter. The state where both inputs are high will not occur. The other states are either charging or discharging the loop filter. The loop filter integrates the pulses coming from the charge pump to create a control voltage for the voltage controlled oscillator.
The VCO is a tuned differential amplifier with the bases and collectors cross-coupled to provide positive feed­back and a 360° phase shift. The tuned circuit is located in the collectors, and is comprised of internal varactors and external inductors. The designer selects the inductors for the desired frequency of operation. These inductors also provide DC bias for the VCO.
The output of the VCO is buffered and applied to the prescaler circuit, where it is divided by either 32 or 64, as selected by the designer, and compared to the ref­erence oscillator frequency.
The transmit amplifier is a two-stage amplifier con- sisting of a driver and an open collector final stage.It is capable of providing 10dBm of output power into a 50 load while operating from a 3.6V power supply.
The lock-detect circuitry connects to the output of the phasedetectorcircuitryandisusedtodisablethe transmitter when the VCO is not phase-locked to the reference oscillator. This is necessary to avoid unwanted out-of-band transmission and to provide compliance with regulatory limits during an unlocked condition.
There are many possible reasons for the PLL not to be locked. For instance, there is a shor t period during the start of any VCO in which the VCO begins oscillating and the reference oscillator builds up to full amplitude. During this period, the frequency will likely be outside the authorized band. Typically, the VCO starts much faster than the reference oscillator. Once both VCO and reference oscillators are running, the phase detec­tor can start slewing the VCO to the correct frequency, slowly sliding across 200MHz of occupied spectrum. In competitive devices, the VCO radiates at full power under all of these conditions.
The lock protection circuit in the RF2516 is intended to stabilize quickly after power is applied to the chip, and to disable the base drive to the transmit amplifier. This attenuates the output to levels that will be generally acceptable to regulatory boards as spurious emis­sions. Once the phase detector has locked the oscilla­tors, then the lock circuit enables the MOD IN pin for transmission of the desired data. There is no need for an external microprocessor to monitor the lock status, although that can be done with a low current A/D con­verter in a system micro, if needed. The lock-detect cir­cuitry contains an internal resistor which, combined with a designer-chosen capacitor for a particular RC time constant, filters the lock-detect signal. This signal is then passed through an internal Schmitt tr igger and used to enable or disable the transmit amplifier.
If the oscillator unlocks, even momentarily, the protec­tion circuit quickly disables the output until the lock is stable. These unlocks can be caused by low battery voltage, poor power supply regulation, severe shock of the crystal or VCO, antenna loading, component fail­ure, or a myriad of unexpectedsingle-point failures.
The RF2516 contains onboard band gap reference voltage circuitry which provides a stable DC bias over varying temperature and supply voltages. Additionally, the device features a power-down mode, eliminating battery disconnect switches.
Preliminary
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Designing With the RF2516
The reference oscillator is built around the onboard transistor at pins 1 and 2. The intended topology is that of a Colpitts oscillator. The Colpitts oscillator is quite common and requires few external components, mak­ing it ideal for low-cost solutions. The topology of this type of oscillator is as seen in the following figure.
This type of oscillator is a parallel resonant circuit for a fundamental mode crystal. The transistor amplifier is an emitter follower and the voltage gain is developed by the tapped capacitor impedance transformer. The series combination of C
1
and C2act in parallel with the
input capacitance of the transistor to capacitively load the crystal.
The nominal capacitor values can be calculated with the following equations
6
:
and
The load capacitance is usually 32pF. The variable freq is the oscillator frequency in MHz. The frequency can be adjusted by either changing C
2
or by placing a vari-
able capacitor in series with the crystal. As an exam­ple, assume a desired frequency of 14MHz and a load capacitance of 32pF. C
1
=137.1 pF and C2= 41.7pF.
These capacitor values provide a starting point. The drive level of the oscillator should be checked by look­ing at the signal at pin 2 (OSC E). It has been found that the level at this pin should generally be around 500 mV
PP
or less. This will reduce the reference spur
levels and reduce noise from distor tion. If this level is higher than 500mV
PP
then decrease the value of C1.
The values of these capacitors are usually tweaked during design to meet performance goals, such as minimizing the start-up time.
Additionally, by placing a variable capacitor in series with the crystal, one is able to adjust the frequency. This will also alter the drive level, so it should be checked again.
An impor tant part of the overall design is the voltage controlled oscillator.TheVCOisconfiguredasadif­ferential amplifier.The VCO is tuned via internal varac­tors. The varactors are tuned by the loop filter output voltage through a 4 kresistor.
As mentioned earlier, the inductors and the varactors aretuningadifferentialamplifier.TotunetheVCOthe designer only needs to calculate the value of the induc­tors connected to pins 12 and 13 (RESNTR- and RESNTR+). The inductor value is determined by the equation:
In this equation, f is the desired operating frequency and L is the value of the inductor required. The value C is the amount of capacitance presented by the varac­tors and parasitics. For calculation purposes 1.5pF should be used. The factor of one-half is due to the inductors being in each leg. As an example, assume an operating frequency of 433MHz. The calculated value of each inductor is 45nH. A 47nH inductor would be appropriate as the closest available value.
X1 C2
C1
V
CC
C
1
60 C
load
freq
MHz
----------------------- -
= C
2
1
1
C
load
------------ -
1
C
1
------
--------------------------
=
4k
LOOP FLT
L L
RESNTR+ RESNTR-
L
1
2
π f⋅⋅
----------------
èø
æö
2
1
C
--- -
1 2
-- -
⋅⋅
=
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ThesetupoftheVCOcanbesummarizedasfollows. First, open the loop. Next, get the VCO to run on the desired frequency by selecting the proper inductor and capacitor values. The capacitor value will need to include the varactor and circuit parasitics.
After the VCO is running at the desired frequency, set the VCO sensitivity. The sensitivity is determined by connecting the control voltage input point to ground and noting the frequency.
Connect the same point to the supply, and again note the frequency. The difference between these two fre­quencies divided bythe supply voltageis the VCO sen­sitivity expressedin Hz/V. Increasing the inductor value while decreasing the capacitor value will increase the sensitivity. Decreasing the inductor value while increasing the capacitor value will lowerthe sensitivity.
When increasing or decreasing component values, make sure that the center frequency remains constant. Finally, close the loop.
External to the part, the designer needs to implement a loop filter to completethe PLL. The loop filter converts the output of the charge pump into a voltage that is used to control the VCO. Internally, the VCO is con­nected to the charge pump output through a 4k resis­tor.Theloopfilteristhenconnectedinparalleltothis point at pin 14 (LOOP FLT). This limits the loop filter topology to a second order filter usually consisting of a shunt capacitor and a shunt series RC. A passive filter is most common, as it is a low-cost and low-noise design. An additional pole could be used for reducing the reference spurs, however there is not a way to add the series resistor. However, this should not be a rea­son for concern.
The schematic of the loop filter is:
The transfer function is:
where the time constants are defined as:
and
The frequency at which unity gain occurs is given by:
This is also the loop bandwidth. If the phase margin (PM) and the loop bandwidth
(ω
LBW
) are known, it is possible to calculate the time
constants. These are found using the equations
4
:
and
With these known, it is then possible to determine the values of the filter components.
4
As an example, consider a loop bandwidth of 50 kHz, a phase margin of 45°, a divide ratio of 64, a K
VCO
of
20 MHz/V, and a KPD of 0.01592mA/2πrad. Time con­stant τ1 is 1.31848µs, time constant τ2 is 7.68468µs, C
1
is 131.15pF, C2is 633.26pF, and R2is 12.14kΩ.
In order to perform these calculations, one will need to know the value of two constants, K
VCO
and KPD.KPDis
calculated by dividing the charge pump current by 2π. For the RF2516, the charge pump current is 100µA. K
VCO
is best found empirically as it will change with
frequency and board parasitics. By briefly connecting pin 14 (LOOP FLT) to VCC and then to ground, the fre­quency tuning range of the VCO can be seen. Dividing the difference between these two frequencies by the difference in the voltage gives K
VCO
in MHz/V.
V
CC
R2
C2
C1
VCO
Charge Pump
Loop Filter
Fs() R
2
s τ21+
s τ2s τ11)+(⋅⋅
-------------------------------------------
=
τ
2
R2C
2
= τ
1
R
2
C1C
2
C1C2+
------------------ -
ø
ö
è
æ
=
ω
LBW
1
τ1τ2⋅
------------------ -
=
τ
1
PM()sec PM()tan
ω
LBW
--------------------------------------------------
= τ
2
1
ω
LBW
2
τ1⋅
----------------------- -
=
C
1
τ
1
τ
2
---- -
KPDK
VCO
ω
LBW
2
N
-----------------------------
1 ω
LBWτ2
()
2
+
1
ω
LBWτ1
()
2
+
----------------------------------------⋅⋅=
C
2
C
1
τ
2
τ
1
---- -
1
èø
æö
=
R
2
τ
2
C
2
------
=
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The control lines provide an interface for connecting the device to a microcontroller or other signal generat­ing mechanism. The designer can treat pin 8 (MOD IN), pin 16 (DIV CTRL), and pin 3 (PD) as control pins whose voltage levelcan be set. The lock-detect voltage at pin 15 (LD FLT) is an output that can be monitored by the microcontroller.
Pin 15 (LD FLT) is used to set the threshold of the lock-detect circuit. A shunt capacitor is used to set an RC time constant with an on-chip series 1kresistor. The time constant should be approximately 10 times the reference period.
General RF bypassing techniques must be observed to get the best performance. Choose capacitors such that they are series resonant near the frequency of operation.
Board layout is always an area in which great care must be taken. The board material and thickness are used in calculating the RF line widths. The use of vias for connection to the ground plane allows one to con­nect to ground as close as possible to ground pins. When laying out the traces around the VCO, it is desir­able to keep the parasitics equal between the two legs. This will allow equal valued inductors to be used.
Pre-compliance testing should be performed during the design process. This can be done with a GTEM cell or at a compliance testing laboratory. It is recom­mended that pre-compliance testing be performed so that there are no surprises during final compliance testing. This will help keep the product development and release on schedule.
Working with a laboratory offers the benefit of years of compliance testing experience and familiarity with the regulatory issues. Also, the laboratory can often pro­vide feedback that will help the designer make the product compliant.
On the other hand, having a GTEM cell or an open air test site locally offers the designer the ability to rapidly determine whether or not design changes impact the product's compliance. Set-up of an open air test site and the associated calibration is not trivial. An alterna­tive is to use a GTEM test c ell.
After the design has been completed and passes com­pliance testing, application will need to be made with the respective regulatory bodies for the geographic region in which the product will be operated to obtain final certifications.
RF2516 Typical Applications
FCC Part 15.231 Periodic Transmitter - 315MHz Auto­motive Keyless Entry Transmitter
The following information is taken or paraphrased from the Code of FederalRegulations Title 47, Part 15, Sec­tion 231 (47 CFR 15.231). Part 15 discusses radio fre­quency devices and section 231 discusses periodic transmissions. Please refer to the regulation itself as the final authority. Additional information may be found on the Internet at www.fcc.gov.
To highlight the main guidelines outlined by this sec­tion, there are five main limitations: operating fre­quency, transmission content, transmission duration, emission bandwidth, and spur ious emissions.
Part 15.231 allows operation in two bands: 40.66MHz to 40.70MHz and above 70MHz. Transmission is lim­ited to control signals such as alarm systems, door openers, remote switches, etc. Radio control of toys is not permitted, nor is continuous transmission such as voice or video. Data transmission other than a recogni­tion code is not permitted. Transmission time is limited to 5 seconds (paragraph a) or for 1 second with greater than ten seconds off (paragraph e).
Emission bandwidth between 70 MHz and 900MHz can not be more than 0.25% of the center frequency. Above 900MHz, the emission bandwidth cannot be greater than 0.50% of the center frequency. The emis­sion bandwidth is determined from the points that are 20dB down from the modulated carrier. This corre­sponds to an occupied bandwidth of 4.5 MHz at a cen­ter frequency of 902MHz, 1.1MHz at 433 M Hz, and 788 kHz at 315MHz.
Spurious emissions limits are listed in tabular form for various frequency ranges in the Section 231. Above 470 MHz with a manually activated transmitter, the fun­damental field strength at a distance of 3 meters shall not exceed 12,500microvolts/meter. The spurious emissions shall not exceed 1,250microvolt/meter at a distance of 3meters above 470MHz. Refer to Appen­dix A for a method of convertingfield strength to power.
In the frequency range of 260MHz to 470MHz, one needs to linearly interpolate the maximum emissions levelfor both the fundamental and spurious emissions. The equation for this line is given by:
E
µV
m
------ -
41
2 3
-- -
Freq
MHz
7083
1 3
-- -
=
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This equation is derived from the endpoints of the fre­quency range and their respective field strengths. Note that the field strength is in microvolts per meter and the frequency is in megahertz. To determine the spurious level, divide the level calculated above for the spurious frequency by ten.
As an example, assume the fundamental is 315MHz and the reference frequency is 9.8MHz. The field strengths of the fundamental, the r eference spurs, and the harmonics of the fundamental up through the tenth harmonic are calculated in the following table The occupied bandwidth limit is 787.5kHz. As shown in Table A, the fifth, seventh,and ninth harmonics fall into restricted bands as called out in section 15.205. The limits for these restricted bands are called out in sec­tion 15.209. The power level in the last column is the level if the output is connected directly to a spectrum analyzer. Refer to Appendix A as to how this column was calculated.
Local Oscillator Source
Since the RF2516 has a phase-locked VCO, it can be used as a signal source. The device is an ASK/OOK transmitter, with the data provided at the MOD IN pin. WhentheMODINisahighlogiclevel,thecarrieris transmitted.When MOD IN is a low logic level, then the carrier is not transmitted. Therefore, to use the RF2516 as signal source, simply tie the MOD IN pin to the sup­ply voltage, through a suitable series resistor (mini­mum 3k).
Conclusions
The RF2516 is an AM/OOK VHF/UHF transmitter that features a phase-locked output. This device is suitable for use in a CFR Part 15.231 compliant product as well as a local oscillator signal source. Two examplesshow­ing these applicationswere discussed.
The RF2516 is packaged in a low-cost plastic package and requires few external parts, thus making it suitable for low-cost designs.
Table A
Frequency
(MHz)
15.205 Limits (µV/m@3m)
15.231 Limits (µV/m @3m)
Final FCC Mask
(µV/m@3m)
Final FCC Mask
(µV/m @3m)
Power Level (dBm, 50Ω)
Ref Spur 305.2 - 604.17 604.17 55.62 -39.61
1 315.0 - 6041.67 6041.67 75.62 -19.61
Ref Spur 324.8 - 604.17 604.17 55.62 -39.61
2 630.0 - 604.17 604.17 55.62 -39.61 3 945.0 - 604.17 604.17 55.62 -39.61 4 1260.0 - 604.17 604.17 55.62 -39.61 5 1575.0 500 - 500.00 53.98 -41.25 6 1890.0 - 604.17 604.17 55.62 -39.61 7 2205.0 500 - 500.00 53.98 -41.25 8 2520.0 - 604.17 604.17 55.62 -39.61 9 2835.0 500 - 500.00 53.98 -41.25
10 3150.0 - 604.17 604.17 55.62 -39.61
Preliminary
11-45
RF2516
Rev A10 010613
11
TRANSCEIVERS
Pin Out
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DIV CTRL
LD FLT
LOOP FLT
RESNTR+
RESNTR-
VREFP
GND2
VCC2
OSC B
OSC E
PD
GND
TX OUT
GND1
VCC1
MOD IN
Preliminary
11-46
RF2516
Rev A10 010613
11
TRANSCEIVERS
Applicatio n Schematic
315MHz
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
68 pF
9.83 MH z
33pF
*Not populated on standard Evaluation Board.
OSC B
OSC E
GND
TX O UT
GND1
VCC1
MOD IN
DIV CTRL
LD F LT
LOO P F LT
RESNTR+
RESNTR -
VREFP
GND2
VCC2
50Ωµstrip
4pF
50Ωµstrip
56 nH
16 k
J1
TX OUT
220 pF
10
TX VC C
100 pF
MOD IN
S1
CAS-120B
10
82 nH
82 nH
2k
10 nF
4.3 k
2.2 nF
1nF
V
C
C
V
C
C
V
C
C
PD
Preliminary
11-47
RF2516
Rev A10 010613
11
TRANSCEIVERS
Application Schematic
315MHz
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
68 pF
9.83 MH z
33pF
OSC B
OSC E
GND
TX OUT
GND1
VCC1
MOD IN
DIV CTRL
LD F LT
LOO P FLT
RESNTR+
RESNTR-
VREFP
GND2
VCC2
50Ωµstrip
4pF
50Ωµstrip
56 nH
16 k
J1
TX OUT
220 pF
10
TX VCC
100 pF
S1
CAS-120B
10
82 nH
82 nH
2k
10 nF
4.3 k
2.2 nF
1nF
PD
D1
SMV1249-011
150 k
AUDIO
V
CC
V
CC
RF2516 Audio Transmitter
V
CC
V
CC
Preliminary
11-48
RF2516
Rev A10 010613
11
TRANSCEIVERS
Applicatio n Schematic
433MHz
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
68 pF
13.57734 MHz
PWR DWN
4.3 k
220 pF
220 pF 10 nF
220 pF
DIV CTRL
10 nF
TX OUT
33pF
1nF
2.2 nF
39 nH
2k
10
10 nF
*Not populated on standard Evaluation Board.
*
2.8
VCC(V) Mod.in Res. Value
(R5)
I
CC
(mA)
P
OUT
(dBm)
1k 3k 5k 7k
9k 11k 13k 15k 17k 19k 21k
17.38
10.51
8.68
7.82
7.18
6.75
6.45
6.18
5.99
5.80
5.66
7.45
8.78
7.23
6.00
4.73
3.81
2.98
2.30
1.63
1.00
0.35
2.0
VCC(V) Mod.in Res. Value
(R5)
1k 3k 5k 7k
9k 11k 13k 15k 17k 19k 21k
I
CC
(mA)
11.08
10.83
4.61
4.00
3.63
3.42
3.26
3.15
3.07
3.01
2.95
P
OUT
(dBm)
-6.23
-4.40
-5.61
-6.66
-8.08
-8.93
-10.04
-10.71
-11.58
-12.32
-13.10
2.4
VCC(V) Mod.in Res. Value
(R5)
1k 3k 5k 7k
9k 11k 13k 15k 17k 19k 21k
I
CC
(mA)
14.05
9.00
7.48
6.73
6.16
5.79
5.53
5.29
5.13
4.98
4.86
P
OUT
(dBm)
7.94
7.63
5.95
4.64
3.35
2.40
1.47
0.75
0.05
-0.60
-1.26
3.2
VCC(V) Mod.in Res. Value
(R5)
1k 3k 5k 7k
9k 11k 13k 15k 17k 19k 21k
P
OUT
(dBm)
6.77
9.70
8.30
7.11
5.91
5.02
4.16
3.51
2.89
2.26
1.66
I
CC
(mA)
20.90
12.12
9.66
8.95
8.23
7.75
7.42
7.10
6.89
6.68
6.52
3.6
VCC(V) Mod.in Res. Value
(R5)
1k 3k 5k 7k
9k 11k 13k 15k 17k 19k 21k
P
OUT
(dBm)
5.78
10.42
9.18
8.08
6.88
6.02
5.19
4.52
3.93
3.35
2.72
I
CC
(mA)
24.68
13.88
10.94
10.14
9.34
8.81
8.44
8.09
7.86
7.63
7.44
OSC B
OSC E
GND
TX OUT
GND1
VCC1
MOD IN
DIV CTRL
LD FLT
LOOP FLT
RESNTR+
RESNTR-
VREFP
GND2
VCC2
50Ωµstrip
4pF
50Ωµstrip
68 nH
2pF
50Ωµstrip
15 pF 10 nH 15 pF10 nH
22 nH
220 pF10 nF
220 pF10 nF
10
3kΩ10 nF
MOD IN
39 nH
V
CC
V
CC
V
CC
PD
Preliminary
11-49
RF2516
Rev A10 010613
11
TRANSCEIVERS
Evaluation Board Schematic
315MHz
(Download Bill of Materials from www.rfmd.com.)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C8
68 pF
Y1
9.83 MHz
C7
33pF
*Not populated on standard Evaluation Board.
OSC B
OSC E
GND
TX OUT
GND1
VCC1
MOD IN
DIV CTRL
LD FLT
LOOP FLT
RESNTR+
RESNTR-
VREFP
GND2
VCC2
50Ωµstrip
C6
4pF
50Ωµstrip
L3
56 nH
R4
16 k
J1
TX OUT
C5
220 pF
TX VCC
C4
100 pF
MOD IN
S1
CAS-120B
R2
10
L2
82 nH
L1
82 nH
R1
2k
C1
1
µ
F
R3
4.3 k
C2
2.2 nF
C3
1nF
VCC
VCC
VCC
GND
P1-1 VCC1
P1-3 MOD IN
P1
1 2 3
CON3
B1
LITH BATT
VCC
+
-
2516400, rev A
PD
R5
10
Preliminary
11-50
RF2516
Rev A10 010613
11
TRANSCEIVERS
Evaluation Board Schema t ic
433MHz
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C2
68 pF
X1
13.57734 MHz
PWR DWN
R2
4.3k
C7
220 pF
C9
220 pF
C10
10 nF
VCC
C12
220 pF
DIV CTRL
C11
10 nF
C1
33pF
C6
1nF
C8
2.2 nF
L2
39 nH
R4
2k
R3
10
C13
10 nF
*Not populated on standard Evaluation Board.
C17*
OSC B
OSC E
GND
TX OUT
GND1
VCC1
MOD IN
DIV CTRL
LD FLT
LOOP FLT
RESNTR+
RESNTR-
VREFP
GND2
VCC2
50Ωµstrip
C3
4pF
50Ωµstrip
L4
68 nH
C15 2pF
50Ωµstrip
C14
15 pFL310 nH
C16
15 pF
L5
10 nH
L6
22 nH
C18
220 pF
C19
10 nF
VCC
C5
220 pF
C4
10 nF
R1
10
VCC
R5
3k
C20
10 nF
L1
39 nH
J1
TX OUT
J2
MOD IN
P1
1 2 3
CON3
VCC
NC GND
P2
1 2 3
CON3
DIV CTRL
GND
PWR DWN
PD
Preliminary
11-51
RF2516
Rev A10 010613
11
TRANSCEIVERS
Evaluation Board Layout (315MHz)
Board Size 1.285” x 1.018”
Board Thickness 0.062”, Board Material FR-4
Preliminary
11-52
RF2516
Rev A10 010613
11
TRANSCEIVERS
Evaluation Board Layout (433MHz)
Board Size 1.392” x 1.392”
Board Thickness 0.031”, Board Material FR-4
Preliminary
11-53
RF2516
Rev A10 010613
11
TRANSCEIVERS
433MHz Phase Noise
0
1.0
1.0-1.0
10.0
1
0
.
0
-
1
0
.
0
5.0
5
.
0
-
5
.
0
2.0
2
.
0
-
2
.
0
3.0
3
.
0
-
3
.
0
4.0
4
.
0
-
4
.
0
0.2
0
.
2
-
0
.
2
0.4
0
.
4
-
0
.
4
0.6
0
.
6
-
0
.
6
0.8
0
.
8
-
0
.
8
RF2516 Output Z
Swp Max
1GHz
Swp Min
0.1GHz
VCC = 3 V VCC = 2 V VCC = 3.3 V
1.0 GHz 0.1 GHz
Preliminary
11-54
RF2516
Rev A10 010613
11
TRANSCEIVERS
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