6-9
RF2466
Rev A7 010717
6
MIXERS
Pin Function Description Interface Schematic
1GND
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
2 IF SELECT
Control line for IF out select. A logic “low” enables the FM output. A
logic “high” enables the CDMA output. The threshold voltage is 1 .6V,
and the pin draws less than 50µA when selected.
3PD
Power down pin. A logic “low” (<1.6V) turns the part off. A logic “high”
(>1.6V)turns the part on. In addition, pin 2(IF SELECT) should also be
taken low during power down.
4LO+
Mixer LO balanced input pin. For single-ended input operation, this pin
is used as an input and pin 5 is bypassed to ground.
5LO-
Same as pin 4 except complementary input. See pin 4.
6GND
Ground connection for the mixer. For best performance, keep traces
physically short and connect immediately to ground plane.
7 MIXER IN
Mixer RF input pin. This pin is internally DC-biased and should be DC
blocked if connected to a device with DC presen t. External matching
network sets RF and IF impedance for optimum performance.
8BYPASS
Internal voltage reference. External RF and IF bypassing is requi red.
The trace length between the pin and the bypass capacitors should be
minimized. The ground side of the bypass capacitors should connect
immediately to ground plane.
9GND
Same as pin 1.
10 GND
Same as pin 1.
11 VCC
Supply voltage for the mixers, bias circuits, and control logic. External
RF and IF bypassing is required. The trace length between the pin and
the bypass capacitors should be minimized. T he ground side of the
bypass capacitors should connect immediately to ground plane.
12 FM-
Same as pin 13, except complimentary output. For typical single ended
operation, this pin is connected directly to V
CC
.
See pin 13.
13 FM+
FM IF output pin. This is a balanced output, but is typically used as a
single-ended output. The internal circuitry, in conjunction with an external matching/bias inductor to V
CC
, sets the operating impedance. This
inductor is typically incorporated in the matching network between the
output and IF filter. The net output impedance, including the external
inductor, is about 870Ω at 85MHz. Because this pin is biased to V
CC
,a
DC blocking capacitor must be used if the IF filter input has a DC path
to ground. See Application Schematic.
14 GND
Same as pin 1.
15 CDMA+
CDMA IF output pin. This is a balanced output. The internal c ircuitry, in
conjunction with an external matching/bias inductor to V
CC
, sets the
operating impedance. This inductor is typically incorporated in the
matching network between the output and IF filter. The net output
impedance, including the external inductor, at 85MHz is higher than
1kΩ, even though the part is designed to drive a 1kΩ load. Because
thispinisbiasedtoV
CC
, a DC blocking capacitor must be used if the IF
filter input has a DC path to ground. See Application Schematic.
16 CDMA-
Same as pin 15, except complementary output. See pin 15.
C1
50 k
Ω
PD
50 k
Ω
LO IN+ LO IN-
MIX IN
LO OUT
VCC2
BIAS
IF2-IF2+
2.1 k
Ω
8.5 pF
IF1-IF1+
1.2pF1.2
pF
GND2