Datasheet RF2451, RF2451PCBA Datasheet (RF Micro Devices)

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NOT FOR NEW DESIGNS
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GENERAL PURPOSE
AMPLIFIERS
Product Description
Ordering Information
Typical Applications
Functional Block Diagram
RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS
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RF2
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1
SiGe HBT
Si CMOS
8
7
6
5
RF IN
GND1
GND2
IPSET
1
2
3
4
RF OUT
ISET
VCC
ENABLE
Bias Circuits
RF2451
3V LOW NOISE AMPLIFIER
• GSM Handsets
• CDMA Handsets
• TDMA Handsets
• IF or RF Buffer Amp lifiers
• Driver Stage for Power Amplifiers
• Oscillator Loop Amplifiers
The RF2451 is a general purpose, low-cost, high perfor­mance low noise amplifier designed for operation from a
2.7V to 4V supply with low current consumption. The attenuation of the device is controlled when in power down mode, providing a known gain step. The RF2451 is available in a small industry-standard MSOP-8 surface mount package, enabling compact designs which con­serve board space. The design features accurate PTAT (Proportional To Absolute Temperature) biasing scheme using band gap cells.
• 700 MHz to 2000MHz Operation
• 2.7V to 3.6V Single Supply
• +5dBm Input IP
3
at 3.0mA
• 12dB Gain at 1950MHz
• 1.8dB Noise Figure at 1950MHz
• 17dB Gain Step
RF2451 3V Low Noise Amplifier RF2451 PCBA Fully Assembled Evaluation Board
4
Rev A8 000822
.026
.120
.116
10°MAX
0°MIN
.009 .005
.120 .116
.196
.190
1
.016 .010
.036 .032
.006 .002
.027 .017
Package Style: MSOP-8
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GENERAL PURPOSE
AMPLIFIERS
NOT FOR NEW DESIGNS
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Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage 4.0 V Supply Current 20 mA Operating Ambient Temperature -40 to +85 °C Storage Temperature -40 to +150 °C
Parameter
Specification
Unit Condition
Min. Typ. Max.
Overall
T=27°C, VCC=2.7V, V
IPSET
=0V,
V
ENABLE
=2.7V
Frequency Range 700 to 2000 MHz
LNA Performance
Freq=1.95 GHz
Gain 10.5 12.5 dB Noise Figure 1.6 dB Input IP3 +4.5 +8 dBm At 2.9mA Input VSWR 5:1 dB (Noise match) Output VSWR 1.5:1 dB Off Mode Gain -5.0 dB V
ENABLE
=0V
Gain 17 dB Freq=836MHz Noise Figure 1.6 dB Input IP3 0 dBm Off Mode Gain -8 dB V
ENABLE
=0V
Current Control
Internal current setting “ON” CMOS Low V Voltage on IPSET External current setting “ON” CMOS High V Voltage on IPSET Current into ISELECT 1 µAV
ISELECT
=2.7V
Power Control
Power “ON” Voltage CMOS High V Voltage on ENABLE Power “OFF” Voltage CMOS Low V Voltage on ENABLE Current into ENABLE 1 µAV
ENABLE
=2.7V
Power Supply
Operating Voltage 2.7 to 3.6 V Operating Current 2.9 5 mA V
CC
=2.7V, Internal current setting
Leakage Current 1 µAV
ENABLE
=0 V
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printi ng. However, RF Micro Devices reserves the ri ght to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
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Pin Function Description Interface Schematic
1RF OUT
RF output pin. Bias for the LNA is provided through this pin, hence it should be connected to VCC through an inductor.
2 ISET
This pin sets the current for the device. A resistor to ground of 1k pro­vides a current of 17.5mA. The condition for optimal IP3 is to use the internal current setting option and leave this pin open (no connect).
3VCC
Power supply for the bias circuits.
4 ENABLE
Power down control. This is a CMOS input. When this pin is CMOS “high” the device is enabled. When the level is CMOS “low” the device is shut off and a controlled attenuator is turned on.
5 IPSET
This pin selects the internal current setting when CMOS level “low”, and the external current setting when this pin is CMOS level “high”. The cur­rent is set to 2.8mA using the internal current setting, and can be up to 20mA using the external current setting.
6GND2
Ground connection for the bias circuits.
7GND1
Ground connection for the LNA. Keep traces physically short and con­nect immediately to ground plane for best performance.
8RF IN
RF input pin. This pin is not internally DC blocked and requires an external blocking capacitor.
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Applicatio n Schematic
1.95GHz
Applicatio n Schematic
836MHz
IPSET
22 nF
RF IN
10 nF
ENABLE
V
CC
1 k
3.3 nH
1.5 pF
V
CC
RF OUT
8
7
6
5
1
2
3
4
Bias Circuits
IPSET
22 nF
RF IN
82 nH
ENABLE
V
CC
1 k
18 nH
1 pF
V
CC
RF OUT
8
7
6
5
1
2
3
4
Bias Circuits
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Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
IPSET
C1
22 nF
L2
10 nH
ENABLE
V
CC
R1
1 k
L1
3.3 nH
C2
1.5 pF
V
CC
J2
LNA INPUT
J1
LNA OUTPUT
GND
IPSET
ENABLE
VCC
P1
1 2 3 4
CON4
C5
22 nF
C3
1 nF
C4
1 uF
+
VCC
2.7 V
-
+
VCC
ENVCC
2.6 V
-
+
ENABLE
IPSET
2451400A
8
7
6
5
1
2
3
4
Bias Circuits
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Evaluation Board Layout
Board Size 1” x 1”
Board Thickness 0.031”, Board Material FR-4
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