Datasheet RF2161, RF2161PCBA Datasheet (RF Micro Devices)

Preliminary

1

1

4

RF2161

2

Typical Applications

• 3V 1850-1910 CDMA-2000 Handsets

• 3V 1920-1980 W-CDMA Handsets

• Spread Spectrum Systems

Product Description

The RF2161 is a high-power, high-efficiency linear ampli­fier IC targeting 3V handheld systems. The device is
manufactured on an advanced Gallium Arsenide Hetero­junction Bipolar Transistor (HBT) process, and has been
designed for use as the final RF amplifier in 3V
CDMA-2000 and W-CDMA handsets, spread spectrum
systems, and other applications in the 1920 MHz to
1980MHz band. The device is self-contained with 50Ω
input and the output can be easily matched to obtain opti­mum power, efficiency, and linearity characteristics over
all recommended supply voltages.

3V W-CDMA POW ER 1900MHZ

3V LINEAR POWER AMPLIFIE R

• Commercial and Consumer Systems

• Portable Battery-Powered Equipment

3.50

3.35

1.20

4.20

3.95

.50

0.38

2.00

0.28

0.13

0.80

.20

3.95

3.50

3.35

1

ALL SOLDER PAD TOLERANCESP0.05mm

0.40
sq.

2

POWER AMPLIFIERS

.50 sq.

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS

GND2

VCC1

RFIN

ü

VCC2

16 1415

1

2

3

4

678

5

GND1

SiGe HBT

VCC2

VCC2

VPD1

VMODE

VCC

VPD2

Si CMOS

2F0

13

12

RF OUT

11

RF OUT

10

RF OUT

9

GND

Functional Block Diagram

Package Style: MP16KO1A

Features

• Single 3V Supply

• 27dBm Linear Output Power

• 30dB Linear Gain

• 35% Linear Efficiency

• On-board Power Down Mode

Ordering Information

RF2161 3V W-CDMAPower 1900MHZ 3V Linear Power

RF2161 PCBA Fully Assembled Evaluation Board

RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro,NC 27409, USA

Amplifier

Tel [phone]

Fax [phone]

http://www.rfmd.com

Rev A3 010514

2-197

2

RF2161

Absolute Maximum Ratings

Parameter Rating Unit

Supply Voltage (RF off) +8.0 V
Supply Voltage (P
Mode Voltage (V
Control Voltage (VPD)+3.0V
Input RF Power +6 dBm

Operating Case Temperature -30 to +100 °C
Storage Temperature -30 to +150 °C

≤31dBm) +5.0 V

OUT

)+3.0V

MODE

DC
DC
DC
DC

RF Micro Devices believesthe furnishedinformation is correctand accurate
at the time of this printing. However,RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).

Preliminary

Caution! ESD sensitive device.

Parameter

Overall

POWER AMPLIFIERS

Usable Frequency Range 1850 2000 MHz
Typical Frequency Range 1850 to 1910 MHz

Linear Gain 28 30 dB Mo de=Low

Second Harmonic (including

second harmonic trap)
Third Harmonic -40 dBc
Fourth Harmonic -45 dBc
Maximum Linear Output Power

(W-CDMA Modulation)
Total Linear Efficiency 30 35 % V

Adjacent Channel Power

Rejection@5MHz
Adjacent Channel Power

Rejection@10MHz
Noise Power -137 dBm/Hz P

Maximum Linear Output Power

(W-CDMA Modulation)
Total Linear Efficiency 35 %
Input VSWR < 2 :1
Output Load VSWR 5:1 No oscillations

Min. Typ. Max.

Specification

1920 to 1980

26 28 dB Mode=High

-35 dBc

27 dBm

-40 -38 dBc P

-50 -48 dBc P

26 dBm V

Unit Condition

Power Supply

Power Supply Voltage 3.0 3.4 5.0 V
Idle Current 120 mA MODE = high
V

Current 13 mA Total pins 6 and 8, VPD=2.8V

PD

Total Current (Power down) 10 10 µAV
V

“Low” Voltage 0 0.2 V

PD

“High” Voltage 2.7 2.8 2.9 V

V

PD

MODE “High” Voltage 2.5 2.8
MODE “Low” Voltage 0 0.5

T=25°C, VCC=3.4V unless otherwise speci­fied

High, P

MODE

=27dBm, W-CDMA Modulation

OUT

3G PP 3.2 03-00 DPCCH+1DPDCH

=27dBm, W-CDMA Modulation

OUT

3G PP 3.2 03-00 DPCCH+1DPDCH

=+27dBm, Rx Band 2110MHz to

OUT

2170MHz

=3.0V

CC

=low

PD

OUT

=27dBm

2-198

Rev A3 010514

Preliminary

RF2161

Pin Function Description Interface Schematic

1VCC2

2GND2

3VCC1

4RFIN

5GND1

6 VPD1

7VMODE

8 VPD2

9GND

10 RF OUT

11 RF OUT
12 RF OUT
13 2FO

14 VCC
15 VCC2

16 VCC2

Powersupply for second stage and interstage match. Pins 1, 15 and 16
should be connected by a common trace where the pins contact the
printed ci r cuit board.

Ground for second stage.For best performance, keep traces physically
short and connect immediately to ground plane. This groun d should be
isolated from the backside ground contact.

Power supply for first stage and interstage match. VCCshould be fed
through a 1.2nH inductor terminated with a 8.2pF capacitor on the sup-

ply side. The inductor should be as close to the pin as possible.
RF input. An external series capacito r is required as a DC block. The

input match can be improved to <2:1 by using a series capacitor and
shunt inductor.

Ground for first stage. For best performance, keep traces physically
short and connect immediately to ground plane. This groun d should be
isolated from the backside ground contact.

Power Down control for first and second stages. When this pin is “low”,
all first and second stage circuits are shut off. When this pin is 2.8V,all
first and second stage circuits operate normally. V

lated 2.8V for the amplifier to operate properly over all specified tem­perature and voltage ranges. A dropping resistor from a h igher
regulated voltage may be used to provide the required 2.8V.

V

adjusts the bias to the 2nd and 3rd stages. For full power oper-

MODE

ation, MODE is set low. When operating in a lower output power mode
(<+25dBm) this pin is set high to reduce bias current by up to 50%. An
external series resistor is optional to limit the amount of current

required. At low temperature (-30
low to maintain correct o perat ion.
Power Down control for third stag e. When this pin is “low”, all and third

stage circuits are shut off. When this pin is 2.8V, all and third stage cir­cuits operate normally. V

to operate properly over all specified temperature and voltage ranges.
A dropping resistor from a higher regulated voltage maybeused to pro­vide the required 2.8V. A 15pF hig h frequency bypass capacitor is rec­ommended.

For best perfo rmance, keep traces physically short and connect imme­diately to ground plane. T his ground should be isolated from the back­side ground contact.

RF output and power supply for final stage. This is the unmatched col­lector output of the third stage. A DC block is required following the
matching components. The biasing may be provided via a parallel L-C
set for resonance at the operating frequency of 1920MHz to 1980MHz.
It is important to select an inductor with very low DC resistance with a
1A current rating. Alternatively,shunt microstrip techniques are also
applicable and provide very low DC resistance. Low frequency bypass­ing is required for stability.

Same as pin 10. See pin 10.
Same as pin 10. See pin 10.
Second harmonic trap.Keep traces physically short and connect imme-

diately to ground plane. This ground should be isolated from backside
ground contact.

Supply for bias reference and control circuits. High frequency bypass­ing may be necessary.

Same as Pin 1.
Same as Pin 1.

PD

ο

C), it is recommended to set V

requires a regulated 2.8V for the amplifier

requires a regu-

PD1

MODE

See pin 4.

RF IN

See pin 4.

From Bias
Stages

From Bias
Stages

VCC1

GND1

RF OUT

2

POWER AMPLIFIERS

Rev A3 010514

2-199

2

RF2161

Pin Function Description Interface Schematic

Pkg

Base

POWER AMPLIFIERS

GND

Ground connection. The backside of the package should be soldered
to a top side ground pad which is connected to the ground plane with
multiple vias. The pad should have a short thermal path to the ground
plane.

Preliminary

2-200

Rev A3 010514

Preliminary

1 µF

10 nF

Application Schemati c

W-CDMA (1920MHz to 1980MHz)

V

CC

+

10 nF

4.7 uF
+

10 nF

RF2161

2

RF IN

VREG

VMODE

8.2 pF

15 pF

1.2 nH

R2

C30

16 1415

1

2

3

4

678

5

15 pF

1uF

+

1.8k Ω

10 nH

TL

3

15 pF

15 pF

15 pF

13

12

11

10

9

L1*

1

C1** C14**

TL

TL

15 nH

* L1 is a High Q inductor (i.e., Coilcraft 0805HQ-series).
**C1 andC14 are High Q capacitors

(i.e., Johanson C-series).

15 pF

2

POWER AMPLIFIERS

RF OUT

Board R2 (Ω) C14 (pF)C30 (pF) C1 (pF) L1 (nH)
WCDMA 150 2.28.2 4.7 16

Rev A3 010514

Transmission

Line Length

WCDMA 0.044" 0.140" 0.022"

TL

1

TL

2

TL

3

2-201

RF2161

Preliminary

Evaluation Board Schema t ic

W-CDMA (1920MHz to 1980MHz)

2

C7

1 µF

+

C12

10 nF

C11

8.2 pF

POWER AMPLIFIERS

C5

J1

RF IN

P2

P3

50 Ωµstrip

15 pF

L3

1.2 nH

R2

P1

C8

10 nF

C30

16 1415

1

2

3

4

678

5

C27

15 pF

C10
1uF

+

R1

1.8k Ω

L2

10 nH

TL

C2

4.7 uF
+

C26

10 nF

C6

15 pF

3

13

12

11

10

9

2161400-

C13

15 pF

C4

15 pF

P2
P3

L1*

TL

L4

15 nH

* L1 is a High Q inductor(i.e., Coilcraft0805HQ-series).
**C1 and C14 are High Q capacitors

(i.e., Johanson C-series).

1

C1** C14**

P4

TL

2

VCCP1
VREG
VMODE
GND

C3

15 pF

50 Ωµstrip

J2

RF OUT

Board R2 (Ω) C14 (pF)C30 (pF) C1 (pF) L1(nH)
WCDMA 150 2.28.2 4.7 16

2-202

Transmission

Line Length

WCDMA 0.044" 0.140" 0.022"

TL

1

TL

2

TL

3

Rev A3 010514

Preliminary

Board Thickness 0.028”, Board Material FR-4, Multi-Layer, Ground Plane at 0.014”

RF2161

Evaluation Board Layout

Board Size 2.00” x 2.00”

2

POWER AMPLIFIERS

Rev A3 010514

2-203

2

RF2161

POWER AMPLIFIERS

Preliminary

2-204

Rev A3 010514