Datasheet RF2132, RF2132PCBA Datasheet (RF Micro Devices)

RF2132

2

Typical Applications

• 4.8V AMPS Cellular Handsets

• 4.8V CDMA/AMPS Handsets

• 4.8V JCDMA/TACS Handsets

Product Description

The RF2132 is a high power, high efficiency linear ampli­fier IC. The device is manufactured on an advanced Gal­lium Arsenide Heterojunction Bipolar Transistor (HBT)
process, and has been designed for use as the final RF
amplifier in dual-mode 4-cell CDMA/AMPS handheld digi­tal cellular equipment, spread-spectrum systems, and
other applications in the 800MHz to 950MHz band. The
device is self-contained with 50Ω input and the output
can be easily matched to obtain optimum power, effi­ciency, and linearity characteristics over varying supply
and control voltages.

LINEAR POWER AMPLIFIER

• Driver Amplifier in Cellular Base Stations

• Portable Battery-Powered Equipment

-A-

0.009

0.004

0.050

8° MAX

0° MIN

0.392

0.386

0.158

0.150

0.244

0.230

0.021

0.014

0.069

0.064

0.060

0.054

2

POWER AMPLIFIERS

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS

VCC

NC

RF IN

GND

GND

GND

GND

PC

ü

SiGe HBT

1

2

3

4

5

6

7

8

BIAS

Si CMOS

16

GND

15

RF OUT

14

RF OUT

13

GND

12

GND

11

RF OUT

10

RF OUT

9

GND

Functional Block Diagram

0.010

0.035

0.008

0.016

Package Style: Standard Batwing

Features

• Single 4.2V to 5.0V Supply

•Upto29dBmLinearOutputPower

• 29dB Gain With Analog Gain Control

• 45% Linear Efficiency

• On-board Power Down Mode

• 800MHz to 950MHz Operation

Ordering Information

RF2132 Linear Power Amplifier
RF2132 PCBA Fully Assembled Evaluation Board

RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro,NC 27409, USA

Tel [phone]

Fax [phone]

http://www.rfmd.com

Rev B9 010417

2-109

2

RF2132

Absolute Maximum Ratings

Parameter Rating Unit

Supply Voltage (No RF) -0.5 to +8.0 V
Supply Voltage (P
Power Control Voltage (VPC) -0.5to+5.0orV
DC Supply Current 800 mA

Input RF Power +12 dBm
Output Load VSWR 10:1
Storage Temperature -40 to +150 °C
Junction Temperature 200 °C

<32dBm) -0.5 to +5.0 V

OUT

CC

DC
DC

V

Caution! ESD sensitive device.

RF Micro Devices believesthe furnishedinformation is correctand accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice.RF Micro Devices does not
assume responsibility for the use of the described product(s).

Parameter

POWER AMPLIFIERS

Overall

Usable Frequency Range 800 824 to 849 950 MHz
Linear Gain 27 29 31 dB
Total Linear Efficiency 40 45 %
Efficiency at Max Output 50 55 %
OFF Isolation 23 27 dB V

Second Harmonic -30 dBc Including Second Harmonic Trap
Maximum Linear Output Power 28.5 29 IS-95A CDM A Modulation
Adjacent Channel Power Rejec-

tion @ 885 kHz

Adjacent Channel Power Rejec-

tion @ 1.98 MHz
Maximum CW Output Power 31.5 32 dBm
Operating Case Temperature -30 110 °C Pout = 31 dBm, Efficiency = 55%
Ambient Operating Temperature -30 100 °C
Junction to Case Thermal Resis-

tance
Input VSWR <2:1
Output Load VSWR 10:1 No oscillations

Specification

Min. Typ. Max.

-46 -44 dBc Pout = 28 dBm

-58 -56 dBc Pout = 28 dBm

85 °C/W

Unit Condition

T=25 °C, VCC=4.8V, VPC=4.0V,
Freq=824MHz to 849MHz

=0V,PIN=+6dBm

PC

ACPR can be improved by trading off effi­ciency.

Power Down

Turn On/Off Time 100 ns
Total Current 10 µA “OFF” State
V

“OFF” Voltage 0.2 0.5 V

PC

V

“ON” Voltage 3.6 4.0 Vcc V

PC

Power Supply

Power Supply Voltage 4.2 4.8 5.0 V Operating voltage
Idle Current 40 100 mA V

Current into VPC pin 15 20 mA “ON” State

PC

=4.0V

2-110

Rev B9 010417

RF2132

Pin Function Description Interface Schematic

1VCC1

2NC
3RFIN

4GND
5GND

6GND

7GND
8PC

Power supply for the driver stage, and interstage matching. Shunt
inductance is required on this pin, which can be achieved by an induc­tor to V

the inductor is frequency dependent; 3.3nH is required for 830MHz,
and 1.2nH for 950MHz. Instead of an inductor, a high impedance
microstrip line can be used.

Not Connected.
RF input. This is a 50Ω input, but the actual input impedance depends

on the interstage matching network connected to pin 1. An external DC
blocking capacitor is required if this port is connected to a DC path to
ground or a DC voltage.

Ground connection. Keep traces physically short and connect immedi­ately to the ground plane for best performance.

Same as pin 4.
Ground for stage 1. Keep traces physically short and con nect immedi-

ately to ground plane for best performance. This ground s hould be iso­lated from the batwing and other ground contacts. See evaluation
board layout.

Same as pin 6.
Power Control. When this pin is "low", all circuits are shut off. A "low" is

typically 0.5V or less at ro o m temperature. During normal operation
this pin is the power control. Control range varies from about 2V for
0dBmtoV

can be achieved depends on the actual output matching. PC should
never exceed 5.0V or VCC, whichever is the lowest.

, with a decoupling capacitor on the VCCside. The value of

CC

for +31dBm RF output power. The maximum power that

CC

See pin 1.

PC

RF IN

From Bias
Stages

VCC

To RF
Transistors

2

POWER AMPLIFIERS

9GND

10 RF OUT

11 RF OUT
12 GND
13 GND
14 RF OUT
15 RF OUT
16 GND

Same as pin 4.
RF Output and power supply for the output stage. The four output pins

are combined, and bias voltage for the final stage is provided through
these pins. The external path must be kept symmetric until combined to
ensure stability.An external matching networkis required toprovide the
optimum load impedance; see the application schematics for details.

Same as pin 10. See pin 10.
Same as pin 4.
Same as pin 4.
Same as pin 10. See pin 10.
Same as pin 10. See pin 10.
Same as pin 4.

From Bias
Stages

RF OUT

Rev B9 010417

2-111

2

RF2132

Vcc = 4.8 V
Vpc = 4.0 V

Application Schematic

V

CC

1nF

100 pF

1.8 nH

100 pF

1

2

16

6.8 nH

15

100 pF

RF IN

POWER AMPLIFIERS

18 k

Ω

V

PC

3

4

5

6

BIAS

7

8

14

3pF

13

12

11

3.3 nH

100 pF

RF OUT

10

12 pF

4.3 pF

9

1nF

Evaluation Board Schema t ic

(Download Bill of Materials from www.rfmd.com.)

P1-1

Interstage tuning (L1) for
centering output frequency

RF IN

33 pF

J1

Adds bias to the first
amplifier stage for
improved linearity

P1-3

3.3

C8

C12

Power supply filtering/bypassing for V

C1

100 nFC211

L1

1.8 nH

C6

100 pF

R1

Ω

18 k

C13

µ

F

1nF

C14

100 pF

1

2

3

4

5

6

7

8

BIAS

C3

µ

F

µ

F

1

16

15

14

13

12

11

10

9

cc

C10

12 pF

C4

1nF

C5

100 pF

L2

6.8 nH

C7

3pF

Vcc = 4.8 V
Vpc = 4.0 V

P1

1

P1-1

2

P1-3

3

Bias inductor for the
amplifier output stage

Harmonic trap: C7series resonates with
internal bondwires of pins 14 and 15 at

to effectively short out 2nd harmonic

2f

0

for optimum gain and efficiency

L3

3.3 nH

C11

4.3 pF

C9

RF OUT

100 pF

J2

Matching network for
optimum load impedance

VCC

GND

PC

2-112

Power supply filtering/bypassing for V

PC

Rev B9 010417

Evaluation Board Layout

2” x 2”

RF2132

2

POWER AMPLIFIERS

Rev B9 010417

2-113

RF2132

RF2132 Evaluation Board

Vcc = 4.8 V, Vpc = 4.0 V, Frequency = 836 MHz, IS-95ACD MA

2

90

80

ACPR1.98 MHz

350

300

70

ACPR885 kHz

250

60

POWER AMPLIFIERS

50

40

Current

30

ACPR (-dBc), Efficiency (%)

200

150

100

Current (mA)

20

Total Efficiency

50

10

0

0

28 26 24 22 20 18 16 14 12 10

Pout(dBm)

2-114

Rev B9 010417