
RF2115L
2
Typical Applications
• Analog Communication Systems
• Analog Cellular Systems (AMPS & TACS)
• 900MHz Spread-Spectrum Systems
Product Description
The RF2115L is a high power amplifier IC. The device is
manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been
designed for use as the final RF amplifier in analog cellular phone transmitters or ISM applications operating at
915 MHz. The device is packaged in a 16-lead ceramic
quad leadless chip carrier with a backside ground. The
device is self-contained with the exception of the output
matching network and power supply feed line. A two-bit
digital control provides 4 levels of power control, in 10dB
steps.
HIGH POWER UHF AMPLIFIER
• 400MHz Industrial Radios
• Driver Stage for Higher Power Applications
• Portable Battery-Powered Equipment
.150
.050
R.008
.033
.017
.258
.242
1
7
11
.050
.025
.098
.258
.242
.022
.018
.075
.065
RF2
2
POWER AMPLIFIERS
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
ü
SiGe HBT
Si CMOS
VCC2
NC
G20
NC
rad
G10
1141516
2
VCC3
VCC1
GND
PD
S
Functional Block Diagram
BIAS
CIRCUIT
3
4
5
ee
Upg
GAIN CONTROL
6789
RF IN
RF OUT
NC
ed
13
RF OUT
12
GND
11
RF OUT
10
RF OUT
P
od
r
ct
u
Package Style: QLCC-16
.098
Features
• Single 5V to 6.5V Supply
•Upto1.0WCWOutputPower
• 33dB Small Signal Gain
• 48% Efficiency
• Digitally Controlled Output Power
• Small Package Outline (0.25" x 0.25")
Ordering Information
RF2115L High Power UHF Amplifier
RF2115L PCBA Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro,NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev B1 010329
2-39

2
RF2115L
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage (VCC) -0.5 to +8.5 V
Power Down Voltage (VPD) -0.5 to +5.0 V
Control Voltage (G10, G20) -0.5 to +5.5 V
DC Supply Current 700 mA
Input RF Power +12 dBm
Output Load 20:1
Operating Case Temperature -40 to +100 °C
Operating Ambient Temperature -40 to +85 °C
Storage Temperature -40 to + 150 °C
DC
Caution! ESD sensitive device.
RF Micro Devices believesthe furnishedinformation is correctand accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice.RF Micro Devices does not
assume responsibility for the use of the described product(s).
Specification
+30 dBm V
+29.5 dBm V
+28.5 dBm V
40 48 %
Unit Condition
T=25°C, VCC=5.8V, VPD=5.0V, Z
P
=0dBm, Freq=840MHz
IN
higher output power; power may actually
decrease.
CC
CC
CC
=5.8V, Z
11
=5.0V, Z
=5.0V, Z
7
LOAD
LOAD
LOAD
CC
=12Ω
=9Ω
=12Ω
RF2
ct
u
od
G20 G10
r
+17 +20 +23 dBm 1 0
+7 +11 +13 dBm 0 1
-4 +2.5 +6 dBm 0 0
P
ed
75 125 175 mA 1 0
35 56 90 mA 0 1
21 38 50 mA 0 0
rad
V
A
PD
<0.1V
DC
does not result in
Output
Parameter
ee
Upg
POWER AMPLIFIERS
Overall
Frequency Range 430 to 930 MHz
Maximum CW Output Power +30.5 dBm Note that increasing V
Total CW Efficiency at Maximum
Small-signal Gain 33 dB
Second Harmonic -23 dBc Without external second har monic trap
Third Harmonic -36 dBc
Fourth Harmonic -35 dBc
Input VSWR <2:1
Input Impedance 50 Ω
Power Control
Output Power +30 +30.5 +36 dBm 1 1
Power Supply Current 350 415 600 mA 1 1
Idle Current 30 55 80 mA 1 1
Power Down “ON” 5.0 V Voltage supplied to the input; Part is “ON”
Power Down “OFF” 0 0.2 V Voltage supplied to the input; Part is “OFF”
Power Down Control
Power Down “ON” 5.0 V Voltage supplied to the input; Part is “ON”
Power Down “OFF” 0 0.2 V Voltage supplied to the input; Part is “OFF”
Current Drain 1 10 µ
Min. Typ. Max.
S
LOAD
=9Ω,
2-40
Rev B1 010329

RF2115L
Pin Function Description Interface Schematic
1VCC2
2VCC3
3VCC1
4GND
5PD
6RFIN
7G20
8G10
ee
S
9NC
Positive supply for the second stage (driver) amplifier. This is an
unmatched transistor collector output. This pin should see an inductive
pathtoACground(V
tance can be achieved with a short, thin microstrip line or with a low
value chip inductor (approximately 2.7nH). At lower frequencies, the
inductance value should be larger (longer microstrip line) and V
should be bypassed with a larger bypass capacitor (see the application
schematic for 430 MHz operation). This inductance for ms a matching
network with the internalseries capacitor between the second and third
stages, setting the amplifier’s frequency of m aximum gain. An additional 1µFbypass capacitorinparallel with the UHFbypass capacitoris
also recommended, but placement of this component is not as critical.
In most applications, pins 1, 2, and 3 can share a single 1µF bypass
capacitor.
Positive supply for the active bias circuits. This pin can be externally
combined with pin 3 (VCC1) and the pair bypassed with a single UHF
capacitor, placed as close as possible to the package. Additional
bypassing of 1µF is also recommended, but proximity to the package is
not as critical. In most applications, pins 1, 2, and 3 can share a single
1µF bypass capacitor.
Positive supply for the first stage (input) amplifier. This pin can be externally combined with pin 2 (VCC3) and the pair bypassed with a single
UHF capacitor, placed as close as possible to the package. Additional
bypassing of 1µF is also recommended, but proximity to the package is
not as critical. In most applications, pins 1, 2, and 3 can share a single
1µF bypasscapacitor.This pin can als o be used for coarse analog gain
control, even though it is not optimized for this function.
Ground connection. Keep traces physically short and connect immediately to ground plane for best performance. In addition, for specified
performance, the package’s backside metal should be soldered to
ground plane.
Powerdown control voltage. When this pin is at 0V, the device will be in
power down mode, dissipating minimum DC power. When this pin is at
5V the device will be in full power mode delivering maximum available
gain and output power capability.This pin may also be used to perform
some degree of gain con trol or power control when set to voltages
between 0V and 5V. It is not optimized for this function so the transfer
function is not linear over a wide range as with other devices specifically designed for analog gain control; however, it may be usable for
coarse adjustment or in some closed loop AGC systems. This pin
should not, in any circumstance, be higher in voltage than V
should it ever be higher than 6.5V. This pin should also have an external UHF bypassing capacitor.
Amplifier RF input. This is a 50Ω RF input port to the amplifier. It does
not contain internal DC blocking and therefore should be externally DC
blocked before connecti ng to any device which has DC present or
rad
which contains a DC path to ground. A series UHF capacitor is recommended for the DC blocking.
RF output power gain control MSB (see specification table for logic).
The control voltage at this pin should never exceed V
Upg
should also have an external UHF bypassing capacitor.
RF output power gain control LSB (see specification table for logic).
The control voltage at this pin should never exceed V
should also have an external UHF bypassing capacitor.
Not internally connected.
with a UHF bypassing capacitor). This induc-
CC
RF2
ct
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od
r
P
ed
.Thispin
CC
.Thispin
CC
CC
11
, nor
CC
7
2
POWER AMPLIFIERS
Rev B1 010329
2-41

2
RF2115L
Pin Function Description Interface Schematic
10 RF OUT
POWER AMPLIFIERS
11 RF OUT
12 GND
13 RF OUT
14 RF OUT
15 NC
16 NC
Pkg
Base
GND
Amplifier RF output. This is an unmatched collector output of the final
amplifier transistor.It is internally connected to pins 10, 11, 13, and 14
to provide low series inductance and flexibility in output matching. Bias
for the final power amplifier output transistor must also be provided
through two of these four pins. Typically,pins 10 and 11 are connected
to a network that creates a second harmonic trap.For 830MH z operation, this network is simply a single 2.4pF capacitor from both pin s to
ground. This capacitor series resonates with internal bond wires at two
times the operating frequency, effectively shor ting out the second harmonic. Shorting out this harmonic serves to increase the amplifier’s
maximum output power and efficiency, as well as to lower the level of
the second harmonic output. Typically, pins 13 and 14 are externally
connected very close to the package and used as the RF output with a
matching network that presents the optimum load impedance to the PA
for maximum power and efficiency, as well as providing DC blocking at
the output. An additionalnetwork of a bias inductor and parallel resistor
provides DC bias and helps to protect the output from high voltage
swings due to severe load mismatches. Shunt protection diodes are
included to clip peak voltage excursions above ap proximately 15V to
prevent voltage breakdown in worst case conditions.
Same as pin 10.
Same as pin 4.
Same as pin 10.
Same as pin 10.
Not internally connected.
Not internally connected.
This contact is the main ground contact for the entire device. Care
should be taken to ensure that this contact is well soldered in order to
prevent performance from being degraded from that indicated in the
specifications.
RF2
11
7
ct
u
2-42
ee
S
Upg
rad
ed
od
r
P
Rev B1 010329

RF2115L
Evaluation Board Schema t ic
840MHz Operation
(Download Bill of Materials from www.rfmd.com.)
2
P1
P1-3
C10
1
1
VCC
2
GND
PD
3
C9
µ
F
1nF
P1-1
C14
100 nF
P1-1
POWER AMPLIFIERS
P2-1
P2-3
P2
1
2
3
C8
100 nF
B2
GND
B1
C7
330 pF
(PCB mat'l: FR-4,
Thickness: 0.031")
C6
100 pF
0.01" x 0.2"
1141516
C11
100 nF
R3
180
L1
47 nH
Ω
L2
1.8 nH
2115400 Rev -
C2
6.8 pF
C12
4.7 pF
SMA
strip
J2
RF
OUT
50
Ω µ
7
P1-3
RF
IN
SMA
J1
2
C5
100 pFC4100 pF
C3
330 pF
50
Ω µ
strip
C1
100 pF
BIAS
CIRCUIT
3
4
GAIN CONTROL
5
6789
R1
u
1k
Ω
ct
RF2
R2
1k
Ω
13
12
11
10
11
C13
2.4 pF
2-44
ee
S
Upg
rad
ed
P
od
r
P2-3 P2-1
Rev B1 010329