
RF2114
2
Typical Applications
• Digital Communication Systems
• Spread-Spectrum Communication Systems
• Driver for Higher Power Linear Applications
Product Description
The RF2114 is a medium to high power linear amplifier
IC. The device is manufactured on an advanced Gallium
Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been designed for use as the final linear
RF amplifier in UHF radio transmitters operating between
1MHz and 600MHz. It may also be used as a driver
amplifier in higher power applications. The device is selfcontained with the exception of the output matching network, power supply feed line, and bypass capacitors. The
device can be used in 3-cell battery applications. The
maximum CW output at 3V is 125 mW. The unit has a
total gain of 35dB, depending upon the output matching
network.
MEDIUM POWER LINEAR AMPLIFIER
• Portable Battery-Powered Equipment
• Commercial and Consumer Systems
• Base Station Equipment
0.010
0.004
0.059
0.057
0.347
0.339
8° MAX
0° MIN
0.0500
0.0164
0.156
0.148
0.252
0.236
0.050
.018
.014
0.010
0.007
2
POWER AMPLIFIERS
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
RF1 IN
GND
GND
PD
RF2 IN
RF1 OUT
VCC1
1
2
3
4
5
6
7
!
SiGe HBT
PRE AMP
BIAS CIRCUIT
Si CMOS
PA
14
13
12
11
10
9
8
RF2 OUT
RF2 OUT
GND
GND
GND
RF2 OUT
RF2 OUT
Functional Block Diagram
Package Style: SOIC-14
Features
• 1MHz to 600MHz Oper ation
• Over 800mW CW Output Power
• 35dB Small Signal Gain
• Single 2.7V to 6.5V Supply
• 45% Efficiency
• Digitally Controlled Power Down Mode
Ordering Information
RF2114 Medium Power Linear Amplifier
RF2114 PCBA Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A5 001222
2-33

2
RF2114
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.5 to +8.5 V
Power Down Voltage (VPD) -0.5 to +5.0 V
DC Supply Current 500 mA
Input RF Power +12 dBm
Output Load VSWR 20:1
Operating Ambient Temperature -40 to +85 °C
Storage Temperature -40 to +150 °C
DC
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printi ng. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Parameter
Overall
POWER AMPLIFIERS
Frequency Range 1 to 600 MHz
Saturated Output Power +28 +29 +31 dBm
Output Power >+27 dBm Frequency>450MHz
Power Gain 30 36 40 dB
CW Total Efficiency 45 %
Two Tone Total Efficiency 26 % P
IM
3
IM
5
Second Harmonic -24 dBc Without external second harmonic trap
Third Harmonic -30 dBc
Output Noise Power <-125 dBm/Hz
Input VSWR <3:1 With external matching network; see appli-
Input Impedance 50 Ω With external matching network; see appliLoad Impedance 18+j0 Ω Load impedance for optimal match
Min. Ty p. Max.
Specification
-50 -40 -25 dBc P
-70 -43 -30 dBc P
Unit Condition
T=25°C, VCC=5.8V, VPD=4.0 V,
Z
=18Ω, PIN=6dBm, Freq=150MHz
LOAD
= +19dBm/tone
OUT
= +19dBm/tone
OUT
= +19dBm/tone
OUT
cation schematic
cation schematic
Power Down Control
Power Down “ON” V
Power Down “OFF” 0 0.2 V Voltage supplied to the input; Part is “OFF”
CC
V Voltage supplied to the input; Part is “ON”
Power Supply
Power Supply Voltage 2.7 to 6.5 V
Power Supply Idle Current 45 90 mA
Supply Current 150 300 500 mA Total of pins 5 and 6
V
Current <3.5 mA Into pin 4
PD
Total "OFF" Current Drain 10 µ
Turn-on Time <100 ns VPD=0 to VPD=+4V
A
V
PD
<0.1V
DC
DC
2-34
Rev A5 001222

RF2114
Pin Funct ion Description Interface Schematic
1RF1 IN
2GND
3GND
4PD
5RF2 IN
6RF1 OUT
7VCC1
8RF2 OUT
9RF2 OUT
10 GND
11 GND
12 GND
13 RF2 OUT
14 RF2 OUT
RF input pin. This pin is internally connected to the bias circuits. An
external DC blocking capacitor is required. The value of this capacitor
depends on the actual operating frequency.
Ground connection. Keep the connection to the backside ground plane
as short as possible, by placing the vias close to the pin.
Same as pin 2.
Power down control voltage. When this pin is at 0V, the device will be in
power down mode, dissipating minimum DC power. When this pin is at
(but not higher than 5.0V max), the device will be in full power
V
CC
mode delivering maximum gain and output power capability. This pin
may also be used to perform some degree of gain control or power control when set to voltages between 0V and V
lowest. It is not optimized for this function so the transfer function is not
linear over a wide range as with other devices specifically designed for
analog gain control. However, it ma y be usable for coarse adjustment or
in some closed loop AGC systems. This pin should not, in any circumstance, be higher in voltage than V
external bypassing capacitor.
RF input of the power stage. This pin is internally connected to the bias
circuits. An external DC blocking capacitor is required. Th is same
capacitor can also be used for interstage matching. Typically this
capacitor is between RF2 IN (pi n 5) and RF1 OUT (pin 6); see the
application schematics for details.
RF output of the pre-amplifier. Power supply needs to be supplied to
this pin through an inductor to V
between pin 5 and 6 the interstage matching circuit is formed. See the
application schematics for values for different frequencies.
Positive supply for the active bias circuits. This needs to be bypassed
with a single capacitor, placed as close as possible to the package.
Additional bypassing of 1µF is also recommended, but proximity to the
package is not as critical.
Amplifier RF output. This is an unmatched collector output of the final
amplifier transistor. Pins 8, 9, 13, and 14 are connected internally. Bias
for the final power amplifier output transistor must also be provided
through one of these two pins. Typically, pins 8 and 9 are connected to
a network that provides the DC bias and also creates a second harmonic trap. A capacitor series resonates with internal bond wires and
some additional series inductance, and acts as a trap at two times the
operating frequency, effectively shorting out the second harmonic.
Shorting out this harmonic serves to increase the amplifier’s maximum
output power and efficiency, as well as to lower the level of the second
harmonic output. Typically, pins 13 and 14 are externally connected
very close to the package and used as the RF output with a matching
network that presents the optimum load impedance to the PA for maximum power and efficiency, as well as providing DC blocking at the output.
Same as pin 8.
Same as pin 2.
Same as pin 2.
Same as pin 2.
Same as pin 8.
Same as pin 8.
. This pin should also have an
CC
. Together with the se ries capacitor
CC
or 5.0V, whichever is the
CC
2
POWER AMPLIFIERS
Rev A5 001222
2-35

RF2114
Application Schematic for 150MHz Operation
2
POWER AMPLIFIERS
RF INPUT
P1-3
P1-1
RF INPUT
P1-3
P1-1
50 Ω µstrip
10 µF
330 pF
1 nF
1200 nH
150 nH
100 nH
120 pF
330 pF10 nF
6.8 pF
330 pF
1
2
3
4
5
6
7
PRE AMP
BIAS CIRCUIT
14
13
12
11
10
PA
9
8
33 pF
22 nH
5.6 nH
22 nH
330 pF
Application Schematic for 450MHz Operation
20 pF
50 Ω µstrip
33 nH
100 pF
10 µF
22
Ω
4.3 pF
12 nH200
Ω
100 pF
330 pF10 nF
1
2
3
4
5
6
7
PRE
AMP
BIAS CIRCUIT
14
13
12
11
10
PA
9
8
4.3 pF
6.8 nH
1.8 nH
10 nH
100 pF
330 pF
24 pF
150 pF
9.1 pF
Designed for V
V
P
OUT
50 Ω µstrip
50 Ω µstrip
CC
= 5 V
PC
= 500 mW
RF OUTPUT
RF OUTPUT
= 5 V
2-36
Rev A5 001222

J1
RF IN
RF2114
Evaluation Board Schematic (150MHz)
(Download Bill of Materials from www.rfmd.com.)
2114400 Rev A
C1
50 Ω µstrip 50 Ω µstrip
330 pF
L1
100 nH
C2
6.8 pF
136 MHz to 178 MHz
1
2
3
PRE
AMP
L2
14
13
12
22 nH
C5
330 pF
C4
24 pF
J2
RF OUT
2
P1-3
P1-1
C12
10 nF
10
C11
C6
1 nF
L3
1200 nH
150 nH
C7
µ
F
330 pF
C3
120 pF
L4
C10
1 nF
4
5
6
7
BIAS CIRCUIT
PA
11
10
9
8
L6
5.6 nH
L5
22 nH
C9
33 pF
C8
330 pF
P1
1
P1-1 VCC
GND
2
P1-3 PC
3
POWER AMPLIFIERS
Rev A5 001222
2-37