The RF2105L is a high power, high efficiency linear
amplifierIC.Thedeviceismanufacturedonanadvanced
Gallium Arsenide HeterojunctionBipolar Transistor (HBT)
process, and has been designed for use as the final RF
amplifier in digital cellular phone transmitters or ISM
applications requiring linear amplification. It is packaged
in a 16-lead ceramic package with a backside ground.
The device i s self-contained with the exception of the output matching network and powersupply feed line.
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro,NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev B3 010720
2-19
Page 2
2
RF2105L
Absolute Maximum Ratings
ParameterRatingUnit
Supply Voltage (VCC)-0.5 to +8.5V
Power Down Voltage (VPD)-0.5 to +6.5V
DC Supply Current700mA
Input RF Power+12dBm
Output Load20:1
Operating Case Temperature-40 to +100°C
Operating Ambient Temperature-40 to +85°C
Storage Temperature-40 to + 150°C
DC
DC
Caution! ESD sensitive device.
RF Micro Devices believesthe furnishedinformation is correctand accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice.RF Micro Devices does not
assume responsibility for the use of the described product(s).
Parameter
Min.Typ.Max.
POWER AMPLIFIERS
Overall
Specification
UnitCondition
T=25°C, VCC=5.8V,VPD=5.8V,Z
P
=0dBm, Freq=840MHz
IN
Frequency Range430 to 930MHz
Maximum CW Output Power+30.8dBmV
=5.8V,VPD=5.8V,Z
CC
Note that increasing V
LOAD
above 5.8V does
CC
not result in higher output power; power may
actually decrease.
+29.3dBmV
+28.5dBmV
+30dBmV
+27.8dBmV
+27dBmV
=5.0V,VPD=5.0V,Z
CC
=4.4V,VPD=4.4V,Z
CC
=5.8V,VPD=5.8V,Z
CC
=5.0V,VPD=5.0V,Z
CC
=4.4V,VPD=4.4V,Z
CC
LOAD
LOAD
LOAD
LOAD
LOAD
CW Efficiency at Max Output48%
DC Current at Max Output450mA
Small-signal Gain33dB
Second Harmonic-23dBcWithout external second harmonic trap
Third Harmonic-36dBc
Fourth Harmonic-35dBc
Input VSWR<2:1With external matching network; see appli-
cation schematic
Input Impedance50ΩWith external matching network; see appli-
cation schematic
Two-Tone Specification
Average Two-Tone Power+27.0dBmPEP-3dB
IM
IM
IM
3
5
7
-30-25dBcP
-32-30dBcP
-40dBcP
=+24.0dBm/tone
OUT
=+24.0dBm/tone
OUT
=+24.0dBm/tone
OUT
Two-Tone Current Drain225260350mA
Two-Tone Power-Added Eff.33%
Power Control
Power Down “ON”
PowerD own “OFF”
PD Input Current
V
CC
V
0V
3.75.0mA
Voltage supplied to the input
Voltage supplied to the input
Only in “ON” state
Power Supply
Power Supply Voltage2.7 to 6.5V
Total Idle Current Drain210µ
60mAV
80mAV
80100165mAV
120mAV
DC
VPD<0.1VDC,VCC=6.5V
A
=4.4VDC,VCC=6.5V
PD
=5.0VDC,VCC=6.5V
PD
=5.8VDC,VCC=6.5V
PD
=6.5VDC,VCC=6.5V
PD
=9Ω
=9Ω
=9Ω
=12Ω
=12Ω
=12Ω
LOAD
=9Ω,
2-20
Rev B3 010720
Page 3
RF2105L
PinFunctionDescriptionInterface Schematic
1VCC2
2VCC3
3VCC1
4GND
5PD
6RFIN
7GND
8NC
9NC
Positive supply for the second stage (driver) amplifier. This is an
unmatched transistor collector output. This pin should see an inductive
pathtoACground(V
tance can be achieved with a short, th in microstrip line or with a low
value chip inductor (~2.7nH). At lower frequencies, the inductance
value should be larger (longer microstrip line) and V
bypassed with a larger bypass capacitor (see the application schematic
for 430MHz operation). This inductance forms a matching network with
the inter nal series capacitor between the second and third stages, setting the amplifier’s frequency of maximum gain. An additional 1µF
bypass capacitor in parallel with the UHF bypass capacitor is also recommended, but placement of this component is not as critical. In most
applications, pins 1, 2, and 3 can share a single 1µF bypass capacitor.
Positive supply for the active bias circuits. This pin can be externally
combined with pin 3 (VCC1) and the pair bypassed with a single UHF
capacitor, placed as close as possible to the package.Additional
bypassing of 1µF isalso recommended, but proximity to the package is
not as critical. In most applications, pins 1, 2, and 3 can share a single
1µF bypass capacitor.
Positive supply for the first stage (input) amplifier. This pin can be externally combined with pin 2 (VCC3) and the pair bypassed with a single
UHF capacitor, placed as close as possible to the package. Additional
bypassing of 1µF is also recommended, but proximity to the package is
not as critical. In most applications, pins 1, 2, and 3 can share a single
1µF bypass capacitor.
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.In addition, for specified performance, the package’s backside metal should be soldered to ground
plane.
Powerdown controlvoltage. When thispin isat 0V,the device will bein
power down mode, dissipating minimum DC power. When this pin is at
(3V to 6.5V), the device will be in full power mode delivering maxi-
V
CC
mum available gain and output power capability. This pin may also be
used to perfor m some degree of gain control orpower control when set
to voltages between 0V and V
the transfer function is not linear over a wide range as with other
devices specifically designed for analog gain control; however, it may
be usable for coarse adjustment or in some closed loop AGC systems.
This pin should not, in any circumstance, be higher in voltage thanV
nor should it ever be higher than 6.5V. This pin should also have an
external UHF bypassing capacitor.
Amplifier RF input. This is a 50Ω RF input port to the amplifier. It does
not contain internal DC-blocking and therefore should be externally
DC-blocked before connecting to any device which has DC present or
which contains a DC path to ground. A series UH F capacitor is recommended for the DC-blocking.
Same as pin 4.
Not internally connected.
Not internally connected.
with a UHF bypassing capac itor). This induc-
CC
should be
CC
. It is not optimized for this function so
CC
CC
,
2
POWER AMPLIFIERS
Rev B3 010720
2-21
Page 4
2
RF2105L
PinFunctionDescriptionInterface Schematic
10RF OUT
POWER AMPLIFIERS
11RF OUT
12GND
13RF OUT
14RF OUT
15NC
16NC
Pkg
GND
Base
Amplifier RF output. This is an unmatched collector output of the final
amplifier transistor.It is internally connected to pins 10, 11, 13, and 14
to provide low series inductance and flexibility in output matching. Bias
for the final power amplifier output transistor must also be provided
through two of these four pins. Typically, pins 10 and 11 are connected
to a network that creates a second harmonic trap. For 830MHz operation, this network is simply a single 2.4pF capacitor from both pins to
ground. This capacitor series resonates with internal b ond wires at two
times the operating frequency,effectively shorting out the second harmonic. Shorting out this harmonic serves to increase the amplifier’s
maximum output power and efficiency, as well as to lower the level of
the second harmonic output. Typically, pins 13 and 14 are externally
connected very close to the package and used as the RF output with a
matching network that presents the optimum load impedance to the PA
for maximum power and efficiency, as well as providing DC-blocking at
the output. An additionalnetwork of a bias inductor and parallel resistor
provides DC bias and helps to protect the output from high voltage
swings due to severe load mismatches. Shunt protection diode s are
included to clip peakvoltage excursions above ~15V to prevent voltage
breakdown in worst case conditions.
Same as pin 10.
Same as pin 4.
Same as pin 10.
Same as pin 10.
Not internally connected.
Not internally connected.
This contact is the main ground contact for the entire device.Care
should be taken to ensure that this contact is well soldered in order to
prevent performance from being degraded from that indicated in the
specifications.
2-22
Rev B3 010720
Page 5
RF2105L
Application Schematic for 430MHz Operation
V
CC
220 nH
100 pF
1141516
BIAS
CIRCUIT
6789
180
Ω
13
12
11
10
Ground Back of
Package
4.7 nH
10 pF
33 pF
13 pF
PD
RF IN
1µF
100 pF
10
100 pF
100 pF
100 pF
Ω
15 nH
2
3
4
1nF
5
Application Schematic for 840MHz Operation
V
CC
47 nH
2
RF OUT
POWER AMPLIFIERS
PD
0/5 V
RF IN
1µF
0.01" x 0.20"
(PCB material: FR-4,
Thickness: 0.031")
100 pF
2
3
100 pF
DC
100 pF
100 pF
4
5
100 pF
1141516
BIAS
CIRCUIT
6789
180
Ω
13
12
11
10
Ground Back of
Package
1.8 nH
2.4 pF
6.8 pF
RF OUT
4.7 pF
Rev B3 010720
2-23
Page 6
RF2105L
Application Schematic for 915MHz Operation
V
CC
47 nH
2
1µF
0.01" x 0.15"
(PCB material: FR-4,
Thickness: 0.031")
100 pF
2
3
100 pF
POWER AMPLIFIERS
PD
0/5 V
DC
RF IN
100 pF
4
5
100 pF
100 pF
1141516
BIAS
CIRCUIT
6789
180
Ω
13
12
11
10
Ground Back of
Package
5.6 pF
RF OUT
3.9 pF
1.8 pF
Evaluation Board Schema tic (840MHz)
(Download Bill of Materials from www.rfmd.com.)
L1
P1-12105400 Rev A
C10
1
µ
C9
F
1nF
C8
100 nF
C7
330 pF
C6
100 pF
C11
100 nF
47 nH
R3
180
Ω
RF IN
2-24
P1-3
SMA
J1
0.01"x0.2"
PCB mat'l: FR-4,
Thickness: 0.031"
1141516
2
C5
100 pF
C1
50
Ω µ
strip
100 pF
C4
100 pF
C3
330 pF
BIAS
CIRCUIT
3
4
5
6789
13
12
11
10
L2
1.8 nH
C12
4.7 pF
C13
2.4 pF
C2
6.8 pF
C12 is adjusted for 840 MHz
P1-1
C14
100 nF
P1-3
50
Ω µ
strip
P1
1
2
3
SMA
J2
RF OUT
VCC
GND
PD
Rev B3 010720
Page 7
Evaluation Board Layout
Board Size 3.020” x 2.020”
Board Thickness 0.031”, Board Material FR-4
RF2105L
2
POWER AMPLIFIERS
Rev B3 010720
2-25
Page 8
2
RF2105L
POWER AMPLIFIERS
2-26
Rev B3 010720
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