Datasheet Resetprscript Datasheet

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Text Script for eLearning course “Resets”

Table of contents

Topic Slide Number
Introduction 1

Reset Mechanisms 2
Reset Status bits 3
Power-on Reset 4
Brown-out Reset 5
Knowledge Check #1 6
MCLR Pin 7
Driving MCLR 8
MCLR Effects 9
Watch-dog Timer 10
Knowledge Check #2 11
Closing 12

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Slide 1: Introduction

Microchip Technology welcomes you to the Reset module of the PICmicro x14
microcontroller. This module will give you a basic overview of the PICmicro MCU
Resets and is intended for those new to PICmicro MCU or requiring a refresher
on Resets. It is recommended you have previously taken or are familiar with the
PIC MCU x14 architecture and instruction set modules.

Slide 2: Reset Mechanisms

There are four kinds of reset mechanisms for the PIC MCU x14 architecture. The
first two have to do with resetting the part based on power to the device. They
are Power-On Reset, which occurs on start-up, and Brown -Out Reset, which
holds the part in reset if the Vdd value drops below a safe level.

You can also force a reset by using the MCLR pin and lastly, the internal
Watchdog Timer can cause a reset if it is allowed to time out.

This presentation will discuss each of these reset mechanisms in detail.

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Slide 3: Reset Status Bits

Before we discuss the details of each reset mechanism, we should point out
some status bits that are important for this discussion. Availability of these bits is
product dependent, so please look at the datasheet for the product you are
planning on using.

There are 2 bits in the status register and 2 bits in the Power Control and Status
(PCON) register that can be used to determine what event caused a reset
condition.

In the Status register, we are interested in the Time-out (TO) bit and the Power­down (PD) bit.

The Time-out (TO) bit is set to a 1 after power -up, a CLRWDT instruction or a
Sleep instruction. The TO bit is only cleared to a 0 when a WDT timeout has
occurred.

The Power-down (PD) bit is set high after a power-up or the execution of the
CLRWDT instruction. This bit will be cleared low only by the execution of the
sleep instruction.

In the Power Control (PCON) register, we use the Power-on Reset Status (POR)
bit and the Brown -out Reset (BOR) Status bit. These 2 flag bits in conjunction
with the TO and PD bits in the Status Register can be used to differentiate
between a Power -on Reset (POR), Brown-out Reset (BOR), a Watchdog Timer
Reset (WDT) and an external MCLR Reset.

If the Power-on Reset Status (POR) bit is low, it indicates that a Power-on Reset
has occurred. This bit must be set to 1 in software after the event has occurred.

Likewise, if the Brown -out Reset Status bit is low, it means that a Brown-out
Reset has occurred. This bit must also be reset in software.

This table that shows th e reset status bits can be found in most device
datasheets as well as the PICmicro Mid-Range MCU Reference Manual

(Show the table ‘Status Bits and their significance’)

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Slide 4: Power On Reset (POR)

The first reset mechanism we will discuss is the Power-On Reset circuit, which is
present on all PICmicro® devices. After a device has received a Power-On
Reset, if no other reset condition is active, code will start executing from the reset
vector.

It should be noted that for the POR circuit to work properly, the device must
power up from zero volts, and the VDD rise rate must be fast enough. Consult
the datasheet for specific values on this.

On some devices, the Power -On Reset can start a Power-On Reset timer
(PWRT) which will hold the device in reset for an extra delay period (T
allow more time for the power to reach a safe level. The Power-on Reset Timer
operates from an internal RC oscillator and provides a nominal 72ms delay. For
the devices that support this feature, the PWRT is enabled in the Configuration
Word at programming time.

If a crystal oscillator mode is used, then the oscillator startup timer (Tost) will run
for 1024 clock cycles, holding the part in a reset condition to give the oscillator
time to start up after the Power-On Reset.

It should be noted that the state of all general purpose RAM locations will be
unknown after a Power -On Reset, although some of the special function registers
will be initialized. The datasheet for a specific device will indicate what registers
are initialized and what their reset values are.

PWRT

) to

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Slide 5: Brown-Out Reset (BOR)

Similar to the Power on reset circuit that we just discussed, many PICmicro®
devices also have an optional Brown -Out Reset (BOR) feature, enabled at
programming time, that is used to ensure that the device will not try to run at a
voltage that is too low for correct operation. If the VDD level should drop below
the trip point, the BOR circuit will reset the device and hold it in reset as long as
VDD remains below the BOR trip point.

On some devices, the Brown -Out Reset voltage is fixed but on others it can be
selected from several different voltage options. After the reset, the device will
start executing code from the reset vector address.

The Brown-Out Reset can be enabled in the configuration bits at programming
time, and is not a substitute for a proper Power-On Reset. Once enabled, it is
always active, even during sleep mode. On some devices, the Brown -Out Reset
can be made to start the power -up reset timer, to create a longer reset time for
reliability.

Keep in mind that a Brown -Out Reset should be considered a catastrophic event,
as the state of all general purpose RAM locations will be unknown afterwards. A
Brown-Out Reset will clear the BOR bit and leave the POR bit unchanged. The
TO and PD bits will be set unless the device was in sleep when the Brown -out
Reset occurred.

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Slide 6: Knowledge Check #1
Q: On some devices, the Power-up reset timer (PWRT) can be used with the

BOR circuit to…
A: delay for about 72ms before all registers are set to 0xFF

B: [correct answer] delay for about 72ms after the VDD level rises above
the BOR trip point

C: reset all registers to their previous values
D: send the device into Sleep mode until VDD rises above the BOR trip point.

Slide 7: MCLR Pin

The next reset mechanism we will discuss is the MCLR pin, which is used to
generate a hardware reset on the device. On most PIC® MCUs, the MCLR pin is
always active. However, on some MCUs, the MCLR signal can be configured to
be internally tied to VDD, which allows the pin to be used as a general purpose
input pin.

When the MCLR function of the pin is enabled, it is an active low Schmitt trigger
input. This means that to guarantee a reset, the voltage on the pin must be lower
than the VIL (maximum input low voltage) level specified in the datasheet.

To make sure that the device does not get reset unintentionally during normal
operation, the voltage on the MCLR pin must be kept higher than the VIH
(minimum input high voltage) level specified in the datasheet. The designer must
take care that this specification is met even when noise in the system causes
fluctuations on the MCLR and VDD pins.

It is very important to note that the MCLR pin has no internal pull-up and must
NOT be left floating. It should also be noted that on some devices the MCLR is
used to place the device in programming mode with a VPP voltage on the pin,
which is usually 13V. Because of this, there is no upper protection diode on this
pin, although there is a voltage clamp.

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Slide 8: Driving MCLR

Since the MCLR pin is an input, it must be driven by an external source of some
kind. This can be as simple as connecting MCLR directly to VDD, and in this
case uses the Power -On Reset (POR) to provide a reset when it powers up. An
RC circuit can be used to keep the MCLR voltage low for some time after power­on. This can be useful to provide a longer reset if the power supply does not rise
fast enough. The VDD rise rate required for proper Power-On Reset is specif ied
in the electrical characteristics section of the data sheet.

A supervisory or reset chip is also often used to generate a reset signal on the
MCLR pin and hold the device in reset until VDD is at a valid operating voltage.
These devices, such as Microchip’s MCP1xx or MCP8xx, are available with
different voltage trip points and output driver types. These devices drive their
output low when the supply voltage is below the specified trip point.

Many circuits have a system reset signal that is used for multiple devices in the
system. This type of logic level signal can also be used to provide a signal to
MCLR to reset the microcontroller when the rest of the system is reset.

Slide 9: MCLR effects

When MCLR is brought low, the device will be held in a reset state until MCLR is
brought high. During this time the oscillator will run and the I/O pins will be held in
the reset condition (normally tri-state). If the device was reset from sleep and a
crystal oscillator mode is used, then the oscillator startup timer will keep the
device in the reset condition to give the oscillator time to start up, even if the
MCLR signal is only held low for a short period. When an RC oscillator is used
the oscillator will run during reset but the output on the OSC2 pin will be stopped.

If a MCLR reset occurs during normal operation, none of the 4 status bits are
affected. If a MCLR reset occurs while the device is in sleep mode, the TO bit
will be set high and the PD bit will be cleared low. As with most types of reset, a
MCLR reset will not change the state of any general purpose RAM locations, but
some of the special function registers will be initialized.

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Slide 10: Watchdog Timer

The last reset we will discuss is the Watchdog Timer (WDT), which is present on
all PICmicro MCUs. The Watchdog Timer is an independent free running timer
with its own internal RC oscillator. This means that it does not depend on the
CPU clock to run. The WDT is typically used for one of 2 functions: to force the
processor to reset itself if code execution becomes unstable, or to force the
processor to wake from sleep mode on a periodic basis.

When used in the true ‘watchdog’ manner, the timer is reset within the code
using the clear watchdog timer (CLRWDT) instruction. If for some reason the
operation of the MCU becomes unstable, then the CLRWDT instruction will not
be executed in the proper timeout period and the watchdog timer will count all the
way down to zero. When this timeout point is reached, a reset will be forced and
the MCU will start from a known state again. Careful positioning of the CLRWDT
instructions must be made as too many “clear Watchdog timer” instructions can
potentially allow the device to get stuck in an unintentional loop that still clears
the Watchdog, even though the program is no longer running in a stable mode.
A prescalar can be used to change the time required before the watchdog timer
reaches the timeout state.

As mentioned before, the watchdog timer is also frequently used in applications
where th e MCU is placed in sleep mode and the watchdog timer is used to
‘wake-up’ the MCU on a periodic basis.

If the device is in SLEEP mode when a Watchdog timer time-out occurs, the part
will wake up and continue executing code from the location after the sleep
instruction. It should also be noted here that if a crystal oscillator mode is used,
the oscillator startup timer will give the oscillator time to start up after the wake­up.

Once the MCU is ‘awake’, it can then determine if some event has occurred such
as the state of an I/O pin changing, and then execute the appropriate section of
code. The code then sends the MCU back to SLEEP mode and the cycle is
repeated. Using the WDT in this manner may save a considerable amount of
power because the MCU is in sleep mode for a majority of the time. Again, the
prescaler can be used to change the length of time required for the watchdog
timer to time out.

As with some of the other reset mechanisms, a Watchdog timer reset will not
change the state of any general purpose RAM locations. The TO bit is cleared
and the PD bit is set, while the POR and BOR bits remain unchanged.

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When using the Watchdog timer, there are a few very important points that need
to be considered when you are designing your code. The first point is that when
the watchdog timer is enabled, it can never be deactivated in software. Even
when the MCU is in sleep mode, the watchdog timer continues to run. This may
not be true on all future devices, so it is a good idea to check the datasheet of the
device you are using to verify this point.

The second point is that the Watchdog timer is implemented with a very simple
internal RC oscillator, and the timeout period will vary from device to device and
with voltage and temperature changes. The user should always design with
these variations in mind.

The final point we will make here is that the Watchdog timer circuit draws
additional current when it is enabled, which should be taken into account when
calculating current drain in low power applications

Slide 11: Knowledge Check

The Watchdog timer…
A) Can wake a deve from Sleep mode on a periodic basis
B) Can be reset using the CLRWDT instruction
C) Can force the device to reset if code execution becomes unstable

D) All of the above [correct answer]

Slide 12: Closing

This concludes the basic module on PICmicro Resets. We hope you found this
presentation interesting and worthwhile. If you have comments about this
presentation or any other topic concerning Microchip’s eLearning Program, you
can send your comments by clicking on the “Feedback” link on the left side of this
screen.

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