Datasheet RC5061 Datasheet (Fairchild Semiconductor)

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RC5061

High Performance Programmable Synchronous DC-DC Controller for Multi-Voltage Platforms

Features

• Programmable output for Vcore from 1.3V to 3.5V using an integrated 5-bit DAC

• Controls adjustable linears for Vtt (1.5V), and Vclock (2.5V)

• Meets VRM speciﬁcation with as few as 5 capacitors

• Meets 1.550V +40/-70mV over initial tolerance, temperature and transients

• Remote sense

• Active Droop (Voltage Positioning)

• Drives N-Channel MOSFETs

• Overcurrent protection using MOSFET sensing

• 85% efﬁciency typical at full load

• Integrated Power Good and Enable/Soft Start functions

• 20 pin SOIC package

Block Diagram

+3.3V

+1.5V

+2.5V

VCCP

OSC

REF

PWRGD, OCL

REF

PWRGD, OCL

OCL

+5V

VCCA

Applications

• Power supply for Pentium

• Power supply for Pentium III Whitney Platform

• VRM for Pentium III processor

• Programmable multi-output power supply

III Camino Platform

Description

The RC5061 is a synchronous mode DC-DC controller IC which provides a highly accurate, programmable set of output voltages for multi-voltage platforms such as the Intel Camino, and provides a complete solution for the Intel Whitney and other high-performance processors. The RC5061 features remote voltage sensing, independently adjustable current limit, and Active Droop for optimal con verter transient response. The RC5061 uses a 5-bit D/A converter to program the output voltage from 1.3V to 3.5V. The RC5061 uses a high level of integration to deliver load currents in e xcess of 16A from a 5V

+12V

16 20

VCCP HIDRV

+5V

5-Bit

DAC

87654

VID1

VID2

VID3

VID4

VID0

Pentium is a registered trademark of Intel Corporation.

1.24V

Reference

Digital

GNDA

Control

Power

Good

ENABLE/SS

VCC

LODRV

GNDP

PWRGD

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RC5061 PRODUCT SPECIFICATION

source with minimal external circuitry. Synchronous-mode

Pin Assignments

operation offers optimum efﬁciency over the entire speciﬁed output voltage range. An on-board precision low TC reference achieves tight tolerance voltage regulation without expensive external components, while Active Droop

permits exact tailoring of voltage for the most demanding load transients. The RC5061 includes linear regulator controllers for Vtt termination (1.5V), and Vclock (2.5V), each adjustable with an exter nal divider . The RC5061 also of fers inte grated functions including Power Good, Output Enable/Soft Start and current limiting, and is available in a 20 pin SOIC package.

HIDRV

GNDA

VID4 VID3 VID2

VID1

VID0

VTTGATE

VTTFB

1 2 3 4 5 6 7 8 9 10

RC5061

20 19 18 17 16 15 14 13 12 11

VCCP LODRV GNDP VCCA VFB IFB PWRGD SS/ENABLE VCKFB VCKGATE

Pin Deﬁnitions

Number Pin Name Pin Function Description

1 HIDRV

2SW

3 GNDA

4-8 VID0-4

9 VTTGATE Gate Driver for VTT Transistor. For 1.5V output. 10 VTTFB 11 VCKGATE Gate Driver for VCK Transistor. For 2.5V output. 12 VCKFB 13 ENABLE/SS Output Enable. A logic LOW on this pin will disable all outputs. An internal current source

14 PWRGD

15 IFB

16 VFB

17 VCCA 18 GNDP 19 LODRV

20 VCCP

High Side FET Driver. Connect this pin through a resistor to the gate of an N-channel

MOSFET. The trace from this pin to the MOSFET gate should be <0.5".

High side Driver Source and Low side Driver Drain Switching Node. Together with

IFB pin allows FET sensing for Vcc current.

Analog Ground. Return path for low power analog circuitry. This pin should be

connected to a low impedance system ground plane to minimize ground loops.

Voltage Identification Code Inputs. These open collector/TTL compatible inputs will

program the output voltage over the ranges specified in Table 2. Pull-up resistors are internal to the controller.

Voltage Feedback for VTT.

Voltage Feedback for VCK.

allows for open collector control. This pin also doubles as soft start for all outputs.

Power Good Flag. An open collector output that will be logic LOW if any output voltage

is not within ±12% of the nominal output voltage setpoint.

Vcc Current Feedback. Pin 15 is used in conjunction with pin 2 as the input for the Vcc

current feedback control loop. Layout of these traces is critical to system performance. See Application Information for details.

Vcc Voltage Feedback. Pin 16 is used as the input for the Vcc voltage feedback control

loop. See Application Information for details regarding correct layout.

Analog VCC. Connect to system 5V supply and decouple with a 0.1µF ceramic capacitor. Power Ground. Return pin for high currents flowing in pin 20 (VCCP). Vcc Low Side FET Driver. Connect this pin through a resistor to the gate of an N-channel

MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should be <0.5".

Power VCC. For all FET drivers. Connect to system 12V supply through a 33 Ω , and

decouple with a 1µF ceramic capacitor.

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PRODUCT SPECIFICATION RC5061

Absolute Maximum Ratings

Supply Voltage VCCA to GND 13.5V Supply Voltage VCCP to GND 15V Voltage Identification Code Inputs, VID0-VID4 VCCA All Other Pins 13.5V Junction Temperature, T

150°C Storage Temperature -65 to 150°C Lead Soldering Temperature, 10 seconds 300°C Thermal Resistance Junction-to-ambient, Θ

Note:

1. Component mounted on demo board in free air.

75°C/W

Recommended Operating Conditions

Parameter Conditions Min. Typ. Max. Units

Supply Voltage VCCA 4.5 5 5.25 V Input Logic HIGH 2.0 V Input Logic LOW 0.8 V Ambient Operating Temperature 0 70 °C Output Driver Supply, VCCP 10.8 12 13.2 V

Electrical Speciﬁcations

= 5V, V

CCA

The • denotes speciﬁcations which apply over the full operating temperature range.

Parameter Conditions Min. Typ. Max. Units VCC Regulator

Output Voltage See Table 1 • 1.3 3.5 V Output Current 18 A Initial Voltage Setpoint I

Output Temperature Drift T

Line Regulation V Internal Droop Impedance I Maximum Droop 60 mV Output Ripple 20MHz BW, I Total Output Variation,

Steady State

Total Output Variation,

Transient Short Circuit Detect Current • 45 50 60 µA Efficiency I Output Driver Rise & Fall

Time Output Driver Deadtime See Figure 3 50 nsec

CCP

= 12V, V

= 2.0V, and T

OUT

LOAD

V V

LOAD

= 0 to 70°C, V

= 4.75V to 5.25V • -4 mV/V

OUT OUT

= +25°C using circuit in Figure 1 unless otherwise noted.)

= 0.8A, V

V V

OUT OUT OUT

= 2.400V = 2.000V = 1.550V

= 2.000V

OUT

= 1.550V

OUT

2.397

2.000

1.550

•

2.424

2.020

1.565 +8

= 0.8A to 12.5A 13.0 14.4 15.8 K Ω

= 18A 11 mVpk

LOAD

= 2.000V

= 1.550V

= 0.8A to 18A, V

= 18A, V

= 2.0V 85 %

OUT

OUT OUT

= 2.000V = 1.550V

••1.940

••1.900

1.480

See Figure 3 50 nsec

2.454

2.040

1.580

2.070

1.590

2.100

1.590

V V V

mV mV

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RC5061 PRODUCT SPECIFICATION

Electrical Speciﬁcations

CCA

= 5V, V

CCP

= 12V, V

OUT

(Continued)

= 2.0V, and T

= +25°C using circuit in Figure 1 unless otherwise noted.)

The • denotes speciﬁcations which apply over the full operating temperature range.

Parameter Conditions Min. Typ. Max. Units

Duty Cycle 0 100 % 5V UVLO • 3.74 4 4.26 V 12V UVLO • 7.65 8.5 9.35 V Soft Start Current • 5 10 17 µA

VTT Linear Regulator

Output Voltage I Under Voltage Trip Level Over Current 80 %V

2A • 1.455 1.5 1.545 V

LOAD

VCLK Linear Regulator

Output Voltage I Under Voltage Trip Level Over Current 80 %V

2A • 2.375 2.5 2.625 V

LOAD

Common Functions

Oscillator Frequency • 255 310 345 kHz PWRGD Threshold Logic HIGH, All Outputs

Logic LOW, Any Output

Linear Regulator Under

Over Current 30 µsec

•

108 112

OUT

Voltage Delay Time

Notes:

1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is measured at the converter’s VFB sense point.

2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than

0.5m Ω trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal performance.

3. Using the VFB pin for remote sensing of the converter’s output at the load, the converter will be in compliance with Intel’s VRM 8.4 specification of +50, –80mV. If Intel specifications on maximum plane resistance from the converter’s output capacitors to the CPU are met, the specification of +40, –70mV at the capacitors will also be met.

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PRODUCT SPECIFICATION RC5061

Table 1. Output Voltage Programming Codes

VID4 VID3 VID2 VID1 VID0 Nominal V

01111 1.30V 01110 1.35V 01101 1.40V 01100 1.45V 01011 1.50V 01010 1.55V 01001 1.60V 01000 1.65V 00111 1.70V 00110 1.75V 00101 1.80V 00100 1.85V 00011 1.90V 00010 1.95V 00001 2.00V 00000 2.05V 11111 2.0V 11110 2.1V 11101 2.2V 11100 2.3V 11011 2.4V 11010 2.5V 11001 2.6V 11000 2.7V 10111 2.8V 10110 2.9V 10101 3.0V 10100 3.1V 10011 3.2V 10010 3.3V 10001 3.4V 10000 3.5V

OUT

Note:

1. 0 = processor pin is tied to GND. 1 = processor pin is open.

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RC5061 PRODUCT SPECIFICATION

Typical Operating Characteristics

= 5V, V

CCA

88 86 84 82 80 78 76

Efficiency (%)

74 72 70 68 66 64

0 3 6 9 12 15 18

= 12V, and T

CCP

Efficiency vs. Output Current

CPU

= 1.550V

OUT

Output Current (A)

= +25°C using circuits in Figure 1, unless otherwise noted.)

Droop, V

2.04

= 2.000

OUT

2.03

2.02

2.01

2.00

1.99

(V)

1.98

OUT

1.97

1.96

1.95

1.94 0 3 6 9 12 15 18

= 2.0V, RD = 8K Ω

CPU

Output Current (A)

(V) V

CPU

2.1

1.9

1.7

1.5

1.3

3.5

3.0

2.5

(V)

2.0

OUT

1.5

1.0

0.5 0

0 5 10 15 20 25

Output Programming, VID4 = 0

CPU Output Voltage vs. Output Current

Output Current (A)

3.5

3.0

2.5

(V)

2.0

CPU

1.5

Output Programming, VID4 = 1

1.1

1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00

DAC Setpoint

1.0

2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2. 3.3 3.4 3.5

DAC Setpoint

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PRODUCT SPECIFICATION RC5061

Typical Operating Characteristics

Output Ripple, 2.0V @ 18A

(20mV/div)

CPU

Time (1µs/div)

Transient Response, 0.5A to 12.5A

1.590V

(50mV/div)

CPU

1.550V

1.480V

(continued)

Transient Response, 12.5A to 0.5A

(50mV/div)

CPU

Switching Waveforms, 18A Load

5V/div 5V/div

1.590V

1.550V

1.480V

Time (100µs/div)

HIDRV pin

LODRV pin

(2V/div)

(1V/div) V

CPU

Time (100µs/div)

Output Startup, System Power-up

Time (10ms/div)

Time (1µs/div)

Output Startup from Enable

(1V/div) ENABLE (2V/div)

CPU

Time (10ms/div)

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RC5061 PRODUCT SPECIFICATION

Typical Operating Characteristics

2.042

2.040

2.038

2.036

(V)

2.034

CPU

2.030

2.028

2.026 0 25 70 100

Temperature (°C)

Application Circuit

+5V

(Optional)

CIN*

(continued)

Linear Regulator Noise

(10mV/div)

OUT

AC COUPLED V

Time (100µs/div)

C10

OUT

1.5V†

3.3V IN Q3

VID4 VID3 VID2

VID1 VID0

1 2

3 4

5 6 7 8 9 10

RC5061

20 19 18 17

16 15 14

13 12 11

C11

2.5V†

+12V

VCC

ENABLE/SS

* Refer to Appendix for values

, CIN and R7.

of C

OUT

† Adjustable with an external divider.

R4 PWRGD

Figure 1. Typical Application Circuit

(Worst Case Analyzed! See Appendix for Details )

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PRODUCT SPECIFICATION RC5061

Table 2. RC5061 Application Bill of Materials

(Components based on Worst Case Analysis—See Appendix for Details)

Reference Manufacturer Part # Quantity Description Requirements/Comments

C1 AVX

TAJB475M010R5

C2, C5 Panasonic

ECU-V1C105ZFX

C3-4,C6 Panasonic

ECU-V1H104ZFX

C8-9 Sanyo

6MV1000FA C10-11 Any 2 22µF, 6.3V Capacitor Low ESR C

Sanyo

10MV1200GX C

OUT

Sanyo

6MV1500GX D1 Motorola

MBRD835L L1 Any Optional 2.5µH, 8A Inductor DCR ~ 10mΩ

L2 Any 1 1.3µH, 20A Inductor DCR ~ 2mΩ Q1 Fairchild

FDB6030L Q2 Fairchild

FDB7030BL Q3-4 Fairchild

FDB4030L R1 Any 1 33Ω R2-3 Any 2 4.7Ω R4 Any 1 10KΩ R6 Any 1 10Ω R7 Any 1 * U1 Fairchild

RC5061M

1 4.7µF, 10V Capacitor

2 1µF, 16V Capacitor

3 100nF, 50V Capacitor

2 1000µF, 6.3V Electrolytic

* 1200µF, 10V Electrolytic I

RMS

= 2A

* 1500µF, 6.3V Electrolytic ESR ≤ 44mΩ

1 8A Schottky Diode

See Note 1.

1 N-Channel MOSFET R

DS(ON)

= 20mΩ @

VGS = 4.5V See Note 2.

1 N-Channel MOSFET R

DS(ON)

= 10mΩ @

VGS = 4.5V See Note 2.

2 N-Channel MOSFET

1 DC/DC Controller

Notes:

1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. L1 may be omitted if desired.

2. For 17.4A designs using the TO-220 MOSFETs, heatsinks with thermal resistance Θ using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletins AB-8 and AB-15.

*Refer to Appendix for values.

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< 20°C/W should be used. For designs

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RC5061 PRODUCT SPECIFICATION

+5V

(Optional)

CIN*

R10

VID4 VID3 VID2

VID1 VID0

OUT

C10

1.5V†

3.3V IN Q3

OUT

and CIN.

+12V

ENABLE/SS

VCC

R4 PWRGD

1 2

3 4

5 6 7 8 9

RC5061

20 19 18 17 16 15 14 13 12 11

C11

2.5V†

*Refer to Table 3 for values

of C † Adjustable with an external divider.

Figure 2. Application Circuit for Coppermine/Camino Motherboards

(Typical Design)

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PRODUCT SPECIFICATION RC5061

Table 3. RC5061 Application Bill of Materials for Intel Coppermine/Camino Motherboards

(Typical Design)

Reference Manufacturer Part # Quantity Description Requirements/Comments

C1 AVX

TAJB475M010R5

C2, C5 Panasonic

ECU-V1C105ZFX

C3-4,C6 Panasonic

ECU-V1H104ZFX

C8-9 Sanyo

6MV1000FA C10-11 Any 2 22µF, 6.3V Capacitor Low ESR C

Sanyo

10MV1200GX C

OUT

Sanyo

6MV1500GX D1 Motorola

MBRD835L L1 Any Optional 2.5µH, 5A Inductor DCR ~ 10mΩ

L2 Any 1 1.3µH, 15A Inductor DCR ~ 3mΩ Q1 Fairchild

FDB6030L Q2 Fairchild

FDB7030BL Q3-4 Fairchild

FDB4030L R1 Any 1 33Ω R2-3 Any 2 4.7Ω R4 Any 1 10KΩ R6 Any 1 10Ω R7 Any 1 6.24KΩ R8 N/A 1 30mΩ PCB Trace Resistor U1 Fairchild

RC5061M

1 4.7µF, 10V Capacitor

2 1µF, 16V Capacitor

3 100nF, 50V Capacitor

2 1000µF, 6.3V Electrolytic

3 1200µF, 10V Electrolytic I

RMS

= 2A

12 1500µF, 6.3V Electrolytic ESR ≤ 44mΩ

1 8A Schottky Diode

See Note 1.

1 N-Channel MOSFET R

DS(ON)

= 20mΩ @

VGS = 4.5V See Note 2.

1 N-Channel MOSFET R

DS(ON)

= 10mΩ @

VGS = 4.5V See Note 2.

2 N-Channel MOSFET

1 DC/DC Controller

Notes:

1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. L1 may be omitted if desired.

2. For 12.5A designs using the TO-220 MOSFETs, heatsinks with thermal resistance Θ designs using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletins AB-8 and AB-15.

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< 20°C/W should be used. For

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RC5061 PRODUCT SPECIFICATION

Test Parameters

Figure 3. Ouput Drive Timing Diagram

HIDRV to SW

LODRV

Application Information

The RC5061 Controller

The RC5061 is a programmable synchronous DC-DC controller IC. When designed around the appropriate external components, the RC5061 can be conﬁgured to deliver more than 16A of output current, as appropriate for the Katmai and Coppermine and other processors. The RC5061 functions as a ﬁxed frequency PWM step down regulator.

Main Control Loop

Refer to the RC5061 Block Diagram on page 1. The RC5061 implements “summing mode control”, which is different from both classical voltage-mode and current-mode control. It provides superior performance to either by allowing a large converter bandwidth over a wide range of output loads.

The control loop of the regulator contains two main sections: the analog control block and the digital control block. The analog section consists of signal conditioning ampliﬁers feeding into a comparator which provides the input to the digital control block. The signal conditioning section accepts input from the DROOP (current feedback) and VFB (voltage feedback) pins and sets up two controlling signal paths. The ﬁrst, the voltage control path, ampliﬁes the difference between the VFB signal and the reference voltage from the DAC and presents the output to one of the summing ampliﬁer inputs. The second, current control path, takes the difference between the DR OOP and SW pins when the high-side MOSFET is on, reproducing the voltage across the MOSFET and thus the input current; it presents the resulting signal to another input of the summing ampliﬁer. These two signals are then summed together. This output is then presented to a comparator looking at the oscillator ramp, which provides the main PWM control signal to the digital control block.

The digital control block takes the analog comparator input and the main clock signal from the oscillator to provide the appropriate pulses to the HIDRV and LODRV output pins. These two outputs control the external power MOSFETs.

There is an additional comparator in the analog control section whose function is to set the point at which the RC5061 current limit comparator disables the output drive signals to the external power MOSFETs.

High Current Output Drivers

The RC5061 contains two identical high current output drivers that utilize high speed bipolar transistors in a push-pull conﬁguration. The drivers’ power and ground are separated from the chip’s power and ground for switching noise immunity. The power supply pin, VCCP, is supplied from an external 12V source through a series 33Ω resistor. The resulting voltage is sufﬁcient to provide the gate to source drive to the external MOSFETs required in order to achieve a lo w R

DS,ON

Internal V oltage Reference

The reference included in the RC5061 is a precision band-gap voltage reference. Its internal resistors are precisely trimmed to provide a near zero temperature coefﬁcient (TC). Based on the reference is the output from an integrated 5-bit DA C. The DA C monitors the 5 v oltage identiﬁcation pins, VID0-4. When the VID4 pin is at logic HIGH, the DAC scales the reference voltage from 2.0V to 3.5V in 100mV increments. When VID4 is pulled LOW, the DAC scales the reference from 1.30V to

2.05V in 50mV increments. All VID codes are a vailable, including those below 1.80V.

Power Good (PWRGD)

The RC5061 Power Good function is designed in accordance with the Pentium III DC-DC converter speciﬁcations and provides a continuous voltage monitor on the VFB pin. The circuit compares the VFB signal to the VREF voltage and outputs an active-low interrupt signal to the CPU should the power supply voltage de viate more than ±12% of its nominal setpoint. The Power Good ﬂag provides no other control function to the RC5061.

Output Enable/Soft Start (ENABLE/SS)

The RC5061 will accept an open collector/TTL signal for controlling the output voltage. The low state disables the output voltage. When disabled, the PWRGD output is in the lo w state.

Even if an enable is not required in the circuit, this pin should have attached a capacitor (typically 100nF) to softstart the switching. A lar ger value may occasionally be required if the converter has a very large capacitor at its output.

Over-Voltage Protection

The RC5061 constantly monitors the output voltage for protection against over-voltage conditions. If the v oltage at the VFB pin exceeds the selected program voltage, an over-voltage condition is assumed and the RC5061 disables the output drive signal to the external high-side MOSFET. The DC-DC converter returns to normal operation after the output v oltage returns to normal levels.

Oscillator

The RC5061 oscillator section uses a ﬁxed frequency of operation of 300KHz.

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PRODUCT SPECIFICATION RC5061

Design Considerations and Component Selection

Additional information on design and component selection may be found in Fairchild’s Application Note 57.

MOSFET Selection

This application requires N-channel Logic Level Enhancement Mode Field Effect Transistors. Desired characteristics are as follows:

• Low Static Drain-Source On-Resistance, R

DS,ON

< 20mΩ

(lower is better)

• Low gate drive voltage, VGS = 4.5V rated

• Power package with low Thermal Resistance

• Drain-Source voltage rating > 15V.

The on-resistance (R

is the primary parameter for

DS,ON)

MOSFET selection. The on-resistance determines the power dissipation within the MOSFET and therefore signiﬁcantly affects the efﬁciency of the DC-DC Converter. For details and a spreadsheet on MOSFET selection, refer to Applications Bulletin AB-8.

Inductor Selection

Choosing the value of the inductor is a tradeoff between allowable ripple voltage and required transient response. The system designer can choose any value within the allowed minimum to maximum range in order to either minimize ripple or maximize transient performance. The ﬁrst order equation (close approximation) for minimum inductance is:

– V

)

min

out

where: Vin = Input Power Supply V

= Output Voltage

out

f = DC/DC converter switching frequency ESR = Equivalent series resistance of all output capacitors in parallel V

= Maximum peak to peak output ripple voltage budget.

ripple

The ﬁrst order equation for maximum allowed inductance is:

– V

max

out 2

where: Co = The total output capacitance Ipp = Maximum to minimum load transient current Vtb = The output voltage tolerance budget allocated to load transient Dm = Maximum duty cycle for the DC/DC conv erter (usually 95%).

) Dm V

ESR V

ripple

Some margin should be maintained away from both L L

. Adding margin by increasing L almost always adds

max

min

and

expense since all the variables are predetermined by system performance except for CO, which must be increased to increase L. Adding margin by decreasing L can be done by purchasing capacitors with lower ESR. The RC5061 provides signiﬁcant cost savings for the newer CPU systems that typically run at high supply current.

RC5061 Short Circuit Current Characteristics

The RC5061 protects against output short circuit on the core supply by turning off both the high-side and low-side MOSFETs and resetting softstart. The short circuit limit is set with the R

with I

Detect

the high-side MOSFET’s on resistance. Remember to

DS,on

make the RS large enough to include the effects of initial tolerance and temperature variation on the MOSFET’s R Alternately, use of a sense resistor in series with the source of the MOSFET eliminates this source of inaccuracy in the current limit. The value of RS should be less than 8.3KΩ. If a greater value is necessary, a lower R be used instead.

As an example, Figure 4 shows the typical characteristic of the DC-DC converter circuit with an FDB6030L high-side MOSFET (RDS = 20mΩ maximum at 25°C * 1.25 at 75°C = 25mΩ) and a 8.2KΩ RS.

3.5

3.0

2.5

2.0

(V)

OUT

1.5

1.0

0.5 0

Figure 4. RC5061 Short Circuit Characteristic

The converter e xhibits a normal load re gulation characteristic until the voltage across the MOSFET exceeds the internal short circuit threshold of 50µA * 8.2KΩ = 410mV, which occurs at 410mV/25mΩ = 16.4A. (Note that this current limit level can be as high as 410mV/15mΩ = 27A, if the MOSFET has typical R

At this point, the internal comparator trips and signals the controller to discharge the softstart capacitor . This causes a drastic reduction in the output voltage as the load regulation collapses into the short circuit control mode. With a 40m Ω output short,

resistor, as given by the formula

≈ 50µA, I

CPU Output Voltage vs. Output Current

0 5 10 15 20 25

DS,on

is the desired current limit, and

rather than maximum, and is at 25°C).

Detect

DS, on

MOSFET should

DS,on

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RC5061 PRODUCT SPECIFICATION

the voltage is reduced to 16.4A * 40mΩ = 650mV. The output voltage does not return to its nominal value until the output current is reduced to a value within the safe operating ranges for the DC-DC converter.

If any of the linear regulator outputs are loaded heavily enough that their output voltage drops below 80% of nominal for > 30µsec, all RC5061 outputs, including the switcher, are shut off and remain off until po wer is recycled.

Schottky Diode Selection

The application circuit of Figure 1 shows a Schottky diode, D1, which is used as a free-wheeling diode to assure that the body-diode in Q2 does not conduct when the upper MOSFET is turning off and the lower MOSFET is turning on. It is undesirable for this diode to conduct because its high forward voltage drop and long reverse reco very time degrades efﬁcienc y , and so the Schottky provides a shunt path for the current. Since this time duration is very short, the selection criterion for the diode is that the forward voltage of the Schottky at the output current should be less than the forward voltage of the MOSFET’s body diode.

Output Filter Capacitors

The output bulk capacitors of a converter help determine its output ripple voltage and its transient response. It has already been seen in the section on selecting an inductor that the ESR helps set the minimum inductance, and the capacitance value helps set the maximum inductance. For most converters, however, the number of capacitors required is determined by the transient response and the output ripple voltage, and these are determined by the ESR and not the capacitance value. That is, in order to achieve the necessary ESR to meet the transient and ripple requirements, the capacitance value required is already very large.

The most commonly used choice for output bulk capacitors is aluminum electrolytics, because of their low cost and low ESR. The only type of aluminum capacitor used should be those that have an ESR rated at 100kHz. Consult Application Bulletin AB-14 for detailed information on output capacitor selection.

The output capacitance should also include a number of small value ceramic capacitors placed as close as possible to the processor; 0.1µF and 0.01µF are recommended values.

Input Filter

The DC-DC converter design may include an input inductor between the system +5V supply and the converter input as shown in Figure 5. This inductor serves to isolate the +5V supply from the noise in the switching portion of the DC-DC converter, and to limit the inrush current into the input capacitors during power up. A value of 2.5µH is recommended.

It is necessary to have some low ESR aluminum electrolytic capacitors at the input to the converter. These capacitors deliver current when the high side MOSFET switches on. Figure 5 shows 3 x 1000µF, but the exact number required will vary with the speed and type of the processor. For the top speed Katmai and Coppermine, the capacitors should be rated to take 9A and 6A of ripple current respectively. Capacitor ripple current rating is a function of temperature, and so the manufacturer should be contacted to ﬁnd out the ripple current rating at the expected operational temperature. For details on the design of an input ﬁlter, refer to Applications Bulletin AB-15.

2.5µH

0.1µF

Figure 5. Input Filter

Vin

1000µF, 10V Electrolytic

Active Droop

The RC5061 includes active droop; as the ouptut current increases, the output voltage drops. This is done in order to allow maximum headroom for transient response of the converter . The current is sensed by measuring the v oltage across the high-side MOSFET during its on time. Note that this makes the droop dependent on the temperature of the MOSFET . However, when the formula given for selecting RS (current limit) is used, there is a maximum droop possible (-40mV), and when this value is reached, additional drop across the MOSFET will not cause any increase in droop—until current limit is reached.

Additional droop can be added to the active droop using a discrete resistor (typically a PCB trace) outside the control loop, as shown in Figure 2. This is typically only required for the most demanding applications, such as for the next generation Intel processor (tolerance = +40/-70mV), as shown in Figure 2.

Remote Sense

The RC5061 offers remote sense of the output voltage to minimize the output capacitor requirements of the converter. It is highly recommended that the remote sense pin, Pin 16, be tied directly to the processor power pins, so that the effects of power plane impedance are eliminated. Further details on use of the remote sense feature of the RC5061 may be found in Applications Bulletin AB-24.

14 REV. 1.0.0 7/6/00

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PRODUCT SPECIFICATION RC5061

Adjusting the Linear Regulators’ Output Voltages

Any or all of the linear regulators’ outputs may be adjusted high to compensate for voltage drop along traces, as shown in Figure 6.

VGATE

VOUT

VFB

10KΩ

Figure 6. Adjusting the Output Voltage of the Linear

The resistor value should be chosen as

R 10KΩ* –1

For example, to get the VTT voltage to be 1.55V instead of

1.50V, use R = 10KΩ * [(1.55/1.50) – 1] = 333Ω.

Regulator

out

nom

• Each VCC and GND pin should have its own via to the appropriate plane. This helps provide isolation between pins.

• Place the MOSFETs, inductor, and Schottky as close together as possible for the same reasons as in the first bullet above. Place the input bulk capacitors as close to the drains of the high side MOSFETs as possible. In addition, placement of a 0.1µF decoupling cap right on the drain of each high side MOSFET helps to suppress some of the high frequency switching noise on the input of the DC-DC converter.

• Place the output bulk capacitors as close to the CPU as possible to optimize their ability to supply instantaneous current to the load in the event of a current transient. Additional space between the output capacitors and the CPU will allow the parasitic resistance of the board traces to degrade the DC-DC converter’s performance under severe load transient conditions, causing higher voltage deviation. For more detailed information regarding capacitor placement, refer to Application Bulletin AB-5.

• A PC Board Layout Checklist is available from Fairchild Applications. Ask for Application Bulletin AB-11.

Additional Information

For additional information contact Fairchild Semiconductor at http://www.f airchildsemi.com/cf/tsg.htm or contact an authorized representative in your area.

PCB Layout Guidelines

• Placement of the MOSFETs relative to the RC5061 is critical. Place the MOSFETs such that the trace length of the HIDRV and LODRV pins of the RC5061 to the FET gates is minimized. A long lead length on these pins will cause high amounts of ringing due to the inductance of the trace and the gate capacitance of the FET. This noise radiates throughout the board, and, because it is switching at such a high voltage and frequency, it is very difficult to suppress.

• In general, all of the noisy switching lines should be kept away from the quiet analog section of the RC5061. That is, traces that connect to pins 1, 2, 19, and 20 (HIDRV, SW, LODRV and VCCP) should be kept far away from the traces that connect to pins 3, 16 and 17.

• Place the 0.1µF decoupling capacitors as close to the RC5061 pins as possible. Extra lead length on these reduces their ability to suppress noise.

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RC5061 PRODUCT SPECIFICATION

Appendix

Worst-Case Formulae for the Calculation of Cout, R7, and Cin (Circuit of Figure 1 only)

The following formulae design the RC5061 for worst-case operation, including initial tolerance and temperature dependence of all of the IC parameters (initial setpoint, reference tolerance and tempco, active droop tolerance, current sensor gain), the initial tolerance and temperature dependence of the MOSFET, and the ESR of the capacitors. The following information must be provided:

, the value of the positive transient voltage limit;

T+

|VT-|, the absolute value of the negative transient voltage limit;

IO, the maximum output current;

, the nominal output voltage;

nom

Vin, the input voltage (typically 5V); ESR, the ESR of the ouput caps, per cap (44mΩ for the

Sanyo parts shown in this datsheet);

RD, the on-resistance of the MOSFET (10mΩ for the FDB7030);

∆RD, the tolerance of the current sensor (usually about 67% for MOSFET sensing, including temperature).

, the rms current rating of the input caps (2A for the

rms

sanyo parts shown in this datasheet.)

nom

*IO

R7 =

IO* RD * (1 + ∆RD) * 1.10

50 * 10

nom

–

rms

The value of R7 must be ≤ 8.3KΩ. If a greater value is calculated, R

Number of capacitors needed fo C

must be reduced.

= the greater of:

out

ESR * I

T-

ESR * I

nom

14400 * I

18 * R5 * 1.1

* R

VT+ –0.004 * V

Example: Suppose that the transient limits are ±134mV, current I is 14.2A, and the nominal voltage is 2.000V, using MOSFET current sensing and the usual caps. We have V |VT-| = 0.134, IO = 14.2, V

= 2.000, and ∆RD = 0.67. We

nom

T+

calculate:

2.000

*14.2

14.2 * 0.010 * (1 + 0.67) * 1.0

X==

0.134 – 0.004 * 2.000

0.044 * 14.2

2.000

–

0.044 * 14.2

-6

50 * 10

0.134

14400 * 14.2 * 0.020

18 * 10400 * 1.1

3.47 ⇒ 4 caps

5.2KΩ

4.66

4.28

Since X > Y, we choose X, and round up to ﬁnd we need 5 capacitors for C

OUT

16 REV. 1.0.0 7/6/00

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PRODUCT SPECIFICATION RC5061

Mechanical Dimension

20-Lead SOIC

Symbol

A .093 .104 2.35 2.65 A1 .004 .012 0.10 0.30 B .013 0.33 C .009 .013 0.23 0.32 D .496 .512 12.60 13.00 E .291 .299 7.40 7.60 e H h L .016 .050 0.40 1.27 N20 20

ccc .004 0.10——

Inches

Min. Max. Min. Max.

.020 0.51

.050 BSC 1.27 BSC .394 .419 10.00 10.65 .010 .029 0.25 0.75

0° 8° 0° 8°

Millimeters

Notes

5 2 2

3 6

Notes:

Dimensioning and tolerancing per ANSI Y14.5M-1982.

"D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm).

"L" is the length of terminal for soldering to a substrate.

Terminal numbers are shown for reference only.

"C" dimension does not include solder finish thickness.

Symbol "N" is the maximum number of terminals.

SEATING PLANE

– C –

LEAD COPLANARITY

ccc C

h x 45°

REV. 1.0.0 7/6/00 17

Page 18

RC5061 PRODUCT SPECIFICATION

Ordering Information

Product Number Package

RC5061M 20 pin SOIC

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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

provided in the labeling, can be reasonably expected to result in significant injury to the user.

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