HV7022-C
34-Channel Symmetric Row Driver
Ordering Information
Package Options
Device 44 J-Lead Quad 44 J-Lead Quad Die in 44 J-Lead Quad
Ceramic Chip Carrier Plastic Chip Carrier waffle pack Ceramic Chip Carrier
(MIL-Std-883 Processed*)
HV7022-C HV7022DJ-C HV7022PJ-C HV7022X-C RBHV7022DJ-C
*For Hi-Rel process flows, refer to page 5-3 of the databook.
Features
❏ Processed with HVCMOS® technology
❏ Symmetric row drive (reduces latent imaging
in ACTFEL displays)
❏ Output voltages up to 230V
❏ Low-power level shifting
❏ Source/Sink current 70mA (min.)
❏ Shift register speed 4MHz
❏ Pin-programmable shift direction
❏ 44-lead plastic & ceramic surface-mount packages
❏ Hi-Rel processing available
Absolute Maximum Ratings
Supply voltage, V
Supply voltage, V
Logic input levels
Ground current
Continuous total power dissipation
Operating temperature range Plastic -40°C to +85°C
Storage temperature range -65°C to +150°C
Lead temperature 1.6mm (1/16 inch) 260°C
from case for 10 seconds
1
DD
1
PP
1
2
3
: Plastic 1200mW
-0.3V to +15V
-0.3V to +250V
-0.3V to VDD +0.3V
1.5A
Ceramic 1500mW
Ceramic -55°C to 125°C
General Description
The HV7022-C is a low-voltage serial to high-voltage parallel
converter with push-pull outputs. It is especially suited for use as
a symmetric row driver in AC thin-film electroluminescent (ACTFEL)
displays. The HV70 offers 34 output lines, a direction (DIR) pin to
give CW or CCW shift register loading, output enable (OE), and
polarity (POL) control. After DATA INPUT is entered (on the falling
edge of CLOCK), a logic high will cause the output to swing to V
if POL is high, or to GND if POL is low.
PP
Notes:
1. All voltages are referenced to GND.
2. Duty cycle is limited by the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to maximum operating
temperature at 25mW/°C for plastic and at 15mW/°C for ceramic.
For Detailed circuit and application information, please refer
to Application Note AN-H3.
02/96/022
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1
Electrical Characteristics
(over recommended operating conditions of V
DC Characteristics
Symbol Parameter Min Max Units Conditions
I
DD
I
PP
I
DDQ
V
OH
V
OL
I
IH
I
IL
Notes:
1. The total number of ON outputs times the duty cycle must not exceed the allowable package power disspation.
2. Over military temperature range (-55°C to 125°C).
VDD supply current 10 mA f
High voltage supply current 4 mA 1 Output high
Quiescent VDD supply current 100 µA All VIN = GND or V
High-level output HV
Low-level output HV
High-level logic input current 1 µAV
Low-level logic input current -1 µAV
= 12V, TA = 25°C and V
DD
= 230V unless otherwise noted)
PP
CLK
100 µA All Outputs low or High-Z
750 µA All Outputs low or High-Z
(125°C)
OUT
195 V IO= -70mA (-50mA)
Data out 11 V IO= -500µA
OUT
30 V IO= 70mA (+50mA)
Data out 1 V IO= 500µA
IH
IL
HV7022-C
= 4MHz
1
DD
2
2
= 12V
= 0V
AC Characteristics (V
= 12V, TC = 25°C)
DD
Symbol Parameter Min Max Units Conditions
f
CLK
t
W
t
SUD
t
HD
t
SUC
t
SUE
t
SUP
t
HC
t
HE
t
HP
t
DHL
t
DLH
tTHL
t
TLH
t
ONH
Clock frequency 4 MHz
Pulse duration clock high or low 125 ns
Data set-up time before falling clock 100 ns
Data hold time after falling clock 100 ns
Setup time clock low before VPP↑ or GND↓ 300 ns
Setup time enable high before VPP↑ or GND↓ 300 ns
Setup time polarity high or low before VPP↑ or GND↓ 300 ns
Hold time clock high after VPP↑ or GND↓ 500 ns
Hold time enable high after VPP↑ or GND↓ 300 ns
Hold time polarity high or low after VPP↑ or GND↓ 300 ns
Delay time high to low level output from clock 150 ns CL = 10pF
Delay time low to high level output from clock 200 ns CL = 10pF
Transition time high to low level serial output 200 ns CL = 15pF
Transition time low to high level serial output 100 ns CL = 15pF
High level turn-on time Q outputs from enable 500 ns IO = -50 mA,VOH =195V
RL = 2 kΩ to 95V
t
ONL
t
OFFH
t
OFFL
Low level turn-on time Q outputs from enable 500 ns IO = 50 mA,VOH =130V
= 2 kΩ to 30V
R
L
High level turn-off time Q outputs from enable 1000 ns IO = -50 mA,VOH =195V
= 2 kΩ to 95V
R
L
Low level turn-off time Q outputs from enable 500 ns IO = 50 mA,VOH =130V
RL = 2 kΩ to 30V
Slew rate, V
or GND 45 V/µs With one active output
PP
driving a 4.7 nF load to
V
PP
or GND
2
Recommended Operating Conditions
Symbol Parameter Min Max Units
V
DD
V
PP
V
IH
V
IL
f
CLK
T
A
I
OD
Note:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
5. The V
Power-down sequence should be the reverse of the above.
.
DD
.
PP
should not drop below VDD or float during operation.
PP
Logic supply voltage 10.8 13.2 V
High voltage supply 230 V
High-level input voltage VDD = 10.8V 8.1 V
= 13.2V 9.9
V
DD
Low-level input voltage VDD = 10.8V 2.7 V
= 13.2V 3.3
V
DD
Clock frequency 4 MHz
Operating free-air temperature Plastic -40 +85 °C
Ceramic -55 +125 °C
Allowable pulse current through output diodes ±300 mA
HV7022-C
Input and Output Equivalent Circuits
V
DD
Input
GND
Logic Inputs
V
GND
DD
Logic Data Output
Data Out
V
PP
GND
High Voltage Outputs
HV
OUT
3
Switching Waveforms
Clock
50% 50% 50%
HV7022-C
l/f
t
WL
CLK
t
WH
V
IH
Data Input
Data Output
(D
IOA/DIOB
V
PP
GND
POL
GND
V
PP
t
SUD
t
HD
V
IH
50% 50%
V
t
DLH
90%
)
10%
t
TLH
t
DHL
t
THL
90%
10%
IL
V
OH
V
OL
10%
t
t
SUC
HC
90%
V
IH
50% 50%
V
IL
90%
t
t
SUP
10%
HP
V
IH
HV
HV
OE
t
t
SUE
OUT
High Impedance High Impedance
OUT
t
ONH
t
ONL
90%
10%
HE
50%50%
t
t
10%
OFFH
90%
OFFL
4
V
IL
V
OH
V
OL
Functional Block Diagram
V
PP
OE
Polarity
V
DD
Data In
CLK
S/R
DIR
LT
LT
HV7022-C
P
HV
1
OUT
N
HV
2
OUT
LT
HV
34
OUT
Data Out
GND
LT = Level Translator
Function Table
Inputs Outputs
I/O
Relations Shift Reg HV Outputs Data Out
O/P HIGH X X H H H * H
O/P OFF X X L H H * HIGH-Z *
O/P LOW X X H L H * L *
O/P OFF X X L L H * HIGH-Z *
O/P OFF X X X X L * All O/P HIGH-Z *
Load S/R,
set DIR
Notes:
H = logic high level, L = logic low level, X = irrelevant, ↓ = high-to-low transition,
= HV
Q
* = dependent on previous state and whether an O/P or S/R command occured.
1, Qn = HV
1
OUT
OUT
CLK DIR Data POL OE
↓ LXX XQ
↓ HXX XQ
n →Qn+1
n →Qn-1
*Q
*Q
No ↓ XXXX *No Change No Change
(n), etc.
34
1
5
HV7022-C
HV
Characteristics
OUT
180
140
100
(mA)
I
60
20
020406080
V
DD
Volts
= 12
180
140
V
= 14
DD
= 10
V
DD
100
100
(mA)
I
60
20
0 10020 40 60 80
Volts (VPP - V
Output N-Channel Characteristics through FET Output P-Channel Characteristics through FET
Pin Configurations Package Outline
Temp = 25 C°Temp = 25 C°
VPP > 40V
V
= 12V & 14 V
DD
OUT
)
HV70
44 Pin J-Lead Package
Pin Function Pin Function
1HV
2HV
3HV
4HV
5HV
6HV
7HV
8HV
9HV
10 HV
11 HV
12 HV
13 HV
14 HV
15 HV
16 HV
17 HV
18 HV
19 Data Out 41 HV
20 Output Enable 42 HV
21 Clock 43 HV
22 GND 44 HV
18/17 23 DIR
OUT
17/18 24 V
OUT
16/19 25 Polarity
OUT
15/20 26 Data In
OUT
14/21 27 V
OUT
13/22 28 N/C
OUT
12/23 29 HV
OUT
11/24 30 HV
OUT
10/25 31 HV
OUT
9/26 32 HV
OUT
8/27 33 HV
OUT
7/28 34 HV
OUT
6/29 35 HV
OUT
5/30 36 HV
OUT
4/31 37 HV
OUT
3/32 38 HV
OUT
2/33 39 HV
OUT
1/34 40 HV
OUT
DD
PP
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
34/1
33/2
32/3
31/4
30/5
29/6
28/7
27/8
26/9
25/10
24/11
23/12
22/13
21/14
20/15
19/16
39 38 37 36 35 34
40
41
42
43
44
1
2
3
4
5
6
7 8 9 10 11 12
44-pin J-Lead Package
33 32 31 30 29
28
27
26
25
24
23
22
21
20
19
18
13 14 15 16 17
top view
Note:
Pin designation for DIR L/H
Example:For DIR = L, pin 1 is HV
For DIR = H, pin 1 is HV
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
OUT
OUT
18
17
02/06//02
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
6
www.supertex.com
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