Page 1
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4-Channel Audio Processor IC PT2313
Description
PT2313 is an four-channel digital audio processor utilizing CMOS Technology. Volume,
Right/Left Bass and Treble Balance, Front/Rear Fader Processor are incorporated into a single
chip. Loudness Function and Selectable Input Gain are also provided to build a highly effective
electronic audio processor having the highest performance and reliability with the least external
components. All functions are programmable using the Serial Bus. The pin assignments and
application circuit are optimized for easy PCB layout and cost saving advantage for audio
application. PT2313 is housed in a 28-pin DIP/SO Package and is functionally compatible with
TDA7313.
Features
r CMOS Technology
r Least External Components
r Treble and Bass Control
r Loudness Function
r 3 Stereo Inputs with Selectable Input Gain
r Input/Output for External Noise Reduction System/Equalizer
r 4 Independent Speaker Controls for Fader and Balance
r Independent Mute Function
r Volume Control in 1.25 dB/step
r Low Distortion
r Low Noise and DC Stepping
r Controlled by Serial Bus Micro-Processor Interface
Applications
r Car Stereo (Audio)
r Hi-Fi Audio System
PT2313 v 1 Page 1 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Block Diagram
Pin Configuration
PT2313 v 1 Page 2 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Pin Description
Pin Name I/O Description Pin No.
REF - Analog Reference Voltage (1/2 VDD) 1
VDD - Supply Input Voltage 2
AGND - Analog Ground 3
TREB_L I Left Channel Input for Treble Controller 4
TREB_R I Right Channel Input for Treble Controller 5
RIN I Audio Processor Right Channel Input 6
ROUT O
LOUD_R I Right Channel Loudness Input 8
Gain Output and Input Selector for Right
Channel
7
RIN3 I Right Channel Input 3 9
RIN2 I Right Channel Input 2 10
RIN1 I Right Channel Input 1 11
LOUD_L I Left Channel Loudness Input 12
LIN3 I Left Channel Input 3 13
LIN2 I Left Channel Input 2 14
LIN1 I Left Channel Input 1 15
LIN I Audio Processor Left Channel Input 16
LOUT O
BIN_L I Left Bass Controller Input Channel 18
BOUT_L O Left Bass Controller Output Channel 19
BIN_R I Right Channel Input for Bass Controller 20
BOUT_R O Right Channel Output for Bass Controller 21
RROUT O Right Rear Speaker Output 22
LROUT O Left Rear Speaker Output 23
Gain Output and Input Selector for Left
Channel
17
RFOUT O Right Front Speaker Output 24
LFOUT O Left Front Speaker Output 25
DGND - Digital Ground 26
DATA I Control Data Input 27
CLK I Clock Input for Serial Data Transmission 28
PT2313 v 1 Page 3 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Functional Description
Bus Interface
Data are transmitted to and from the microprocessor to the PT2313 via the DATA and
CLK. The DATA and CLK make up the BUS Interface. It should be noted that the pullup resistors must be connected to the positive supply voltage.
Data Validity
A data on the DATA Line is considered valid and stable only when the CLK Signal is in
HIGH State. The HIGH and LOW State of the DATA Line can only change when the
CLK signal is LOW. Please refer to the figure below.
Start and Stop Conditions
A Start Condition is activated when 1) the CLK is set to HIGH and 2) DATA shifts
from HIGH to LOW State. The Stop Condition is activated when 1) CLK is set to
HIGH and 2) DATA shifts from LOW to HIGH State. Please refer to the timing diagram
below.
PT2313 v 1 Page 4 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Byte Format
Every byte transmitted to the DATA Line consist of 8 bits. Each byte must be followed
by an Acknowledge Bit. The MSB is transmitted first.
Acknowledge
During the Acknowledge Clock Pulse, the master (µP) puts a resistive HIGH level on the
DATA Line. The peripheral (audio processor) that acknowledges has to pull-down
(LOW) the DATA line during the Acknowledge Clock Pulse so that the DATA Line is in
a Stable Low State during this Clock Pulse. Please refer to the diagram below.
The audio processor that has been addressed has to generate an acknowledge after
receiving each byte, otherwise, the DATA Line will remain at the High Level during the
ninth (9th) Clock Pulse. In this case, the master transmitter can generate the STOP
Information in order to abort the transfer.
Transmission without Acknowledge
If you want to avoid the acknowledge detection of the audio processor, a simpler µP
transmission may be used. Wait one clock and do not check the slave acknowledge of
this same clock then send the new data. If you use this approach, there are greater
chances of faulty operation as well as decrease in noise immunity.
Interface Protocol
The interface protocol consists of the following:
• A Start Condition
• A Chip Address Byte including the PT2313 address. The 8th Bit of the Byte must be
“0”. PT2313 must always acknowledge the end of each transmitted byte.
PT2313 v 1 Page 5 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
• A Data Sequence (N-Bytes + Acknowledge)
• A Stop Condition
Please refer to the diagram below:
Software Specification
PT2313 Address
PT2313 Address is shown below.
1
MSB
Data Bytes
0 0 0 1 0 0 0
MSB LSB FUNCTION
0 0 B2 B1 B0 A2 A1 A0 Volume Control
1 1 0 B1 B0 A2 A1 A0 Speaker ATT LR
1 1 1 B1 B0 A2 A1 A0 Speaker ATT RR
1 0 0 B1 B0 A2 A1 A0 Speaker ATT LF
1 0 1 B1 B0 A2 A1 A0 Speaker ATT RF
0 1 0 G1 G0 S2 S1 S0 Audio Switch
0 1 1 0 C3 C2 C1 C0 Bass Control
0 1 1 1 C3 C2 C1 C0 Treble Control
LSB
where Ax = 1.25 dB steps; Bx = 10 dB steps; Cx = 2 dB steps; Gx = 3.75 dB/steps
PT2313 v 1 Page 6 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Volume
The table below gives a detailed description of the Volume Data Bytes. For example, a
volume of -37.5 dB is given by 0 0 0 1 1 1 1 0.
MSB LSB FUNCTION
0 0 B2 B1 B0 A2 A1 A0 Volume 1.25 dB steps
0 0 0 0
0 0 1 -1.25
0 1 0 -2.5
0 1 1 -3.75
1 0 0 -5
1 0 1 -6.25
1 1 0 -7.5
1 1 1 -8.75
0 0 B2 B1 B0 A2 A1 A0 Volume 10dB steps
0 0 0 0
0 0 1 -10
0 1 0 -20
0 1 1 -30
1 0 0 -40
1 0 1 -50
1 1 0 -60
1 1 1 -70
Speaker Attenuators
The table below gives a detailed description of the speaker attenuators data bytes. For
example, an attenuation of 30dB on the Speaker lF (Right Front) is given by: 1 0 0 1 1 0
0 0.
MSB LSB FUNCTION
1 0 0 B1 B0 A2 A1 A0 Speaker LF
1 0 1 B1 B0 A2 A1 A0 Speaker RF
1 1 0 B1 B0 A2 A1 A0 Speaker LR
1 1 1 B1 B0 A2 A1 A0 Speaker RR
0 0 0 0
0 0 1 -1.25
0 1 0 -2.5
0 1 1 -3.75
PT2313 v 1 Page 7 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
1 0 0 -5
1 0 1 -6.25
1 1 0 -7.5
1 1 1 -8.75
0 0 0
0 1 -10
1 0 -20
1 1 -30
1 1 1 1 1 Mute
Audio Switch Data Byte
The following table shows the detailed description of the Audio Switch Data Bytes. For
example, a Stereo 1 Input with Gain of +11.25 dB Loudness ON is given by: 0 1 0 0 0 0
0 0.
MSB LSB FUNCTION
0 1 0 G1 G0 S2 S1 S0 Audio Switch
0 0 Stereo 1
0 1 Stereo 2
1 0 Stereo 3
1 1 Stereo 4 *
0 Loudness ON
1 Loudness OFF
0 0 +11.25dB
0 1 +7.5dB
1 0 3.75dB
1 1 0dB
Note: * = Stereo 4 is internally connected.
Bass and Treble Data Bytes
The following table shows a detailed description of the Bass and Treble Data Byte. For
example a Treble at -12dB is given by : 0 1 1 1 0 0 0 1.
PT2313 v 1 Page 8 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
MSB LSB Function
0 1 1 0 C3 C2 C1 C0 Bass
0 1 1 1 C3 C2 C1 C0 Treble
0 0 0 0 -14
0 0 0 1 -12
0 0 1 0 -10
0 0 1 1 -8
0 1 0 0 -6
0 1 0 1 -4
0 1 1 0 -2
0 1 1 1 0
1 1 1 1 0
1 1 1 0 2
1 1 0 1 4
1 1 0 0 6
1 0 1 1 8
1 0 1 0 10
1 0 0 1 12
1 0 0 0 14
Unit: dB
Thermal Data
Symbol Description SO28 DIP28 Unit
Rth j-pins Thermal
Resistance
Junction-Pins
Max.
85 65
o
C/W
Absolute Maximum Ratings
Symbol Parameter Rating Unit
Vs Operating Supply
Voltage
Tamb Operating Ambient
Temperature
Tstg Storage
Temperature Range
PT2313 v 1 Page 9 Written Feb. 1997
10.2 V
-40 to 85
-55 to +150
o
C
o
C
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4-Channel Audio Processor IC PT2313
Quick Reference Data
Symbol Parameter Min. Typ. Max. Unit
Vs Supply Voltage 6 9 10 V
V
CL
THD Total harmonic Distortion V = 1Vrms,
S/N Signal to Noise ratio 106 dB
Sc Channel Separation f = 1KHz 103 dB
Max. Input Signal Handling 2 Vrms
0.01 0.1 %
f = 1KHz
Volume Control 1.25dB step -78.75 0 dB
Bass & Treble Control 2dB step -14 +14 dB
Fader & Balance Control 1.25dB step -38.75 0 dB
Input Gain 3.75 dB step 0 11.25 dB
Mute Attenuation 100 dB
Electrical Characteristics
(Unless specified: Tamb = 25oC, Vc=9V, RL=10KΩ, Rg = 600Ω, all controls flat (G=0),
f=1KHz)
Symbol Parameter Test Condition Min. Typ. Max. Unit
Supply
Vcc Supply Voltage 6 9 10 V
Is Supply Current 8 11 mA
SVRR Ripple
Rejection
Input
Selectors
G
G
V
S
G
V
R
II
CL
IN
R
L
INmin
INmax
STEP
E
in
DC
Input Resistance Input 1,2,3 35 50 70 KOhms
Clipping Level 2 2.5 Vrms
Input Separation
(2)
Output Load
Resistance
Min. Input Gain -1 0 1 dB
Max. Input Gain 11.25 dB
Step Resolution 3.75 dB
Input Noise G=11.25dB 2 uV
DC Steps Adjacent Gain Steps 4 20 mV
Pin 7, 17 2 KOhms
G=18.75 dB to Mute 4 mV
60 80 dB
80 100 dB
PT2313 v 1 Page 10 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Volume
Control
R
IV
C
RANGE
A
VMIN
A
VMAX
A
STEP
E
A
E
T
V
DC
Speaker
Attenuators
C
RANGE
S
STEP
E
A
A
MUTE
V
DC
Bass Control
(1)
Gb Control Range Max. Boost/Cut + 12 + 14 + 16 dB
B
STEP
R
B
Treble
Control (1)
Gt Control Range Max. Boost/Cut + 13 + 14 + 15 dB
T
STEP
Audio
Outputs
V
OCL
R
L
C
L
R
OUT
V
OUT
Input Resistance 20 33 50 KOhms
Control Range 70 75 80 dB
Min.
-1 0 1 dB
Attenuation
Max.
70 75 80 dB
Attenuation
Step Resolution 0.5 1.25 1.75 dB
Attenuation Set
Error
AV=0 to -20dB
AV=-20 to –60dB
-1.25
-3
0 1.25
2
Tracking Error 2 dB
DC Steps Adjacent Attenuation Steps
From 0dB to AV max
0
0.5
3
7.5
Control Range 35 37.5 40 dB
Step Resolution 0.5 1.25 1.75 dB
Attenuation Set
1.5 dB
Error
Output Mute
80 100 dB
Attenuation
DC Steps Adjacent Att. Steps
From 0 to Mute
0
1
3
10
Step Resolution 1 2 3 dB
Internal
34 44 58 KOhms
Feedback
Resistance
Step Resolution 1 2 3 dB
Clipping Level d=0.3% 2 2.5 Vrms
Output Load
2 KOhms
Resistance
Output Load
10 nF
Capacitance
Output
30 75 120 Ohms
Resistance
DC Voltage
4.2 4.5 4.8 V
Level
dB
dB
mV
mV
mV
mV
PT2313 v 1 Page 11 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
General
e
NO
S/N Signal to Noise
d Distortion AV=0, VIN=1Vrms
Sc Channel
Bus Inputs
V
IL
VIH Input High
I
IN
Vo Output Voltage
Output Noise BW==20-20KHz, flat
Output Muted
All gains=0dB
A Curve All Gains=0dB 3 uV
All Gains=0dB
Ratio
Separation
Left/Right
Total Tracking
Error
Input Low
Voltage
Voltage
Input Current -5 +5 uA
SDA
Acknowledge
Vo=1Vrms
AV=-20dB, VIN=1Vrms
VIN=0.3Vrms
80 103 dB
AV=0 to -20dB
-20 to -60dB
3 V
Io=1.6mA 0.4 V
2.5
5 15
106 dB
0.01
0.09
0.04
0
0
0.1
0.3
1
2
1 V
uV
uV
%
%
%
dB
dB
Note: (1) For the Bass and Treble response please, refer to the diagram below. The
center frequency and quality of the resonance behavior can be selected by the external
circuitry. A standard first order bass response can realized by a standard feedback
network.
(2) The selected input is grounded thru the 2.2uF capacitor.
(dB)
AV=0
10
5
0
5
10
15
10 30 100 300 1K 3K 10K f (Hz)
Typical Tone Response (with the ext. Components indicated in the test circuit)
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Loudness (dB)
Quiescent Current (mA)
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4-Channel Audio Processor IC PT2313
Loudness vs Volume Attenuation
25
20
15
10
5
0
0 5 10 15 20 25 30 35 40 45
Volume Attenuation (dB)
Quiescent Current vs. Supply Voltage
9
8
7
6
5
4
3
4 5 6 7 8 9 10
Supply Voltage (V)
PT2313 v 1 Page 13 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Application Circuit
R2
5.6K
C9
MCU
2.2u
C11
100n
C14
100n
C17
C15
2.7n
100n
26
27
DGND DATA CLK LOUT LIN LOUD_L BOUT_L BIN_L TREB_L
C6 2.2u
AM/FM
Tuner
C1 2.2u
C5 2.2u
CD
Player
C2 2.2u
C4 2.2u
Tape
RIN1
LIN1
RIN2
LIN2
RIN3
LIN3
C3 2.2u
VDD
PT2313
VDD AGND REF ROUT RIN LOUD_R BOUT_R BIN_R TREB_R
3
2
Order Information
16
17
28
7
4
2.7n
C7
2.2u
C9
8
12
6
8
100n
C10
184
19
10u
C18
LFOUT
25
24
RFOUT
LROUT
23
22
RROUT
21
100n
100n
C13
C12
5.6K
5
20
2.7n
C16
R1
Amp1
Amp2
10u
C19
10u
C20
Amp3
Amp4
10u
C21
Front Speaker
Rear Speaker
Valid Part Number Package Type
PT2313 28 Pins, DIP
PT2313-S 28 Pins, SO (300 mil)
PT2313 v 1 Page 14 Written Feb. 1997
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4-Channel Audio Processor IC PT2313
Package Information
28 Pins, DIP Package
Symbol Dimension in Mil
A 1450
B 70
C 70
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4-Channel Audio Processor IC PT2313
28 Pins, SO Package (300 mil)
Symbol
A 2.36 2.49 2.64 0.093 0.098 0.104
A1 0.10 - 0.30 0.004 - 0.012
A2 - 2.34 - - 0.092 -
B 0.33 0.41 0.51 0.013 0.016 0.020
C 0.23 0.25 0.30 0.009 0.010 0.012
D 17.70 17.91 18.11 0.697 0.705 0.713
E 7.39 7.49 7.59 0.291 0.295 0.299
e - 1.27 - - 0.050 -
H 10.01 10.31 10.64 0.394 0.406 0.419
L 0.38 0.81 1.27 0.015 0.032 0.050
y - - 0.10 - - 0.004
θ
Note: 1. Controlling Dimension: Inch
2. Lead Frame Material: Copper 194
3. After solder plating lead thickness will be 0.015” max.
4. Dimension “D” does not include mold flash, protrusions or gate burrs.
5. Dimension “E” does not include interlead or protrusions.
6. Tolerance: ±0.010” unless otherwise specified.
7. Otherwise dimension follow acceptable spec.
8. Bottom E-Pin Indent in marked as below:
Dimensions in
Millimeter
Min Nom Max Min Nom Max
O
0
- 8
Dimensions in Inches
O
O
0
- 8
O
PT2313 v 1 Page 16 Written Feb. 1997
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