Datasheet PS4051EPE, PS4051ESE, PS4052CPE, PS4052CSE, PS4052EEE Datasheet (PERICOM)

1

PS8461 02/16/00

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

Features

• Low On-resistance: 60Ω typ, with ±5V Supplies,

Minimizes Distortion

• On-Resistance Matching between channels better than 6Ω

• Guaranteed Low Leakage Currents: <0.1nA at +25

o

C

• Rail-to-Rail Analog Signal Range

• Low Distortion: <0.04% (600Ω)

• Low Crosstalk: 90dB @100kHz

• TTL/CMOS Compatible (with +5V or ±5V Supplies)

• Low Power Consumption.

• 16-pin Narrow SOIC and QSOP Packages save board area

• Pin-compatible upgrades for 74HC4051/4052/4053

Applications

• Audio and Video Switching and Routing

• Lab and Medical Instrumentation

• Low-Voltage Data-Acquisition and Process

Control Systems

• Battery-Powered Communication Systems

Description

The PS4051/PS4052/PS4053 are precision low-voltage CMOS analog multiplexers/switches.

The PS4051 is an eight-channel single-ended mux designed to select one of eight inputs to a common output. What input is selected depends on the status of three address bits (ADDA-ADDC). The PS4052 is a differential four-channel mux, controlled by two address bits: ADDA, and ADDB. The PS4053 is a triple 2-to-1 mux (or triple SPDT, single-pole double-throw, switch).

The INH (inhibit) pin can be driven high, to open all switches regardless of address bit status. All control inputs are TTL compatible when V+ = +5V.

These devices are designed to operate with power supplies from ±2.7V to ±8V. Single-supply operation is possible from +2.7V to +16V.

When on, each switch conducts current equally well in either direction and can handle rail-to-rail analog signals. In the off -state each switch blocks voltages up to the power-supply rails. Off-leakage current is guaranteed to be less than 0.1nA at +25oC, and < 2.5nA at +85oC.

These devices are available in 16-pin DIP, Narrow SOIC, and QSOP packages for operation over the 40oC to +85oC temperature range.

Functional Block Diagrams and Pin Configurations

Top Views

For free samples and the latest literature: www.pericom.com, or phone 1-800-435-2336

10

11

12

13

14

15

16

9

7

6

5

4

3

2

1

8

NO1 NO3

COM

NO7

INH

NO5

V-

GND

V+ NO2 NO4 NO0

ADDC

NO6

ADDB ADDA

LOGIC

10

11

12

13

14

15

16

9

7

6

5

4

3

2

1

8

NO0B NO1B

COMB

NO3B

INH

NO2B

V-

GND

V+ NO1A NO2A COMA

NO3A

NO0A

ADDB ADDA

LOGIC

10

11

12

13

14

15

16

9

7

6

5

4

3

2

1

8

N0B NCB NOA

COMA

INH

NCA

V-

GND

V+ COMB COMC NOC

ADDC

NCC

ADDB ADDA

LOGIC

PS4051 PS4052 PS4053

2

PS8461 02/16/00

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.

Thermal Information

Continuous Power Dissipation

Plastic DIP (derate 10.5mW/°C above +70°C) ..............800mW

Narrow SO and QSOP

(derate 8.7mW/°C above +70°C) ....................................650mW

Storage Temperature ........................................ -65°C to +150°C

Lead Temperature (soldering, 10s) ................................. +300°C

Note 1:

Signals on NO, COM, or logic inputs exceeding V+ or V are clamped by internal diodes. Limit forward diode current to 30mA.

Absolute Maximum Ratings

Voltages Referenced to V

V+ ..................................................................... 0.3V to + 17V

GND ................................................................. 0.3V to + 17V

GND ......................................................... -0.3V to (V+) + 0.3V

VIN, V

COM

, V

NO

(1)

.......................................... (V-) 2V to (V+) + 2V

or 30mA, whichever occurs first

Current (any terminal ) ..................................................... 30mA

Peak Current, COM, NO, NC

(pulsed at 1ms, 10% duty cycle) ..................................... 100mA

ESD per method 3015.7 ............................................... >2000V

1504SP

HNICDDABDDAADDAhctiwSnO

1XXX enoN

0000 0ON

0001 1ON

0010 2ON

0011 3ON

0100 4ON

0101 5ON

0110 6ON

0111 7ON

2504SP

HNIBDDAADDAhctiwSnO

1XX enoN

000 B,A0ON

001 B,A1ON

010 B,A2ON

011 B,A3ON

Truth Tables

3504SP

HNICDDABDDAADDAsehctiwSnO

1XXX enoN

0000 CONBONAON

0001 CONBONACN

0010 CONBCNAON

0011 CONBCNACN

0100 CCNBONAON

0101 CCNBONACN

0110 CCNBCNAON

0111 CCNBCNACN

Logic 0, VAL ≤ 0.8V Logic 1, VIH ≥ 2.4V

3

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

PS8461 02/16/00

Electrical Specifications - Dual Supplies

(V± = ± 5V ±10%, GND = 0V, V

AH

= VIH = 2.4V, V

AL

= V

IL

= 0.8V)

retemaraPlobmySsnoitidnoC)C°(.pmeTniM

)2(

pyT

)1(

xaM

)2(

stinU

hctiwSgolanA

langiSgolanA

egnaR

)3(

V

GOLANA

lluFV+VV

ecnatsiseRnOR

NO

,V5=V,V5=+V

V

MOC

,V3±=

I

ON

Am1=

5206001

Ω

lluF521

ecnatsiseR-nO

neewteBhctaM

slennahC

)4(

∆R

NO

V

MOC

Vro

CN

,V3±=

I

ON

,Am1=

V5=V,V5=+V

5221

lluF81

ecnatsiseR-nO

ssentalF

)5(

R

)NO(TALF

,V5=V,V5=+V

I

ON

,Am1=

V

MOC

V0,V3±=

5201

lluF51

ffOON

tnerruCegakaeL

)6(

I

ON

)FFO(

,V5.5=V,V5.5=+V

V

MOC

,V5.4±=

V

ON

V5.4+=

521.005

An

lluF0.1001

egakaeLffO-MOC

tnerruC

)6(

I

MOC

)FFO(

,V5.5=+V

V,V5.5=

V

MOC

,V5.4±=

V

ON

V5.4+=

1504SP

521.005

lluF5.2001

2504SP 3504SP

521.005

lluF5.1001

egakaeLnOMOC

)7(tnerruC

I

)NO(MOC

V

MOC

V5.4+=

1504SP

521.005

lluF5 001

2504SP 3504SP

521.005

lluF5.2001

tupnIcigoL

hgiHcigoL

egatloVtupnI

V

HA

,V

HI

lluF

4.2 V

woLcigoL

egatloVtupnI

V

LA

V,

LI

8.0

tnerruCtupnI

egatloVtupnIhtiw

woLrohgiH

I

HII,LI

VAV=

I

V0,+V=1.0-1.0

µA

4

PS8461 02/16/00

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

Notes:

1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.

2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.

3. Guaranteed by design

4. ∆R

ΟΝ = RΟΝ

max - R

ΟΝ

min

5. Flatness is defined as the difference between the maximum and minimum values of on-resistance measured over the specific analog signal range, i.e., VNO = 3V to 0 and 0V to –3V.

6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.

7. Off Isolation = 20log10 V

COM

/ VNO. See Figure 5.

Electrical Specifications - Dual Supplies (continued)

(V± = ±5V ±10%, GND = 0V, V

AH

= VIH = 2.4V, V

AL

= V

IL

= 0.8V)

retemaraP

lobmySsnoitidnoC)C°(pmeTniM

)1(

pyT

)2(

xaM

)1(

stinU

cimanyD

emiTnoitisnarTt

SNART

1erugiF

52

57052

sn

ekaM-erofeB-kaerB

yaleDemiT

t

NEPO

3erugiF201

emiTnO-nruTt

NO

2erugiF

05571

lluF522

emiTffO-nruTt

FFO

2erugiF

5204051

lluF002

noitcejnIegrahC

)3(

QCL,Fn1=VSR,V0=

S

0= Ω,

52

201Cp

noitalosIffO

)7(

RRIO

C

L

V,Fp51=

HNI

R,V5=

L

05= Ω,

V,zHk001=f

ON

V1=

SMR

09

Bd

klatssorCX

KLAT

C

L

R,Fp51=

L

05= Ω,

,zHk001=f

V,6erugiF

ON

V1=

SMR

29

tupnIcigoL

ecnaticapaC

C

NI

zHM1=f8

Fp

ecnaticapaCffOONC

)FFO(ON

V,zHM1=f

ON

V0=2

ffOMOC

ecnaticapaC

C

)FFO(MOC

V,zHM1=f

MOC

V0=

1504SP2

2504SP 3504SP

2

nOMOC

ecnaticapaC

C

)NO(MOC

V,zHM1=f

MOC

V0=

1504SP8

2504SP 3504SP

8

ylppuS

egnaRylppuS-rewoP

lluF

7.2±8±V

tnerruCylppuSevitisoP+I

V

HNI

V=

A

,+VroV0=

V5.5=V,V5.5=+V

01

µA

ylppuSevitageN

tnerruC

I01

5

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

PS8461 02/16/00

retemaraP

lobmySsnoitidnoC)C°(pmeTniM

)1(

pyT

)2(

xaM

)1(

stinU

hctiwS

egnaRlangiSgolanA

)3(

V

GOLANA

lluF0 +VV

ecnatsiseRnOR

NO

I

ON

,Am1=

V

MOC

,V5.3=

V5.4=+V

52521522

Ω

lluF082

egakaeLffO-ON

tnerruC

)8(

I

)FFO(ON

V

ON

,V0=

V

MOC

V5.5=+V,V5.4=

521.005

nΑ

lluF01001

egakaeLffO-MOC

tnerruC

)8(

I

)FFO(MOC

,V5.5=+V

V

MOC

,V5.4=

V

ON

ro,V0=

V

MOC

,V0=

V

ON

V5.4=

1504SP

52105

lluF01001

2504SP 3504SP

52105

lluF5001

egakaeLnO-MOC

tnerruC

)8(

I

)NO(MOC

V

MOC

V=

ON

,V5.4=

V5.5=+V

1504SP

52105

lluF01001

2504SP 3504SP

52105

lluF01001

tupnIcigoLlatigiD

egatloVtupnIhgiHcigoLV

HA

V,

HI

lluF

4.2 V

egatloVtupnIwoLcigoLV

LA

V,

LI

8.0

tupnIhtiwtnerruCtupnI

woLrohgiHegatloV

I

HII,LI

VAV=

I

V0,+V=11

µA

ylppuS

tnerruCylppuS-evitisoP+IVAV=

I

+VroV0=

520.10.1

µA

lluF01

Electrical Characteristics - Single 5V Supply

(V+ = +5V ±10%, V– = 0V, GND = 0V, V

AH

= VIH = 2.4V, V

AL

= V

IL

= 0.8V)

6

PS8461 02/16/00

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

retemaraP

lobmySsnoitidnoC)C°(pmeTniM

)1(

pyT

)2(

xaM

)1(

stinU

cimanyD

emiTnO-nruTt

NO

5209002

sn

lluF572

emiTffO-nruTt

FFO

5206521

lluF571

ekaM-erofeB-kaerB

lavretnI

t

NEPO

52

03

noitcejnIegrahC

)3(

QCLV,Fn1=

S

R,V0=

S

= Ω0 5.15Cp

Electrical Characteristics - Single 5V(continued)

(V+ = +5V ±10%, V– = 0V, GND = 0V, V

AH

= VIH = 2.4V, V

AL

= V

IL

= 0.8V)

retemaraPlobmySsnoitidnoC)C°(pmeTniM

)1(

pyT

)2(

xaM

)1(

stinU

hctiwS

egnaRlangiSgolanA

)3(

V

GOLANA

lluF0 +VV

ecnatsiseR-nOR

NO

I

ON

V,Am1=

MOC

,V5.1=

V3=+V

52052525

Ω

lluF007

cimanyD

emiTnoitisnarT

)3(

t

SNART

V,1erugiF

NI

V4.2=

V

1ON

V,V5.1=

8ON

V0=

52

032575

snemiTnO-nruT

)3(

t

NO

V,2erugiF

HNI

V4.2=

V

LNI

V,V0=

1ON

V5.1=

002005

emiTffO-nruT

)3(

t

FFO

V,2erugiF

HNI

V4.2=

V

LNI

V,V0=

1ON

V5.1=

57004

noitcejnIegrahC

)3(

QCLV,Fn01=

S

R,V0=

S

0= Ω 15 Cp

Electrical Characteristics - Single 3V Supply

(V+ = +3.3V ±10%, V– = 0V, GND = 0V, V

AH

= V

IH

= +2.4V, V

AL

= V

IL

L

= +0.8V)

Notes:

1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.

2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.

3. Guaranteed by design

4. ∆R

ΟΝ = RΟΝ

max - R

ΟΝ

min

5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.

6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.

7. Worst-case isolation is on channel 4 because of its proximity to the COM pin. Off isolation = 20log V

COM/VNO

,

V

COM

= output, VNO = input to off switch

8. Leakage testing at single supply is guaranteed by testing with dual supplies.

7

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

PS8461 02/16/00

Test Circuits/Timing Diagrams

Figure 1. Transition Time

Figure 2. Switching Times

tr <20ns tf <20ns

t

trans

V

NO7

ON

t

trans

V

OUT

V

NO0

90%

Logic

Input

Switch

Output

V+

0V

50%

V+

NO7

COM

GND

V-

V+

V-

NO0

ADDC ADDB

ADDA

INH

NO1-NO6

50

W

V

OUT

300

W

35pF

PS4051

V+

NO3

COM

GND

V-

V+

V-

NO0

ADDB ADDA

INH

NO1-NO2

50

W

V

OUT

300

W

35pF

PS4052

V+

COM

GND

V-

V+

V-

NO

ADD

INH

NC

50

W

V

OUT

300

W

35pF

PS4053

V+

COM

GND

V-

V+

V-

NO0

ADDX

INH

NOX

50

W

V

OUT

300

W

35pF

tr <20ns

tf <20ns

V

OUT

t

ON

90%

10%

Logic

Input

Switch Output

V+

0V

50%

PS4051 PS4052

V+

+5V

COM

GND

V-

V+

V-

NO

NC

ADD

INH

50

W

V

OUT

300

W

35pF

V-

PS4053

t

OFF

tr <20ns

tf <20ns

V

OUT

t

ON

90%

10%

Logic

Input

Switch Output

V+

0V

50%

t

OFF

V-

8

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

Figure 3. Break-Before-Make Interval

Figure 4. Charge Injection

Figure 5. Off Isolation

Figure 6. Crosstalk

V+

COM

GNDINH

V-

10nF

NO0 NO1

NO7

ADD

V

OUT

RL = 50

W

V

OUT

V

IN

V

IN

R = 1k

W

RG = 50

W

CROSSTALK = 20log

~

PS4051 PS4052

50

W

9

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PS4051/PS4052/PS4053

17V CMOS Analog Multiplexers/Switches

PS8461 02/16/00

Figure 8. NO/COM Capacitance

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

rebmuNtraPerutarepmeTegakcaP

EPC1504SPCº07+otCº061-PIDP

ESC1504SPCº07+otCº061-CIOSworraN

EEC1504SPCº07+otCº061-POSQ

EPE1504SPCº58+otCº0461-PIDP

ESE1504SPCº58+otCº0461-CIOSworraN

EEE1504SPCº58+otCº0461-POSQ

EPC2504SPCº07+otCº061-PIDP

ESC2504SPCº07+otCº061-CIOSworraN

EEC2504SPCº07+otCº061-POSQ

Ordering Information

rebmuNtraPerutarepmeTegakcaP

EPE2504SPCº58+otCº0461-PIDP

ESE2504SPCº58+otCº0461-CIOSworraN

EEE2504SPCº58+otCº0461-POSQ

EPC3504SPCº07+otCº061-PIDP

ESC3504SPCº07+otCº061-CIOSworraN

EEC3504SPCº07+otCº061-POSQ

EPE3504SPCº58+otCº0461-PIDP

ESE3504SPCº58+otCº0461-CIOSworraN

EEE3504SPCº58+otCº0461-POSQ

Datasheet PS4051EPE, PS4051ESE, PS4052CPE, PS4052CSE, PS4052EEE Datasheet (PERICOM)

Specifications and Main Features

Frequently Asked Questions

User Manual