• Narrow SOIC and QSOP Packages Minimize Board Area
Applications
• Data Acquisition Systems
• Audio Switching and Routing
• Test Equipment
• PBX, PABX
• Telecommunication Systems
• Battery-Powered Systems
Description
The PS398/PS399 are improved high precision analog multiplexers. The PS398, an 8-channel single-ended mux, selects one of
eight inputs to a common output as determined by a 3-bit address
A0-A2. An EN (enable) pin when low disables all switches, useful when stacking several devices. The PS399 is a 4-channel
differential multiplexer. It selects one of four differential inputs to
a common differential output as determined by a 2-bit address A0,
A1. An EN pin may be driven low to disable all switches.
These multiplexers operate with dual supplies from +3V to +8V.
Single-supply operation is possible from +3V to +15V.
With +5V power supplies, the PS398/PS399 guarantee <100Ω
on-resistance. On-resistance matching between channels is within
6Ω. On-resistance flatness is less than 11Ω over the specified
signal range.
Each switch conducts current equally well in either direction when
on. In the off state each switch blocks voltages up to the powersupply rails.
Both devices guarantee low leakage currents (<2.5nA at +85oC)
and fast switching speeds (t
switching action protects against momentary crosstalk between
channels.
<250ns). Break-before-make
TRANS
Functional Block Diagrams and Pin Configurations
Top View
PS398
A0
EN
V-
NO1
NO2
NO3
NO4
COM
1
Decoders/Drivers
2
3
4
5
6
7
8
16
15
14
13
12
11
10
A1
A2
GND
V+
NO5
NO6
NO7
9
NO8
Top View
PS399
1
AO
Decoders/Drivers
2
EN
3
V-
NO1A
NO2A
NO3A
NO4A
COMA
1
4
5
6
7
8
16
A1
15
GND
14
V+
13
NO1B
12
NO2B
11
NO3B
NO4B
10
9
COMB
PS8185C 10/06/99
Page 2
Truth Tables
PS398/PS399
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
PS398
A2A1A0ENOn Switch
XXX0 None
0001 1
0011 2
0101 3
0111 4
1001 5
1011 6
1101 7
1111 8
Ordering Information
PartTemperaturePackagePartTemperaturePackage
NumberRangeNumber Range
PS398CPE0oC to +70oC 16 Plastic DIP PS399CPE 0oC to +70oC 16 Plastic DIP
PS398CSE0oC to +70oC16 Narrow SO PS399CSE 0oC to +70oC 16 Narrow SO
PS398EPE-40oC to +85oC16 Plastic DIP PS399EPE -40oC to +85oC 16 Plastic DIP
PS398ESE-40oC to +85oC16 Narrow SO PS399ESE -40oC to +85oC 16 Narrow SO
PS398EEE-40oC to +85oC16 QSOP PS399EEE -40oC to +85oC 16 QSOP
993SP
1A0ANEhctiwSNO
XX 0enoN
001 1
011 2
101 3
111 4
Logic 0, V
Logic 1, V
≤ 0.8V
AL
AH
≥ 2.4V
Absolute Maximum Ratings
Voltages Referenced to V-
V+ .................................................................... -0.3V to + 17V
-0.3V to ( V+) + 0.3V
VIN, V
or 30mA, whichever oc-
curs first
, VNO (Note 1) ............ (V-) -2V to (V+) + 2V
COM
Thermal Information
Continuous Power Dissipation
Plastic DIP (derate 10.5mW/ °C above +70°C) ............. 800mW
Narrow SO and QSOP(derate 8.7mW/ °C above +70°C)650mW
Storage Temperature ...................................... 65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Note 1:
Signals on NO, COM, or logic inputs exceeding V+ or V- are
clamped by internal diodes. Limit forward diode current to 30mA.
Current (any terminal ) ........................................................30mA
Peak Current, COM, NO, NC
(pulsed at 1ms, 10% duty cycle) ....................................100mA
ESD per method 3015.7 .............................................. > 2000V
Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating
and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.
2
PS8185C 10/06/99
Page 3
PS398/PS399
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
1.Algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.
2.Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3.Guaranteed by design.
4. ∆R
ON = RON
max - R
ON
min.
5.Flatness is defined as the difference between the maximum and minimum values of on-resistance measured.
6.Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7.Off Isolation = 20log10 V
/ VNO. See Figure 5.
COM
4
PS8185C 10/06/99
Page 5
Electrical Characteristics - Single 5V Supply
(V+ = + 5V ± 10%, V- = 0V, GND = 0V, V
AH
= V
ENH
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
= +2.4, VAL = V
ENL
PS398/PS399
= +0.8V)
retemaraPlobmySsnoitidnoCpmeT)C°(.niM
)1(
)2(
.pyT
)1(
.xaM
stinU
hctiwS
)3(
V
egnaRlangiSgolanA
ecnatsiseRnOR
V
,MOC
ON
I
NO
ON
V,Am1=
MOC
,V5.3=
V5.4=+V
lluF0+VV
52001522
lluF082
R
NO
)4(
slennahC
)8(
tnerruC
neewteBgnihctaM
ssentalFecnatsiseR-nOR
egakaeLffO-ON
∆R
NO
TALF
I
)FFO(ON
I
I
ON
ON
V,Am1=
MOC
,V5.3=
V5.4=+V
V,Am1=
MOC
,V5.2,V5.1=
V5=+V,V5.3
V
ON
V,V5.4=
=,V0
MOC
V5.5=+V
5211
lluF31
5281
lluF22
521.0-1.0
lluF0.1-0.1
Ω
522.0-05
V
)8(
egakaeLffO-MOC
tnerruC
I
)FFO(MOC
MOC
V,V5.4=
ON
,V0=
V5.5=+V
893SP
lluF5.2-001
522.0-05
993SP
nΑ
lluF5.1-001
V
)8(
egakaeLnO-MOC
tnerruC
I
)NO(MOC
MOC
V,V5.4=
ON
,V5.4=
V5.5=+V
893SP
lluF5-5
522.0-2.0
993SP
lluF5.2-5.2
tupnIcigoLlatigiD
524.0-4.0
egatloVtupnIhgiHcigoLV
V,
HA
HNE
4.2
V
egatloVtupnIwoLcigoLV
tupnIhtiwtnerruCtupnI
hgiHegatloV
HA
I
HA,INEH
V,
NEL
VA=V
V4.2=1.0-1.0
NE
lluF
8.0
µA
tupnIhtiwtnerruCtupnI
woLegatloV
I
HA,INEL
VAV=
V8.0=1.0-1.0
NE
ylppuS
egnaRylppuS-rewoP+V
tnerruCylppuS-evitisoP+I
tnerruCylppuS-evitageN-I0.1-0.1
tnerruCdnuorGI
DNG
V
NE
V5.5=+V,V0=-V
V0ro+V=,V
V0=,
A
lluF
351V
0.1-0.1
Αµ
0.1-0.1
5
PS8185C 10/06/99
Page 6
Electrical Characteristics - Single 5V
(V+ = +5V ± 10%, V- = 0V, GND = 0V, V
retemaraPlobmySsnoitidnoCpmeT)C°(.niM
cimanyD
AH
= V
= +2.4, VAL = V
ENH
PS398/PS399
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
= +0.8V (continued)
ENL
)1(
)2(
.pyT
)1(
.xaM
stinU
emiTnoitisnarTt
lavretnIekaM-erofeB-kaerBt
emiTnO-nruTelbanEt
emiTffO-nruTelbanEt
)3(
noitcejnIegrahC
SNART
NEPO
)NE(NO
)NE(FFO
QCLV,Fn1=
Electrical Characteristics - Single 3V Supply
(V+ = +3V ± 10%, V- = 0V, GND = 0V, V
retemaraPlobmySsnoitidnoC.pmeT)C°(.niM
hctiwS
)3(
egnaRlangiSgolanA
ecnatsiseR-nOR
V
GOLANA
NO
cimanyD
AH
= V
I
= +2.4, VAL = V
ENH
ON
27542
V
V3=
ON
52
0163
011002
sn
lluF572
5256521
lluF002
R,V0=
S
0= Ω528.25Cp
S
= +0.8V)
ENL
)1(
)2(
.pyT
)1(
.xaM
stinU
lluF0+VV
V,Am1=
MOC
,V5.1=
V3=+V
52061573
Ω
lluF524
V,1erugiF
)3(
emiTnoitisnarT
emiTffO-nruTelbanE
)3(
noitcejnIegrahC
t
SNART
)3(
t
)NE(NO
)3(
t
)NE(FFO
V
1ON
V
LNI
V
LNI
QCLV,Fn01=
NI
V,2erugiF
V,V0=
V,2erugiF
V,V0=
S
V4.2=
V,V5.1=
HNI
1ON
HNI
1ON
V0=
8ON
V4.2=
V5.1=
52
V4.2=
V5.1=
R,V0=
0= Ω25Cp
S
002575
002005
29004
Notes:
1.The algebraic convention, where the most negative value is a minimum and the most positive is a maximum,
is used in this data sheet.
2.Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3.Guaranteed by design
4.∆R
ΟΝ = RΟΝ
max - R
ΟΝ
min
5.Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6.Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7.Worst-case isolation is on channel 4 because of its proximity to the COM pin.
Off isolation = 20log V
COM/VNO
, V
= output, VNO = input to off switch
COM
8.Leakage testing at single supply is guaranteed by testing with dual supplies.
6
snemiTnO-nruTelbanE
PS8185C 10/06/99
Page 7
Test Circuits/Timing Diagrams
+5V
PS398/PS399
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
50
50
W
+
W
+5V
5V
A2A1
A0
EN
A1A0
EN
PS398
GND
PS399
GND
V+
V+
NO2A-NO4B
NO1
NO2-NO7
NO8
COM
V-
-5V
+5V
NO1A
NO4A
COM
V-
-5V
+5V
-5VV
OUT
+5V
-5V
35pF
V
35pF
OUT
300
300
W
W
Figure 1. Transition Time
Logic
Input
V
EN
Switch
Output
V
OUT
V
V
+3V
0V
NO1
0V
NO8
t
trans
ON
50%
90%
90%
t
tr<20nstf<20ns
trans
50W
50W
+5V
PS398
GND
V+
NO2-NO8
+5V
NO1
COM
V-
-5V
300W
+5V
t
OFF(EN)
tr <20ns
tf <20ns
V
OUT
Ω
35pF
Logic
Input
V
EN
+3V
0V
t
ON(EN)
0V
50%
90%
EN
Ω
A2
A1
A0
Switch
EN
V+
NO1B
+5V
Ω
A0
A1
NO1A-NO4A,
NO2B-NO4B,
PS399
GND
COMA
COMB
V-
300W
V
OUT
Ω
35pF
Output
V
OUT
10%
-5V
Figure 2. Enable Switching Time
7
PS8185C 10/06/99
Page 8
PS398/PS399
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
+5V
DV
∆
tr <20ns
tf <20ns
OUT
+2.4V
V
EN
EN
V+
NO1-NO8
+5V
Logic
Input
+3V
50%
V
0V
A
A2
OUT
+5V
0V
A1
PS398
A0
COM
V
A
50W
GND
Ω
V-
300W
Ω
V
35pF
OUT
Switch
Output
V
80%
t
OPEN
-5V
Figure 3. Break-Before-Make Interval
+5V
R
S
V
EN
V
S
Channel
Select
NO
EN
A0
A1
A2
GND
V+
PS398
COM
V-
V
OUT
C =1000pF
L
Logic
Input
V
EN
V
OUT
+3V
0V
X C X C
0FF
ON
0FF
V
R
IN
= 50W
S
+5V
V+
N01
Ω
N08
PS398
A0
A1
A2
EN
GND
OFF ISOLATION = 20log
Figure 5. Off Isolation
10nF
NO1
COM
V-
-5V
-5V
Figure 4. Charge Injection
V
OUT
=1kW
Ω
R
L
V
OUT
V
IN
DV
IS THE MEASURED VOLTAGE DUE TO CHARGE
OUT
∆
TRANSFER WHEN THE CHANNEL TURNS OFF.
DV
x C
∆
R
R
G
OUT
=1kW
= 50W
L
10nF
+5V
V+
V
IN
Ω
Ω
N01
N02
N08
PS398
A0
A1
A2
GND
10nF
CROSSTALK = 20log
COM
V-
-5V
EN
+
5V
V
OUT
=1kW
Ω
R
L
V
OUT
V
IN
Figure 6. CrossTalk
8
PS8185C 10/06/99
Page 9
PS398/PS399
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
+5V
V+
PS398
Channel
A2
A1
Select
A0
GND
EN
Figure 8. NO/COM Capacitance
Applications
Overvoltage Protection
Proper power-supply sequencing is recommended for all CMOS
devices. Do not exceed the absolute maximum ratings, because
stresses beyond the listed ratings may cause permanent damage to
the devices. Always sequence V+ on first, followed by V-, and then
logic inputs. If power-supply sequencing is not possible, add two
small signal diodes or two current limiting resistors in series with
the supply pins for overvoltage protection (Figure 9). Adding
diodes reduces the analog signal range, but low switch resistance
and low leakage characteristics are unaffected.
Maximum Sampling Rate
From the sampling theorem, the sampling frequency needed to
properly recover the original signal should be more than twice
its maximum component frequency. In real applications,
sampling at three or four times the maximum signal frequency is
customary.
The maximum sampling rate of a multiplexer is determined by its
transition time (t
and the settling time (t
put. The maximum sampling rate is:
), the number of channels being multiplexed,
TRANS
SETTLING
) of the sampled signal at the out-
N01
N08
1MHz
Capacitance
Analyzer
V-
COM
=1MHz
f
-5V
Where n = number of channels scanned: 8 for PS398,
4 for PS399. t
is given on the specification table: 150 ns max.
TRANS
Settling time is the time needed for the output to stabilize within
the desired accuracy band of +1 LSB (least significant bit).
Other factors determining settling time are: signal source impedance, capacitive load at the output. Figure 10 illustrates the steady
state model. To figure out what the settling time due to the multiplexer is, we can assume that R
= 0Ω, and C
S
= 0. In real life, the
L
effects of RS and CL should be taken into account when performing these calculations.
Positive Supply
V+
TRANS
1
+ t
SETTLING
)
_______________ (1)
f
S =
n (t
COMNO
V
g
V-
Figure 9. Overvoltage protection is accomplished using two
external blocking diodes or two current limiting resistors.
9
PS8185C 10/06/99
Page 10
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
R
ON
V
IN
R
S
C
COM
(ON)
V
S
Figure 10. Equivalent model of one multiplexer channel
C
L
PS398/PS399
The table below shows how many time constants (mτ) are
needed to reach an accuracy of one LSB. τ = R
ON
x C
COM(ON)
BitsAccuracy (%)m
80.256
120.0129
150.001711
Now, lets calculate what the maximum sampling rate for the
PS398. Assume a 12-bit accuracy and room temperature
operation.
In equation (1) above, n = 8, t
TRANS
= 150ns, t
SETTLING
= 9τ,
τ = 100Ω x 54pF
_______________________ ,
fS =
8 [150ns + 9(100Ω x 54pF)]
or fS = 630kHz.
Assuming a x4 oversampling rate, the maximum sampling speed
for the PS398 would be 630÷4 = 157kHz.
1
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
10
PS8185C 10/06/99
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