234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901
2
6
7
8
5
1
2
3
4
NC1
COM1
IN2
GND
V+
COM2
NC2
IN1
PS325
PS323/PS324/PS325
Precision, Single-Supply
SPST Analog Switches
Features
• Low On-Resistance (33-Ohm typ.) Minimizes Distortion
and Error Voltages
• Low Glitching Reduces Step Errors in Sample-and-Holds.
Charge Injection, 2pC typ.
• Single-Supply Operation (+2.5V to +16V)
•· Improved Second Sources for MAX323/MAX324/MAX325
• On-Resistance Matching Between Channels, <2-Ohm
• On-Resistance Flatness, <6-Ohm max.
• Low Off-Channel Leakage, <5nA @ +85oC
• TTL/CMOS Logic Compatible
• Fast Switching Speed, tON <150ns
• Guaranteed Break-Before-Make action (PS325 only)
eliminates momentary crosstalk
v Rail-to-Rail Analog Signal Dynamic Range
• Low Power Consumption, <5mW
• MSOP Package Minimizes Board Area
Applications
• Audio Switching and Routing
• Portable Instruments
• Data Acquisition Systems
• Sample-and-Holds
• Telecommunication Systems
• Battery-Powered Systems
Description
The PS323/PS324/PS325 are improved high-precision, mediumvoltage analog switches designed to operate with single power
supplies. The PS323 is a dual, single-pole single-throw (SPST),
normally open (NO) switch. The PS324 has the same pinout as the
PS323 but it has two normally closed (NC) switches. The PS325 has
one normally open (NO) and one normally closed (NC) switch per
package. Each switch conducts current equally well in either
direction when on. In the off state, each switch blocks voltages up
to the power-supply rail.
With a +5V power supply, PS323/PS324/PS325 guarantee <60-ohm
ON-resistance. ON-resistance matching between channels is within
2W. ON-resistance flatness is less than 6W over the specified
range. All three devices guarantee low leakage currents (<100 pA
@ 25oC, <10nA @ +85oC) and fast switching speeds (tON <150ns).
Break-before-make switching action protects against momentary
crosstalk (PS325).
For single-supply operation below 5V, PI5A317/318/319 are also
recommended.
Functional Diagrams, Pin Configurations, and Truth Tables
PS323
8
7
6
5
V+
IN1
COM2
NO2
NC1
COM1
IN2
GND
NO1
COM1
IN2
GND
1
2
3
4
Top View
Switches shown for logic “0” input
323SP
cigoLhctiwS
0
1
FFO
NO
PS324
1
2
3
4
Top View
cigoLhctiwS
0
1
1
8
V+
IN1
7
COM2
6
5
NC2
Top View
423SP
523SP
cigoLhctiwS1 hctiwS2
NO
FFO
0
1
FFO
NO
NO
FFO
PS8188B 01/12/01
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PS323/PS324/PS325
Precision, Single Supply SPST Analog Switches
Absolute Maximum Ratings
Voltages Referenced to GND.......................................................
V +........................................................................... -0.3V to +17V
VIN, V
, VNC, VNO
COM
or 30mA, whichever occurs first
Current (any terminal) ........................................................ 30mA
Peak Current, COM, NO, NC
(pulsed at 1ms, 10% duty cycle).......................................100mA
ESD per Method 3015.7 ................................................... >2000V
(1)
................................................–2V to (V+) +2V
Thermal Information
Continuous Power Dissipation
Plastic DIP (derate 6mW/ ºC above +70ºC) ......................500mW
Narrow SO (derate 6mW/ ºC above +70ºC) ......................450mW
MSOP (derate 4mW/ ºC above +70ºC) ............................330mW
Storage Temperature ........................................ –65ºC to +150ºC
Lead Temperature (soldering, 10s) .................................. +300ºC
Note 1: Signals on NC, NO, COM, or IN exceeding V+ or GND
are clamped by internal diodes. Limit forward diode current to
30mA maximum.
Caution: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not
implied.
Electrical Specifications - Single +5V Supply
(V+ = 5V +10%, GND = 0V, V
retemaraPlobmySsnoitidnoC)C°(.pmeTniM
hctiwSgolanA
egnaRlangiSgolanA
ecnatsiseRnOR
)3(
= 2.4V, V
INH
V
= 0.8V)
INL
(2)
GOLANA
,V5.4=+V
NO
V
Vro
ON
CN
I
MOC
V5.3+=
Am1=
lluF0 +VV
523306
lluF57
)1(
pyT
)2(
xaM
stinU
Ω
hctaMecnatsiseR-nO
)4(
slennahCneewteB
)5(
ssentalFecnatsiseR-nO
egakaeLffOCNroON
)6(
tnerruC
egakaeLffOMOC
)6(
tnerruC
egakaeLnOMOC
(6)
tnerruC
∆R
NO
R
I
I
I
I
)NO(TALF
ro
)FFO(ON
)FFO(CN
)FFO(MOC
)NO(MOC
V
V
ON
V
V
Vro
ON
I
CN
I
MOC
MOC
Vro
CN
V,V5.5=+V
Vro
ON
V
V
CN
MOC
Vro
ON
CN
V,V5.5=+V
Vro
ON
CN
=,Am1
V5=+V
,V3+=
528.02
lluF4
,V5=+V
5226
,Am1=
,V3,V2,V1=
,V1=
MOC
lluF8
521.0–10.0–1.0
V5.4=
lluF5–5
,V5.5=+V
,V5.4=
V1=
MOC
,V5=
521.0–10.0–1.0
An
lluF5–5
522.0–40.0–2.0
V5=
lluF01–01
2
PS8188B 01/12/01
Electrical Specifications - Single +5V Supply (continued)
(V + = 5V ±10%, GND = 0V, V
retemaraPlobmySsnoitidnoC)C°(.pmeTniM
tupnIcigoL
=2.4V, V
INH
= 0.8V)
INL
PS323/PS324/PS325
Precision, Single Supply SPST Analog Switches
)1(
)2(
pyT
)1(
xaM
stinU
tupnIhtiwtnerruCtupnI
hgiHegatloV
tupnIhtiwtnerruCtupnI
woLegatloV
I
HNI
I
LNI
egatloVtupnIhgiHcigoLV
egatloVtupnIwoLcigoLV
HNI
LNI
V
NI
V
NI
cimanyD
emiTnO-nruTt
emiTffO-nruTt
ekaM-erofeB-kaerB
)3(
yaleDemiT
)3(
noitcejnIegrahC
)7(
noitalosIffO
klatssorCX
NO
FFO
t
D
Q
RRIOR
KLAT
C
=50Ω C,
L
RL05= Ω C,
V
NO ORVNC
3SP52lnoy,RL=030Ω,CL=3 ,Fp5
,Fn1=V
L
L
L
ffOONroCN
ecnaticapaCC
ecnaticapaCffOMOC
)FFO(
C
)FFO(MOC
V8.0=srehtolla,V4.2=lluF5.0–500.05.0
V4.2=srehtolla,V8.0=5.0–500.05.0
5258051
2erugiF,V3=
lluF042
5252001
lluF051
3erugiF
R,V0=
NEG
0= Ω,
NEG
4erugiF
=f,Fp5=zHM1, erugiF5 27–
=f,Fp5=zHM1, 6erugiF58–
52
zHM1=f,7erugiF
4.2
25
15Cp
9
9
µA
V
8.0
sn
Bd
Fp
ecnaticapaCnOMOC
C
)NO(MOC
zHM1=f,8erugiF22
ylppuS
egnaRylppuS-rewoP+V
tnerruCylppuSevitisoP+I
V,V5.5=+V
NI
,+VroV0=
lluF
afforonoslennahcll
7.261V
–1 1
Notes:
1 . The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in
this data sheet.
2 . Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ∆R
ON
= R
max - R
ON
ON
min
5 . Flatness is defined as the difference between the maximum and minimum value of ON-resistance measured.
6 . Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7 . Off Isolation = 20log10 [ V
/ (VNCor VNO) ]. See Figure 5.
COM
3
PS8188B 01/12/01
µA
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Electrical Specifications - Single +3.3V Supply
(V+ = 3.3V ±10%, GND = 0V, V
retemaraPlobmySsnoitidnoC)C°(pmeTniM
hctiwSgolanA
SgolanAlangiegnaR
)3(
ecnatsiseR-nOR
cimanyD
= 2.4V, V
INH
= 0.8V)
INL
V
GOLANA
NO
V
PS323/PS324/PS325
Precision, Single Supply SPST Analog Switches
)1(
0+VV
,V3=+V
I
MOC
Vro
ON
,Am1=
V5.1=
CN
5238571
lluF257
)2(
pyT
)1(
xaM
stinU
Ω
)3(
emiTnO-nruT
)3(
emiTffO-nruT
yaleDemiTekaM-erofeB-kaerB
)3(
noitcejnIegrahC
t
NO
VNOroV
t
FFO
)3(
t
D
Q
NC
2erugiF,V5.1=
ylno523SP5225
C
L
R
V,Fn1=
=
0Ω 4erugiF,
NEG
,V0=
NEG
52061004
lluF005
5204521
lluF571
5215Cp
sn
ylppuS
tnerruCylppuSevitisoP+I
=+V 3.6 V,V
NI
,+VroV0=
fforonoslennahclla
lluF1–10.01µA
4
PS8188B 01/12/01
Test Circuits/Timing Diagrams
PS323/PS324/PS325
Precision, Single Supply SPST Analog Switches
+5V
V+
V
COM = 3V
Logic
Input
CL INCLUDES FIXTURE AND STRAY CAPACITANCE
COM
IN
GND
= V
V
OUT
COM
NO
or NC
R
L
()
R
L + RON
R
1kΩ
V+
V+
+3V
NC
NO
R
Logic
Input
IN
GND
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
300W
+3V
Logic
Input
V
OUT
L
C
L
35pF
Switch
Output
0V
0V
LOGIC INPUT WAVEFORMS INVERTED FOR
SWITCHES THAT HAVE OPPOSITE LOGIC
V
50%
OUT
t
ON
90%
tr <20ns
tf <20ns
t
OFF
90%
Figure 2. Switching Time
+3V
Logic
Input
V
OUT
C
L
35
L
pF
0V
Switch
Output
(V
OUT)
0V
50%
90% 90%
t
D
V
GEN
Logic
Input
Figure 3. Break-Before-Make Interval (PS325 only)
+5V
∆V
OFF
OFF
OUT
GND
V+
NO or
NC
C
1nF
V
OUT
L
R
GEN
COM
IN
V
OUT
IN
OFF
OFF
IN
IN POLARITY DEPENDS ON NO OR NC SWITCH FUNCTION
Q = (∆V
ON
ON
OUT
)(CL)
Figure 4. Charge Injection
5
PS8188B 01/12/01
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Test Circuits/Timing Diagrams (continued)
V+
+5V
NC
Capacitance
Meter
GND
or NO
COM
10nF
IN
0V or
2.4V
f = 1MHz
PS323/PS324/PS325
Precision, Single Supply SPST Analog Switches
Analyzer
Capacitance
Meter
f = 1MHz
10nF
COM
R
L
Figure 5. Off Isolation
COM
NC
or NO
GND
10nF
COM
NC
or NO
+5V
V+
GND
+5V
V+
IN
IN
0V or
2.4V
0V or
2.4V
Signal
Generator 0dBm
0V or
3.5V
Analyzer
R
+5V
10nF
V+
COM1
IN1
COM
N02
Ω
L
50Ω
GND
N01
IN2
COM2
0V or
2.4V
NC
50Ω
Figure 6. Crosstalk
Ordering Information
Figure 7. Channel-Off Capacitance
traPegnaR.pmeTegakcaP
APC323SP
ASC323SPOSworraN8
Cº07+otCº0
PIDcitsalP8
XAUC323SP8POSM
APE323SP
ASE323SPOSworraN8
Cº58+otCº04–
PIDcitsalP8
XAUE323SPPOSM8
APC423SP
Cº07+otCº0
Pericom Semiconductor Corporation
ASC423SPOSworraN8
XAUC423SP8POSM
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PIDcitsalP8
6
Figure 8. Channel-On Capacitance
traPegnaR.pmeTegakcaP
APE423SP
ASE423SPOSworraN8
Cº58+otCº04–
XAUE423SPPOSM8
APC523SP
ASC523SPOSworraN8
Cº07+otCº0
XAUC523SPPOSM8
APE523SP
ASE523SPOSworraN8
Cº58+otCº04–
XAUE523SPPOSM8
PS8188B 01/12/01
PIDcitsalP8
PIDcitsalP8
PIDcitsalP8
Loading...