Datasheet PS301CPA, PS301CSA, PS301CUA, PS301EPA, PS301ESA Datasheet (PERICOM)

1

PS8187A 06/29/99

• Low On-Resistance (33Ω typ) Minimizes Distortion and

Error Voltages

• Low Glitching Reduces Step Errors in Sample-and-Holds.

Charge Injection, 2pC typ

• Single-Supply Operation (+2.5V to +16V)

• Improved Second Sources for MAX4501/MAX4502

• On-Resistance Matching Between Channels, <2Ω

• On-Resistance Flatness, <6Ω max

• Low Off-Channel Leakage, <5nA @ +85oC

• TTL/CMOS Logic Compatible

• Fast Switching Speed, tON < 150ns

• Guaranteed Break-Before-Make action (PS303 only)

eliminates momentary crosstalk

• Rail-to-Rail Analog Signal Dynamic Range

• Low Power Consumption, <5µW

• MSOP Package minimizes board area

Applications

• Audio, Video Switching and Routing

• Portable Instruments

• Data Acquisition Systems

• Sample-and-Holds

• Telecommunication Systems

• Battery-Powered Systems

Description

The PS301/PS302/PS303 are improved high precision, medium
voltage analog switches designed to operate with single power
supplies. The PS301 is a single-pole single-throw (SPST), nor­mally open (NO) switch. The PS302 has the same pinout as the
PS301 but is a normally closed (NC) switch. The PS303 has one
normally open (NO) and one normally closed (NC) switch per
package. Each switch conducts current equally well in either
direction when on. In the off state each switch blocks voltages up
to the power-supply rail.

With a +5V power supply, the PS301/PS302/PS303 guarantee
<60Ω ON-resistance. ON-resistance matching between channels
is within 2Ω. ON-resistance flatness is less than 6Ω over the
specified range. All three devices guarantee low leakage currents
(<100pA @ 25oC, <10nA @ +85oC) and fast switching speeds
(tON < 150ns). Break-before-make switching action protects
against momentary crosstalk (PS303).

For single-supply operation below 5V, the PI5A317/318/319
are also recommended.

103SP

cigoLhctiwS

0

1

FFO

NO

Switches shown for logic “0” input

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PS301/PS302/PS303

Functional Diagrams, Pin Configurations, and Truth Tables

Top Views

Features

For free samples and the latest literature: www.pericom.com, or phone [phone]

6

7

8

5

1
2
3
4

COM

N.C.
N.C.

V+

NC

IN
N.C.

GND

PS302

6

7

8

5

1
2
3
4

COM

N.C.
N.C.

V+

NO

IN
N.C.

GND

PS301

203SP

cigoLhctiwS

0

1

NO

FFO

6

7

8

5

1
2
3
4

NO

COM

NC

GND

V+

N.C.
N.C.

IN

PS303

303SP

cigoLCNON

0

1

NO

FFO

FFO

NO

Precision, Single-Supply

SPST Analog Switches

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2

PS8187A 06/29/99

PS301/PS302/PS303

Precision, Single Supply SPST Analog Switches

Absolute Maximum Ratings

Caution: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating
and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.

Thermal Information

Continuous Power Dissipation

Plastic DIP (derate 6mW/ ºC above +70ºC). . . . . . . . . 500mW

Narrow SO (derate 6mW/ ºC above +70ºC) . . . . . . . . 450mW

MSOP (derate 4mW/ ºC above +70ºC) . . . . . . . . . . . . 330mW

Storage Temperature . . . . . . . . . . . . . . . . . . -65ºC to +150ºC

Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . +300ºC

Note 1: Signals on NC, NO, COM, or IN exceeding V+ or
GND are clamped by internal diodes. Limit forward diode
current to 30mA maximum.

Voltages Referenced to GND

V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +17V

VIN, V

COM

, VNC, VNO (Note 1) . . . . . . . . . -2V to (V+) +2V

or 30mA, whichever occurs first

Current (any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA

Peak Current, COM, NO, NC

(pulsed at 1ms, 10% duty cycle) . . . . . . . . . . . . . . . . . . 100mA

ESD per Method 3015.7 . . . . . . . . . . . . . . . . . . . . . . . >2000V

Electrical Specifications - Single +5V Supply (V+ = 5V +10%, GND = 0V, V

INH

= 2.4V, V

INL

= 0.8V)

retemaraPlobmySsnoitidnoC)C°(.pmeTniM

(2)

pyT

)1(

xaM

)2(

stinU

hctiwSgolanA

egnaRlangiSgolanA

)3(

V

GOLANA

lluF0 +VV

ecnatsiseRnO

R

NO

,V5.4=+V

V

ON

Vro

CN

I,V5.3+=

MOC

Am1=

523306

Ω

lluF57

hctaMecnatsiseR-nO

slennahCneewteB

)4(

∆R

NO

V

ON

Vro

CN

,V3+=

I

MOC

=V5=+V,Am1

528.02

lluF4

ssentalFecnatsiseR-nO

)5(

R

)NO(TALF

,V5=+V

I

MOC

V,Am1=

ON

Vro

CN

,V3,V2,V1=

5226

lluF8

egakaeLffOCNroON

tnerruC

)6(

I

)FFO(ON

ro

I

)FFO(CN

V,V5.5=+V

MOC

,V1=

V

ON

Vro

CN

V5.4=

521.010.01.0

An

lluF55

tnerruCegakaeLffOMOC

)6(

I

)FFO(MOC

,V5.5=+V

V

MOC

V,V5.4=

ON

Vro

CN

V1=

521.010.01.0

lluF

5

5

tnerruCegakaeLnOMOC

(6)

I

)NO(MOC

V,V5.5=+V

MOC

,V5=

V

ON

Vro

CN

V5=

522.040.02.0

lluF0101

tupnIcigoL

tupnIhtiwtnerruCtupnI

hgiHegatloV

I

HNI

V

NI

V8.0=srehtolla,V4.2=lluF5.0500.05.0

µA

tupnIhtiwtnerruCtupnI

woLegatloV

I

LNI

V

NI

V4.2=srehtolla,V8.0=5.0500.05.0

egatloVtupnIhgiHcigoLV

HNI

4.2
V

egatloVtupnIwoLcigoLV

LNI

8.0

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3

PS8187A 06/29/99

PS301/PS302/PS303

Precision, Single Supply SPST Analog Switches

retemaraPlobmySsnoitidnoC)C°(.pmeTniM

)1(

pyT

)2(

xaM

)1(

stinU

cimanyD

emiTnO-nruTt

NO

VONroV

CN

2erugiF,V3=

5258051

sn

lluF042

emiTffO-nruTt

FFO

5252001

lluF051

ekaM-erofeB-kaerB

yaleDemiT

)3(

t

D

R,ylno303SP

L

003= Ω C,

L

3.giF,Fp53=

52

25

noitcejnIegrahC

)3(

QC

L

,Fn1=V

NEG

R,V0=

NEG

0= Ω 4.giF,15Cp

noitalosIffO

)7(

RRIOR

L

05= Ω C,

L

5.giF,zHM1=f,Fp5=27
Bd

klatssorCX

KLAT

R

L

05= Ω C,

L

6.giF,zHM1=f,Fp5=58

ffOONroCN

ecnaticapaC

C

)FFO(

7erugiF,zHM1=f

9

Fp

ecnaticapaCffOMOC

C

)FFO(MOC

9

ecnaticapaCnOMOC

C

)NO(MOC

8erugiF,zHM1=f22

ylppuS

egnaRylppuS-rewoP+V

lluF

7.261V

tnerruCylppuSevitisoP+I

V,V5.5=+V

NI

,+VroV0=

fforonoslennahclla

11

µA

Electrical Specifications - Single +5V Supply (continued)

(V + = 5V ±10%, GND = 0V, V

INH

=2.4V, V

INL

= 0.8V)

Notes:

1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in
this data sheet.

2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.

3. Guaranteed by design

4. ∆R

ΟΝ = RΟΝ

max. - R

ΟΝ

min.

5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.

6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.

7. Off Isolation = 20log

10

[V

COM

/ (VNCor VNO)]. See Figure 5.

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4

PS8187A 06/29/99

PS301/PS302/PS303

Precision, Single Supply SPST Analog Switches

Electrical Specifications - Single +12V Supply

(V+ = 12V ±10%, GND = 0V, V

INH

= 5V, V

INL

= 0)

retemaraPlobmySsnoitidnoC)C°(pmeTniM

)1(

pyT

)2(

xaM

)1(

stinU

hctiwSgolanA

SgolanAlangiegnaR

)3(

V

GOLANA

0+VV

ecnatsiseR-nOR

NO

,V21=+V

I

MOC

V,Am1=

ON

Vro

CN

V6=

524153

Ω

lluF54

cimanyD

emiTnO-nruT

)3(

t

NO

VONroV

CN

2erugiF,V6=

5258051

sn

lluF042

emiTffO-nruT

)3(

t

FFO

5252001

lluF051

emiTekaM-erofeB-kaerB

yaleD

)3(

t

D

ylno303SP5225

noitcejnIegrahC

)3(

Q

C

L

V,Fn1=

NEG

,V6=

R

NEG

=

0Ω 4erugiF,

52Cp

ylppuS

tnerruCylppuSevitisoP+I

V,V2.31=+V

NI

,+VroV0=

fforonoslennahclla

lluF110.01µA

Electrical Specifications - Single +3.3V Supply

(V+ = 3.3V ±10%, GND = 0V, V

INH

= 2.4V, V

INL

= 0.8V)

retemaraPlobmySsnoitidnoC)C°(pmeTniM

)1(

pyT

)2(

xaM

)1(

stinU

hctiwSgolanA

SgolanAlangiegnaR

)3(

V

GOLANA

0+VV

ecnatsiseR-nOR

NO

I,V3=+V

MOC

,Am1=

V

ON

Vro

CN

V5.1=

5238571

Ω

lluF257

cimanyD

emiTnO-nruT

)3(

t

NO

VNOroV

NC

2erugiF,V5.1=

52061004

sn

lluF005

emiTffO-nruT

)3(

t

FFO

5204521

lluF571

emiTekaM-erofeB-kaerB

yaleD

)3(

t

D

ylno303SP5225

noitcejnIegrahC

)3(

Q

C

L

V,Fn1=

NEG

,V0=

R

NEG

=

0Ω 4erugiF,

5215Cp

ylppuS

tnerruCylppuSevitisoP+I

=+V3.6V,V

NI

,+VroV0=

fforonoslennahclla

lluF110.01

µA

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5

PS8187A 06/29/99

PS301/PS302/PS303

Precision, Single Supply SPST Analog Switches

Test Circuits/Timing Diagrams

Figure 2. Switching Time

Figure 3. Break-Before-Make Interval (PS303 only)

Figure 4. Charge Injection

GND

+5V

NO

or NC

COM

V

COM = 3V

Logic

Input

IN

V+

tr <20ns
tf <20ns

V

OUT

= V

COM

R

L

R

L + RON

()

CL INCLUDES FIXTURE AND STRAY CAPACITANCE

V

OUT

R

L

1kΩ

C

L

35pF

LOGIC INPUT WAVEFORMS INVERTED FOR
SWITCHES THAT HAVE OPPOSITE LOGIC

t

OFF

t

ON

V

OUT

90%

Logic

Input

Switch
Output

+3V

0V

0V

50%

90%

V+

NO1

GND

NC

NO

+3V

IN

V+

+3V

50%

90% 90%

Logic
Input

Logic

Input

C

L

0V

0V

Switch

Output

V

OUT

INCLUDES FIXTURE AND STRAY CAPACITANCE.

t

D

V

C

L

R

L

35

OUT

300Ω

pF

V+

+5V

NO or

NC

GND

COM

R

GEN

V

OUT

C

L

1nF

V

OUT

∆V

OUT

IN

V

GEN

ON

ON

OFF

OFF

OFF

OFF

IN

Q = (∆V

OUT

)(CL)

IN

Logic
Input

IN POLARITY DEPENDS ON NO OR NC SWITCH FUNCTION

Ω

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6

PS8187A 06/29/99

PS301/PS302/PS303

Precision, Single Supply SPST Analog Switches

Test Circuits/Timing Diagrams (continued)

Figure 5. Off Isolation

Figure 7. Channel-Off Capacitance

Figure 6. Crosstalk

Figure 8. Channel-On Capacitance

V+

+5V

NC

Capacitance

Meter

or NO

COM

GND

10nF

IN

0V or

2.4V

f = 1kHz

V+

+5V

NC

Analyzer

GND

or NO

COM

10nF

IN

0V or

2.4V

COM

R

L

V+

+5V

Analyzer

N02

GND

COM1

10nF

IN2

R

L

COM

Signal
Generator 0dBm

0V or

3.5V

0V or

2.4V

COM2

IN1

N01

NC

50Ω

50Ω

V+

+5V

NC

Capacitance

Meter

GND

or NO

COM

10nF

IN

0V or

2.4V

f = 1kHz

Ω

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7

PS8187A 06/29/99

PS301/PS302/PS303

Precision, Single Supply SPST Analog Switches

Overvoltage

Proper power-supply sequencing is recommended for all CMOS
devices. Do not exceed the absolute maximum ratings, because
stresses beyond the listed ratings may cause permanent damage to
the devices. Always sequence V+ on first, and then logic inputs.
If power-supply sequencing is not possible, add two small signal
diodes or two current limiting resistors in series with the supply
pins for overvoltage protection (Figure 1). Adding diodes reduces
the analog signal range, but low switch resistance and low leakage
characteristics are unaffected.

Applications Information

Figure 1. Overvoltage protection is accomplished by using two
external blocking diodes or two current limiting resistors.

V+

Positive Supply

COMNO

V

g

V-

Protection

GND

When powered from +5V the PS301/PS302/PS303 can be oper­ated with either TTL- or CMOS-Logic levels. If V+ is different
than +5V, the logic threshold level will vary.

Power consumption is minimal when the logic control voltages
reach V+ or GND.

Logic Levels

Ordering Information

traPegnaR.pmeTegakcaP

3SP10APCCº07+otCº0PIDcitsalP8

3SP10ASCCº07+otCº0OSworraN8

3SP10CUA Cº07+otCº0POSM8

3SP10APECº58+otCº04PIDcitsalP8

3SP10ASECº58+otCº04OSworraN8

3SP20APCCº07+otCº0PIDcitsalP8

3SP20ASCCº07+otCº0OSworraN8

3SP20CUA Cº07+otCº0POSM8

traPegnaR.pmeTegakcaP

APE203SP



Cº58+otCº04

PIDcitsalP8

ASE203SP



Cº58+otCº04

OSworraN8

APC303SPCº07+otCº0PIDcitsalP8

ASC303SPCº07+otCº0OSworraN8

AUC303SPCº07+otCº0POSM8

03SP

3

APE



Cº58+otCº04

PIDcitsalP8

ASE303SP



Cº58+otCº04

OSworraN8

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax [phone] • http://www.pericom.com