Datasheet PL-2303 Datasheet (PROLIFIC)

PL-2303 USB to RS -232 Bridge Controlle r Product Datasheet

Document Revision 1.4 Document Release: August, 2002

Prolific T echnology Inc.

Revision History

Release Date:

July, 2002

ds_pl2303_v14

Revision

1.4

1.3

1.2

Description Date

• Add Windows CE .NET support feature

• Buffer for upstream and downstream data flow –

change from 96 to 256 bytes

• For Chip Version H (date code 0206)

• Add OS Support in Features Section

• Correct default values in Table 5. Device

Configuration Register

• Add Suspend Current in DC Characteristics Section

• Move Operating Temperature in DC Characteristics

to new section

August 29, 2002 August 01, 2002

July 03, 2002

PL-2303 Product Datasheet - 2 - Document Revision 1.3

Features

 Full compliance with the USB Specification v1.1 and USB CDC v1.1

 Support the RS232 Serial interface

 Support automatic handshake mode

 Support Remote wake-up and power management

 256 bytes buffer each for upstream and downstream data flow

 Support default ROM or external EEPROM for device configuration

 On chip USB transceiver

 On chip crystal oscillator running at 12M Hz

 Supports Windows 98/SE, ME, 2000, XP, Windows CE3.0, CE .NET, Linux, and Mac OS

Release Date:

July, 2002

ds_pl2303_v14

PL-2303 USB to Serial RS232 Bridge Controller

 28 Pins SOIC package

SSOP 28 PACKAGE

(TOP VIEW)

TXD

DTR_N

RTS_N

VDD_232

RXD

RI_N

GND

VDD

DSR_N

DCD_N

CTS_N

SHTD_N

EE_CLK

EE_DATA

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15 DP

OSC2

OSC1

PLL_TEST

GND_PLL

VDD_PLL

LD_MODE

TRI_MODE

GND

VDD

RESET

GND_3V3

VDD_3V3

DM

PL-2303 Product Datasheet - 3 - Document Revision 1.3

Block Diagram

Release Date:

July, 2002

ds_pl2303_v14

USB Port

USB

Transceiver

Control

Unit

DOWN

STREAM

BUFFER

CLOCK

SYNTHESIZE

USB

SIE

RS-232 SERIAL

REGISTER/

CONFIG/

STATUS/

CONTROL

UP

STREAM

BUFFER

INTERFACE

OSCILLATOR

EEPROM

INTERFACE

I2C Bus Serial Port

PL-2303 Product Datasheet - 4 - Document Revision 1.3

Release Date:

July, 2002

ds_pl2303_v14

Overview

The PL-2303 operates as a bridge between one USB port and one standard RS232 Serial port. The two

large on-chip buffers accommodate data flow from two different buses. The USB bulk-type data is adopted

for maximum data transfer. Automatic handshake is supported at the Serial port. With these, a much higher

baud rate can be achieved compared to the legacy UART controller.

This device is also compliant with USB power management and remote wakeup scheme. Only minimum

power is consumed from the host during Suspend. By integrating all the function in a SOIC-28 package, this

chip is suitable for cable embedding. Users just simply hook the cable into PC or hub’s USB port, and then

they can connect to any RS-232 devices.

Pin Description

Table 1. Pins Description

Pin No.

1 TXD O Data output to Serial port 2 DTR_N O Data Terminal Ready, active low 3 RTS_N O Request To Send, active low 4 VDD_232 P RS-232 VDD. The RS-232 output signals (Pin 1 ~ Pin 3) are

5 RXD I Data input from Serial Bus 6 RI_N I Ring Indicator, active low 7 GND P Ground 8 VDD P Power

9 DSR_N I Data Set Ready, active low 10 DCD_N I Data Carrier Detect, active low 11 CTS_N I Clear To Send, active low 12 SHTD_N O Shut Down RS232 Transceiver 13 EE_CLK I/O During Reset, this pin is input for simulation purpose. During

14 EE_DATA I/O Serial ROM data signal 15 DP I/O USB DPLUS signal 16 DM I/O USB DMINUS signal 17 VDD_3V3 P 3.3V power for USB transceiver 18 GND_3V3 P 3.3V ground 19 RESET I System Reset 20 VDD P Power 21 GND P Ground

Name Type Description

designed for 5V, 3.3V or 3V operation. VDD_232 should be connected to the same power level of the RS-232 interface. (The RS-232 input signals are always 5V~3V tolerant.)

Note: This document version only provides 5V DC characteristic information. Refer to future revisions for updates.

normal operation, this pin is Serial ROM clock

PL-2303 Product Datasheet - 5 - Document Revision 1.3

Release Date:

July, 2002

ds_pl2303_v14

Pin No.

22 TRI_STATE I Tri-State

23 LD_MD/

24 VDD_PLL P 5V power for PLL 25 GND_PLL P Ground for PLL 26 PLL_TEST I PLL test mode control 27 OSC1 I Crystal oscillator input 28 OSC2 O Crystal oscillator output

Name Type Description

This pin is referred after reset. High: RS-232 output inactive during Suspend. Low: RS-232 output tri-state during Suspend.

I/O Load Mode/SHTD

SHTD

This pin is input during reset. Pull high with a 220K resistor to indicate the heavy load USB device (500mA). Pull down with a 220K resistor to indicate the light load USB device 100mA).

After reset, this pin becomes output. It output the inverse of SHTD_N.

Type: I – Input signal O – Output signal I/O – Bi-directional signal P – Power/Ground

Supported Data Formats and Programmable Baud Rate Generator

The PL2303 USB-to-RS232 bridge controller supports versatile data formats and has a programmable baud

rate generator. The supported data formats are shown on Table 2. The programmable baud rate generator

supports baud rates up to 1.2M bps as shown in Table 3.

Table 2. Supported Data Formats

Description

Stop bits 1

1.5 2

Parity type None

Odd Even Mark Space

Data bits 5, 6, 7, 8, or 16

PL-2303 Product Datasheet - 6 - Document Revision 1.3

Release Date:

July, 2002

ds_pl2303_v14

Table 3. Baud Rate Setting

dwDTERate Baud Rate

0012C000h 1228800 000E1000h 921600 00096000h 614400 00070800h 460800 00038400h 230400 0001C200h 115200 0000E100h 57600 00009600h 38400 00007080h 28800 00004B00h 19200 00003840h 14400 00002580h 9600 00001C20h 7200 000012C0h 4800 00000E10h 3600 00000960h 2400 00000708h 1800 000004B0h 1200 00000258h 600 0000012Ch 300 00000096h 150 0000004Bh 75

External EEPROM and Device Configuration

PL-2303 allows storing the configuration data in an external EEPROM. After reset, the first two bytes of

EEPROM are checked. If the value is 067Bh, the EEPROM is valid and the contents of the EEPROM are

loaded as the chip’s default parameters. Otherwise, the chip’s default setting is used. The content of

EEPROM is shown in Table 4 below.

The Device Configuration Register is used to control some vendor-specific functions. The meaning of each

bit in Device Configuration Register is shown in Table 5. Reserved and unused pins always set to the default

value.

Table 4. EEPROM Content

Bytes Name Description

1:0 EECHK When the EEPROM is programmed, these two bytes is configured as 067B.

After reset, they will be checked for the value. If matched, the following

information will be loaded as the default parameters. 3:2 VID USB Vendor ID 5:4 PID Product ID 7:6 RN Release number (BCD)

10:8 DCR Device Configuration Register

PL-2303 Product Datasheet - 7 - Document Revision 1.3

Release Date:

July, 2002

ds_pl2303_v14

Table 5. Device Configuration Register

Name Bits Definition Default

23 RESERVED Reserved 0 22 TRI_OUT RS-232 Output Tri-state:

1: RS-232 output tri-state 0: RS-232 output in output mode

21 RW_MODE Remote Wakeup Mode:

0: When engages remote wakeup, the device issues disconnect signal

1: When engages remote wakeup, the device issues resume signal

20 WURX Enable Wake Up Trigger on RXD:

0 – Disabled; 1 – Enable Wake Up Trigger on RXD state changes.

19 WUDSR Enable Wake Up Trigger on DSR:

0 – Disabled; 1 – Enable Wake Up Trigger on DSR state changes.

18 WURI Enable Wake Up Trigger on RI:

0 – Disabled; 1 – Enable Wake Up Trigger on RI state changes.

17 WUDCD Enable Wake Up Trigger on DCD:

0 – Disabled; 1 – Enable Wake Up Trigger on DCD state changes.

16 WUCTS Enable Wake Up Trigger on CTS:

0 – Disabled;

1 – Enable Wake Up Trigger on CTS state changes. 15 RESERVED Always set to one 1 14 RESERVED Always set to zero 0 13 RESERVED Always set to zero 0 12 RW_INH Remote Wake Inhibit:

1 – Inhibit the USB Remote Wakeup function

0 – Enable the USB Remote Wakeup function

11:6 RESERVED Always set to zero 0

5:4 RTSM RTS Control Method:

00b – RTS is controlled by ControlBitMap. Signal is active low;

01 – RTS is controlled by ControlBitMap. Signal is active high;

10 – Drive RTS active when Downstream Data Buffer is NOT

EMPTY; otherwise Drive RTS inactive.

11 – Drive RTS inactive when Downstream Data Buffer is NOT

EMPTY; otherwise Drive RTS active.

3:1 RESERVED Always set to zero 0

0 RSPDM RS-232 Transceiver Shut-Down Mode:

1: Shut down the transceiver when USB SUSPEND is engaged

0: Do not shut down the transceiver even when USB SUSPEND

is engaged

0

1

0

1

0

1

PL-2303 Product Datasheet - 8 - Document Revision 1.3

Release Date:

July, 2002

ds_pl2303_v14

Electrical Characteristics

Absolute Maximum Ratings

Item Ratings Power Supply Voltage -0.3 to 6.0 V Input Voltage -0.3 to VDD+0.3 V Output Voltage -0.3 to VDD+0.3 V Storage Temperature

-55 to 150

DC Characteristics

Parameter Symbol Min Typ Max Units

Power Supply Current IDD 0.5 19 24 mA Input Voltage Low High Output Voltage Low High Schmitt Trigger Threshold Voltage*1 Negative going Positive going Output Voltage, 3.3V*2 Low High Input Leakage Current IL -1 -- 1 uA Tri-state Leakage Current Ioz -10 -- 10 uA Input Capacitance CIN -- 3 -- Pf Output Capacitance C Bi-directional Buffer Capacitance C Operating Voltage Range -- 4.75 5 5.25 V Suspend Current I

*1. RS232 pins RXD_I, RI_I, DSR_I, DCD_I, CTS_I are 5V TTL Schmitt Trigger inputs.

o

C

V

IL

V

IH

V

OL

V

OH

V

t-

V

t+

V

OL

V

OH

-- 3 -- Pf

OUT

-- 3 -- Pf

BID

-- 400 490 uA

SUS

--

0.7* VDD

--

3.5

--

2.4

--

1.10

1.87

--

0.3* V

--

0.4

--

0.4

--

DD

V V

*2. RS232 pins TXD, DTR_N, RTS_N are 3.3V tri-state outputs.

Temperature Characteristics

Parameter Symbol Min Typ Max Units

Operating Temperature -- -40 -- 85

Junction Operation Temperature TJ 0 25 115

o

C

o

C

PL-2303 Product Datasheet - 9 - Document Revision 1.3

USB Transceiver Characteristics

Parameter Symbol Min Typ Max Units

Release Date:

July, 2002

ds_pl2303_v14

Rise and Fall Times: (10%―90%)

(90%―10%)

Cross Point VCR 1.3 -- 2.0 V

Output Impedance RD 23 28 33 ohm

High Level Output VOH 2.8 -- -- V

Low Level Output VOL -- -- 0.7 V

High Level Input VIH 2.0 -- -- V

Low Level Input VIL -- -- 0.8 V

• CL: 50pf

T

R

T

F

4 4

8 8

15 15

ns ns

Clock Characteristics

Parameter Min Typ Max Units

Frequency of Operation 11.976 12.000 12.024 MHz

Clock Period 83.1 83.3 83.5 ns

Duty Cycle 45 50 55 %

Package Dimensions (28-Pin SSOP)

Millimeters Inch Symbol

Min Nom Max Min Nom Max

b 0.22 0.38 0.009 0.015 E 7.40 7.80 8.20 0.291 0.307 0.323

E1 5.00 5.30 5.60 0.197 0.209 0.220

L 0.55 0.75 0.95 0.021 0.030 0.037

R1 0.09 0.004

D 9.9 10.2 10.5 0.390 0.402 0.413 A 2.0 0.079

e 0.65 0.0256 L1 1.25 0.050 A1 0.05 0.020 A2 1.65 1.75 1.85 0.065 0.069 0.073

PL-2303 Product Datasheet - 10 - Document Revision 1.3

Outline Diagram

28

E

E1

1

Release Date:

July, 2002

ds_pl2303_v14

D

DETAIL A

A2

A

e

b

A1

R1

0.25

L

L1

PL-2303 Product Datasheet - 11 - Document Revision 1.3