Datasheet PIC32MX120F064H, PIC32MX130F128H, PIC32MX130F128L, PIC32MX230F128H, PIC32MX230F128L Datasheet
...
PIC32MX1XX/2XX/5XX 64/100-PIN
32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with
Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC (DC to 40 MHz),
-40ºC to +85ºC (DC to 50 MHz)
Core: 50 MHz/83 DMIPS MIPS32® M4K
• MIPS16e® mode for up to 40% smaller code size
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
®
Clock Management
• 0.9% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep and Idle)
• Integrated Power-on Reset, Brown-out Reset, and High
Voltage Detect
• 0.5 mA/MHz dynamic current (typical)
•44 μA IPD current (typical)
Audio/Graphics/Touch HMI Features
• External graphics interface with up to 34 PMP pins
• Audio data communication: I2S, LJ, RJ, USB
• Audio data control interface: SPI and I2C™
• Audio data master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
Advanced Analog Features
• ADC Module:
- 10-bit 1 Msps rate with one Sample and Hold (S&H)
- Up to 48 analog inputs
- Can operate during Sleep mode
• Flexible and independent ADC trigger sources
• On-chip temperature measurement capability
• Comparators:
- Three dual-input Comparator modules
- Programmable reference with 32 voltage points
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• USB 2.0-compliant Full-speed OTG controller
• Up to five UART modules (12.5 Mbps):
- LIN 1.2 protocols and IrDA® support
• Four 4-wire SPI modules (25 Mbps)
•Two I2C modules (up to 1 Mbaud) with SMBus support
• PPS to allow function remap
• Parallel Master Port (PMP) with dual read/write buffers
• Controller Area Network (CAN) 2.0B Compliant with
DeviceNet™ addressing support
Direct Memory Access (DMA)
• Four channels of hardware DMA with automatic data
size detection
• 32-bit Programmable Cyclic Redundancy Check (CRC)
• Two additional channels dedicated to USB
• Two additional channels dedicated to CAN
Input/Output
• 10 mA or 15 mA source/sink for standard VOH/VOL and
up to 22
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
mA for non-standard VOH
1
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
• In-circuit and in-application programming
•4-wire MIPS® Enhanced JTAG interface
• Unlimited program and six complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type QFN TQFP TFBGA (see Note 1)
Pin Count 64 64 100 100 100
I/O Pins (up to) 53 53 85 85 85
Contact/Lead Pitch 0.50 mm 0.50 mm 0.40 mm 0.50 mm 0.65 mm
Dimensions 9x9x0.9 mm 10x10x1 mm 12x12x1 mm 14x14x1 mm 7x7x1.2 mm
Note 1: Please contact your local Microchip Sales Office for information regarding the availability of devices in the 100-pin TFBGA package.
2014 Microchip Technology Inc. Preliminary DS60001290C-page 1
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1: PIC32MX1XX/2XX/5XX 64/100-PIN CONTROLLER FAMILY FEATURES
Remappable Peripherals
(1)
(4)
Device
PIC32MX120F064H 64
PIC32MX130F128H 64
PIC32MX130F128L
PIC32MX230F128H 64
PIC32MX230F128L
PIC32MX530F128H 64
PIC32MX530F128L
PIC32MX150F256H 64
PIC32MX150F256L
PIC32MX250F256H 64
PIC32MX250F256L
PIC32MX550F256H 64
PIC32MX550F256L
PIC32MX170F512H 64
PIC32MX170F512L
PIC32MX270F512H 64
PIC32MX270F512L
PIC32MX570F512H 64
PIC32MX570F512L
Note 1: All devices feature 3 KB of Boot Flash memory.
2: Four out of five timers are remappable.
3: Four out of five external interrupts are remappable.
4: Please contact your local Microchip Sales Office for information regarding the availability of devices in the 100-pin TFBGA package.
Pins
Packages
QFN,
TQFP
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
QFN,
TQFP
100 TQFP
100 TFBGA
Data Memory (KB)
Program Memory (KB)
64+38375/5/5435283N0Y2YY4/053YN
128+3 16 37 5/5/5 4 3 5 28 3 N 0 Y 2 Y Y 4/0 53 Y N
128+3 16 54 5/5/5 5 4 5 48 3 N 0 Y 2 Y Y 4/0 85 Y Y
128+3 16 37 5/5/5 4 3 5 28 3 Y 0 Y 2 Y Y 4/2 49 Y N
128+3 16 54 5/5/5 5 4 5 48 3 Y 0 Y 2 Y Y
128+3 16 37 5/5/5 4 3 5 28 3 Y 1 Y 2 Y Y 4/4 49 Y N
128+3 16 54 5/5/5 5 4 5 48 3 Y 1 Y 2 Y Y 4/4 81 Y Y
256+3 32 37 5/5/5 4 3 5 28 3 N 0 Y 2 Y Y 4/0 53 Y N
256+3 32 54 5/5/5 5 4 5 48 3 N 0 Y 2 Y Y 4/0 85 Y Y
256+3 32 37 5/5/5 4 3 5 28 3 Y 0 Y 2 Y Y 4/2 49 Y N
256+3 32 54 5/5/5 5 4 5 48 3 Y 0 Y 2 Y Y 4/2 81 Y Y
256+3 32 37 5/5/5 4 3 5 28 3 Y 1 Y 2 Y Y 4/4 49 Y N
256+3 32 54 5/5/5 5 4 5 48 3 Y 1 Y 2 Y Y 4/4 81 Y Y
512+3 64 37 5/5/5 4 3 5 28 3 N 0 Y 2 Y Y 4/0 53 Y N
512+3 64 54 5/5/5 5 4 5 48 3 N 0 Y 2 Y Y 4/0 85 Y Y
512+3 64 37 5/5/5 4 3 5 28 3 Y 0 Y 2 Y Y 4/2 49 Y N
512+3 64 54 5/5/5 5 4 5 48 3 Y 0 Y 2 Y Y 4/2 81 Y Y
512+3 64 37 5/5/5 4 3 5 28 3 Y 1 Y 2 Y Y 4/4 49 Y N
512+3 64 54 5/5/5 5 4 5 48 3 Y 1 Y 2 Y Y 4/4 81 Y Y
Remappable Pins
(2)
(3)
S
2
UART
SPI/I
External Interrupts
Timers/Capture/Compare
Analog Comparators
10-bit 1 Msps ADC (Channels)
CAN
USB On-The-Go (OTG)
CTMU
2
C™
I
PMP
RTCC
DMA Channels (Programmable/Dedicated)
4/2
JTAG
I/O Pins
81 Y Y
Trace
DS60001290C-page 2 Preliminary 2014 Microchip Technology Inc.
1
64
64-PIN QFN
(4)
AND TQFP (TOP VIEW)
PIC32MX120F064H
PIC32MX130F128H
PIC32MX150F256H
64
1
M
TQFP
QFN
(4)
PIC32MX170F512H
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
Device Pin Tables
TABLE 2: PIN NAMES FOR 64-PIN GENERAL PURPOSE DEVICES
Pin # Full Pin Name Pin # Full Pin Name
AN22/RPE5/PMD5/RE5
1
2 AN23/PMD6/RE6 34 RPF2/RF2
AN27/PMD7/RE7
3
4 AN16/C1IND/RPG6/SCK2/PMA5/RG6 36 SDA1/RG3
AN17/C1INC/RPG7/PMA4/RG7
5
6 AN18/C2IND/RPG8/PMA3/RG8 38 VDD
MCLR
7
8 AN19/C2INC/RPG9/PMA2/RG9 40 OSC2/CLKO/RC15
9 VSS 41 VSS
10 VDD 42 RPD8/RTCC/RD8
11 AN5/C1INA/RPB5/RB5 43 RPD9/RD9
12 AN4/C1INB/RB4 44 RPD10/PMA15/RD10
13 PGED3/AN3/C2INA/RPB3/RB3 45 RPD11/PMA14/RD11
14 PGEC3/AN2/CTCMP/C2INB/RPB2/CTED13/RB2 46 RPD0/RD0
15 PGEC1/VREF-/AN1/RPB1/CTED12/RB1 47 SOSCI/RPC13/RC13
16 PGED1/VREF+/AN0/RPB0/PMA6/RB0 48 SOSCO/RPC14/T1CK/RC14
17 PGEC2/AN6/RPB6/RB6 49 AN24/RPD1/RD1
18 PGED2/AN7/RPB7/CTED3/RB7 50 AN25/RPD2/RD2
AVDD
19
20 AV SS 52 RPD4/PMWR/RD4
AN8/RPB8/CTED10/RB8
21
22 AN9/RPB9/CTED4/PMA7/RB9 54 C3INC/RD6
TMS/CVREFOUT/AN10/RPB10/CTED11/PMA13/RB10
23
24 TDO/AN11/PMA12/RB11 56 VCAP
VSS
25
26 VDD 58 C3INA/RPF0/RF0
27 TCK/AN12/PMA11/RB12 59 TRCLK/RPF1/RF1
28 TDI/AN13/PMA10/RB13 60 TRD0/PMD0/RE0
29 AN14/RPB14/SCK3/CTED5/PMA1/RB14 61 TRD1/PMD1/RE1
30 AN15/RPB15/OCFB/CTED6/PMA0/RB15 62 TRD2/AN20/PMD2/RE2
31 RPF4/SDA2/PMA9/RF4 63 TRD3/RPE3/CTPLS/PMD3/RE3
32 RPF5/SCL2/PMA8/RF5 64 AN21/PMD4/RE4
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral Pin
Select” for restrictions.
2: Every I/O port pin (RAx-RGx) can be used as a change notification pin (CNAx-CNGx). See Section 11.0 “I/O Ports” for more information.
3: Shaded pins are 5V tolerant.
4: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
RPF3/RF3
33
RPF6/SCK1/INT0/RF6
35
SCL1/RG2
37
OSC1/CLKI/RC12
39
AN26/C3IND/RPD3/RD3
51
RPD5/PMRD/RD5
53
C3INB/RD7
55
VDD
57
2014 Microchip Technology Inc. Preliminary DS60001290C-page 3
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
1
64
64-PIN QFN
(4)
AND TQFP (TOP VIEW)
PIC32MX530F128H
PIC32MX250F256H
PIC32MX270F512H
64
1
M
TQFP
QFN
(4)
PIC32MX550F256H
PIC32MX570F512H
PIC32MX230F128H
TABLE 3: PIN NAMES FOR 64-PIN USB DEVICES
Pin # Full Pin Name Pin # Full Pin Name
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral Pin
AN22/RPE5/PMD5/RE5
1
2 AN23/PMD6/RE6 34 VBUS
AN27/PMD7/RE7
3
4 AN16/C1IND/RPG6/SCK2/PMA5/RG6 36 D-
AN17/C1INC/RPG7/PMA4/RG7
5
6 AN18/C2IND/RPG8/PMA3/RG8 38 VDD
MCLR
7
8 AN19/C2INC/RPG9/PMA2/RG9 40 OSC2/CLKO/RC15
9 VSS 41 VSS
10 VDD 42 RPD8/RTCC/RD8
11 AN5/C1INA/RPB5/VBUSON/RB5 43 RPD9/SDA1/RD9
12 AN4/C1INB/USBOEN/RB4 44 RPD10/SCL1/PMA15/RD10
13 PGED3/AN3/C2INA/RPB3/RB3 45 RPD11/PMA14/RD11
14 PGEC3/AN2/CTCMP/C2INB/RPB2/CTED13/RB2 46 RPD0/INT0/RD0
15 PGEC1/VREF-/AN1/RPB1/CTED12/RB1 47 SOSCI/RPC13/RC13
16 PGED1/VREF+/AN0/RPB0/PMA6/RB0 48 SOSCO/RPC14/T1CK/RC14
17 PGEC2/AN6/RPB6/RB6 49 AN24/RPD1/RD1
18 PGED2/AN7/RPB7/CTED3/RB7 50 AN25/RPD2/SCK1/RD2
AVDD
19
20 AV SS 52 RPD4/PMWR/RD4
AN8/RPB8/CTED10/RB8
21
22 AN9/RPB9/CTED4/PMA7/RB9 54 C3INC/RD6
TMS/CVREFOUT/AN10/RPB10/CTED11/PMA13/RB10
23
24 TDO/AN11/PMA12/RB11 56 VCAP
VSS
25
26 VDD 58 C3INA/RPF0/RF0
27 TCK/AN12/PMA11/RB12 59 TRCLK/RPF1/RF1
28 TDI/AN13/PMA10/RB13 60 TRD0/PMD0/RE0
29 AN14/RPB14/SCK3/CTED5/PMA1/RB14 61 TRD1/PMD1/RE1
30 AN15/RPB15/OCFB/CTED6/PMA0/RB15 62 TRD2/AN20/PMD2/RE2
31 RPF4/SDA2/PMA9/RF4 63 TRD3/RPE3/CTPLS/PMD3/RE3
32 RPF5/SCL2/PMA8/RF5 64 AN21/PMD4/RE4
Select” for restrictions.
2: Every I/O port pin (RAx-RGx) can be used as a change notification pin (CNAx-CNGx). See Section 11.0 “I/O Ports” for more information.
3: Shaded pins are 5V tolerant.
4: The metal plane at the bottom of the QFN device is not connected to any pins and is recommended to be connected to VSS externally.
USBID/RPF3/RF3
33
VUSB3V3
35
D+
37
OSC1/CLKI/RC12
39
AN26/C3IND/RPD3/RD3
51
RPD5/PMRD/RD5
53
C3INB/RD7
55
VDD
57
DS60001290C-page 4 Preliminary 2014 Microchip Technology Inc.
TABLE 4: PIN NAMES FOR 100-PIN GENERAL PURPOSE DEVICES
1
100
100-PIN TQFP (TOP VIEW)
PIC32MX130F128L
PIC32MX170F512L
PIC32MX150F256L
Pin # Full Pin Name Pin # Full Pin Name
AN28/RG15
1
2VDD 37 VDD
AN22/RPE5/PMD5/RE5
3
4 AN23/PMD6/RE6 39 AN34/RPF13/SCK3/RF13
AN27/PMD7/RE7
5
6 AN29/RPC1/RC1 41 AN12/PMA11/RB12
AN30/RPC2/RC2
7
8 AN31/RPC3/RC3 43 AN14/RPB14/CTED5/PMA1/RB14
9 RPC4/CTED7/RC4 44 AN15/RPB15/OCFB/CTED6/PMA0/RB15
10 AN16/C1IND/RPG6/SCK2/PMA5/RG6 45 V
11 AN17/C1INC/RPG7/PMA4/RG7 46 VDD
12 AN18/C2IND/RPG8/PMA3/RG8 47 AN36/RPD14/RD14
13 MCLR 48 AN37/RPD15/SCK4/RD15
14 AN19/C2INC/RPG9/PMA2/RG9
SS 50 RPF5/PMA8/RF5
15 V
V
DD
16
TMS/CTED1/RA0
17
18 AN32/RPE8/RE8 53 AN39/RPF8/RF8
AN33/RPE9/RE9
19
20 AN5/C1INA/RPB5/RB5
AN4/C1INB/RB4
21
22 PGED3/AN3/C2INA/RPB3/RB3
PGEC3/AN2/CTCMP/C2INB/RPB2/CTED13/RB2
23
24 PGEC1/AN1/RPB1/CTED12/RB1
25 PGED1/AN0/RPB0/RB0
26 PGEC2/AN6/RPB6/RB6 61 TDO/RA5
27 PGED2/AN7/RPB7/CTED3/RB7 62 V
28 VREF-/PMA7/RA9 63 OSC1/CLKI/RC12
REF+/PMA6/RA10 64 OSC2/CLKO/RC15
29 V
30 AV
DD 65 VSS
31 AVSS 66 RPA14/RA14
32 AN8/RPB8/CTED10/RB8
33 AN9/RPB9/CTED4/RB9
CV
REFOUT/AN10/RPB10/CTED11/PMA13/RB10
34
35 AN11/PMA12/RB11
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral Pin
Select” for restrictions.
2: Every I/O port pin (RAx-RGx) can be used as a change notification pin (CNAx-CNGx). See Section 11.0 “I/O Ports” for more
information.
3: Shaded pins are 5V tolerant.
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
SS
V
36
TCK/CTED2/RA1
38
AN35/RPF12/RF12
40
AN13/PMA10/RB13
42
SS
49 RPF4/PMA9/RF4
RPF3/RF3
51
AN38/RPF2/RF2
52
RPF7/RF7
54
55 RPF6/SCK1/INT0/RF6
SDA1/RG3
56
57 SCL1/RG2
SCL2/RA2
58
59 SDA2/RA3
60 TDI/CTED9/RA4
DD
67 RPA15/RA15
68 RPD8/RTCC/RD8
RPD9/RD9
69
70 RPD10/PMA15/RD10
2014 Microchip Technology Inc. Preliminary DS60001290C-page 5
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
1
100
100-PIN TQFP (TOP VIEW)
PIC32MX130F128L
PIC32MX170F512L
PIC32MX150F256L
TABLE 4: PIN NAMES FOR 100-PIN GENERAL PURPOSE DEVICES (CONTINUED)
Pin # Full Pin Name Pin # Full Pin Name
71 RPD11/PMA14/RD11 86 VDD
72 RPD0/RD0 87 AN44/C3INA/RPF0/PMD11/RF0
SOSCI/RPC13/RC13
73
74 SOSCO/RPC14/T1CK/RC14
V
SS
75
76 AN24/RPD1/RD1
77 AN25/RPD2/RD2
78 AN26/C3IND/RPD3/RD3 93 AN46/PMD0/RE0
79 AN40/RPD12/PMD12/RD12 94 AN47/PMD1/RE1
80 AN41/PMD13/RD13
81 RPD4/PMWR/RD4 96 TRD1/RG12
RPD5/PMRD/RD5
82
83 AN42/C3INC/PMD14/RD6 98 AN20/PMD2/RE2
84 AN43/C3INB/PMD15/RD7
CAP 100 AN21/PMD4/RE4
85 V
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral Pin
Select” for restrictions.
2: Every I/O port pin (RAx-RGx) can be used as a change notification pin (CNAx-CNGx). See Section 11.0 “I/O Ports” for more
information.
3: Shaded pins are 5V tolerant.
AN45/RPF1/PMD10/RF1
88
89 RPG1/PMD9/RG1
RPG0/PMD8/RG0
90
91 TRCLK/RA6
92 TRD3/CTED8/RA7
95 TRD2/RG14
TRD0/RG13
97
99 RPE3/CTPLS/PMD3/RE3
DS60001290C-page 6 Preliminary 2014 Microchip Technology Inc.
TABLE 5: PIN NAMES FOR 100-PIN USB DEVICES
1
100
100-PIN TQFP (TOP VIEW)
PIC32MX530F128L
PIC32MX250F256L
PIC32MX270F512L
PIC32MX550F256L
PIC32MX570F512L
PIC32MX230F128L
Pin # Full Pin Name Pin # Full Pin Name
AN28/RG15
1
2VDD 37 VDD
AN22/RPE5/PMD5/RE5
3
4 AN23/PMD6/RE6 39 AN34/RPF13/SCK3/RF13
AN27/PMD7/RE7
5
6 AN29/RPC1/RC1 41 AN12/PMA11/RB12
AN30/RPC2/RC2
7
8 AN31/RPC3/RC3 43 AN14/RPB14/CTED5/PMA1/RB14
9 RPC4/CTED7/RC4 44 AN15/RPB15/OCFB/CTED6/PMA0/RB15
10 AN16/C1IND/RPG6/SCK2/PMA5/RG6 45 V
11 AN17/C1INC/RPG7/PMA4/RG7 46 VDD
12 AN18/C2IND/RPG8/PMA3/RG8 47 AN36/RPD14/RD14
13 MCLR 48 AN37/RPD15/SCK4/RD15
14 AN19/C2INC/RPG9/PMA2/RG9
SS 50 RPF5/PMA8/RF5
15 V
V
DD
16
TMS/CTED1/RA0
17
18 AN32/RPE8/RE8 53 AN39/RPF8/RF8
AN33/RPE9/RE9
19
20 AN5/C1INA/RPB5/VBUSON/RB5 55 VUSB3V3
AN4/C1INB/USBOEN/RB4
21
22 PGED3/AN3/C2INA/RPB3/RB3 57 D+
PGEC3/AN2/CTCMP/C2INB/RPB2/CTED13/RB2
23
24 PGEC1/AN1/RPB1/CTED12/RB1
25 PGED1/AN0/RPB0/RB0
26 PGEC2/AN6/RPB6/RB6 61 TDO/RA5
27 PGED2/AN7/RPB7/CTED3/RB7 62 V
28 VREF-/PMA7/RA9 63 OSC1/CLKI/RC12
REF+/PMA6/RA10 64 OSC2/CLKO/RC15
29 V
30 AV
DD 65 VSS
31 AVSS 66 RPA14/SCL1/RA14
32 AN8/RPB8/CTED10/RB8
33 AN9/RPB9/CTED4/RB9
CV
REFOUT/AN10/RPB10/CTED11/PMA13/RB10
34
35 AN11/PMA12/RB11
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral Pin
Select” for restrictions.
2: Every I/O port pin (RAx-RGx) can be used as a change notification pin (CNAx-CNGx). See Section 11.0 “I/O Ports” for more
information.
3: Shaded pins are 5V tolerant.
2014 Microchip Technology Inc. Preliminary DS60001290C-page 7
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
SS
V
36
TCK/CTED2/RA1
38
AN35/RPF12/RF12
40
AN13/PMA10/RB13
42
SS
49 RPF4/PMA9/RF4
USBID/RPF3/RF3
51
AN38/RPF2/RF2
52
V
BUS
54
D-
56
SCL2/RA2
58
59 SDA2/RA3
60 TDI/CTED9/RA4
DD
67 RPA15/SDA1/RA15
68 RPD8/RTCC/RD8
RPD9/RD9
69
70 RPD10/SCK1/PMA15/RD10
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
1
100
100-PIN TQFP (TOP VIEW)
PIC32MX530F128L
PIC32MX250F256L
PIC32MX270F512L
PIC32MX550F256L
PIC32MX570F512L
PIC32MX230F128L
TABLE 5: PIN NAMES FOR 100-PIN USB DEVICES (CONTINUED)
Pin # Full Pin Name Pin # Full Pin Name
71 RPD11/PMA14/RD11 86 VDD
72 RPD0/INT0/RD0 87 AN44/C3INA/RPF0/PMD11/RF0
SOSCI/RPC13/RC13
73
74 SOSCO/RPC14/T1CK/RC14
V
SS
75
76 AN24/RPD1/RD1
77 AN25/RPD2/RD2
78 AN26/C3IND/RPD3/RD3 93 AN46/PMD0/RE0
79 AN40/RPD12/PMD12/RD12 94 AN47/PMD1/RE1
80 AN41/PMD13/RD13
81 RPD4/PMWR/RD4 96 TRD1/RG12
RPD5/PMRD/RD5
82
83 AN42/C3INC/PMD14/RD6 98 AN20/PMD2/RE2
84 AN43/C3INB/PMD15/RD7
CAP 100 AN21/PMD4/RE4
85 V
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral Pin
Select” for restrictions.
2: Every I/O port pin (RAx-RGx) can be used as a change notification pin (CNAx-CNGx). See Section 11.0 “I/O Ports” for more
information.
3: Shaded pins are 5V tolerant.
AN45/RPF1/PMD10/RF1
88
89 RPG1/PMD9/RG1
RPG0/PMD8/RG0
90
91 TRCLK/RA6
92 TRD3/CTED8/RA7
95 TRD2/RG14
TRD0/RG13
97
99 RPE3/CTPLS/PMD3/RE3
DS60001290C-page 8 Preliminary 2014 Microchip Technology Inc.
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
Table of Contents
1.0 Device Overview ........................................................................................................................................................................ 13
2.0 Guidelines for Getting Started with 32-bit MCUs........................................................................................................................ 25
3.0 CPU............................................................................................................................................................................................ 35
4.0 Memory Organization ................................................................................................................................................................. 39
5.0 Interrupt Controller ..................................................................................................................................................................... 51
6.0 Flash Program Memory .............................................................................................................................................................. 61
7.0 Resets ........................................................................................................................................................................................ 67
8.0 Oscillator Configuration .............................................................................................................................................................. 71
9.0 Direct Memory Access (DMA) Controller ................................................................................................................................... 83
10.0 USB On-The-Go (OTG)............................................................................................................................................................ 103
11.0 I/O Ports ................................................................................................................................................................................... 127
12.0 Timer1 ...................................................................................................................................................................................... 157
13.0 Timer2/3, Timer4/5 ................................................................................................................................................................... 161
14.0 Watchdog Timer (WDT) ........................................................................................................................................................... 167
15.0 Input Capture............................................................................................................................................................................ 171
16.0 Output Compare....................................................................................................................................................................... 175
17.0 Serial Peripheral Interface (SPI)............................................................................................................................................... 179
18.0 Inter-Integrated Circuit™ (I2C™).............................................................................................................................................. 189
19.0 Universal Asynchronous Receiver Transmitter (UART) ........................................................................................................... 197
20.0 Parallel Master Port (PMP)....................................................................................................................................................... 205
21.0 Real-Time Clock and Calendar (RTCC)................................................................................................................................... 219
22.0 10-bit Analog-to-Digital Converter (ADC) ................................................................................................................................. 229
23.0 Controller Area Network (CAN) ................................................................................................................................................ 241
24.0 Comparator .............................................................................................................................................................................. 277
25.0 Comparator Voltage Reference (CVREF) ................................................................................................................................. 281
26.0 Charge Time Measurement Unit (CTMU) ............................................................................................................................... 285
27.0 Power-Saving Features ........................................................................................................................................................... 291
28.0 Special Features ...................................................................................................................................................................... 297
29.0 Instruction Set .......................................................................................................................................................................... 309
30.0 Development Support............................................................................................................................................................... 311
31.0 40 MHz Electrical Characteristics............................................................................................................................................. 315
32.0 50 MHz Electrical Characteristics............................................................................................................................................. 359
33.0 DC and AC Device Characteristics Graphs.............................................................................................................................. 365
34.0 Packaging Information.............................................................................................................................................................. 367
The Microchip Web Site ..................................................................................................................................................................... 383
Customer Change Notification Service .............................................................................................................................................. 383
Customer Support.............................................................................................................................................................................. 383
Product Identification System ............................................................................................................................................................ 384
2014 Microchip Technology Inc. Preliminary DS60001290C-page 9
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision
of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are
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docerrors@microchip.com. We welcome your feedback.
http://www.microchip.com
DS60001290C-page 10 Preliminary 2014 Microchip Technology Inc.
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
Referenced Sources
This device data sheet is based on the following
individual sections of the “PIC32 Family Reference
Manual”. These documents should be considered as
the general reference for the operation of a particular
module or device feature.
Note: To access the documents listed below,
browse to the documentation section of
the Microchip web site
(www.microchip.com).
• Section 1. “Introduction” (DS60001127)
• Section 2. “CPU” (DS60001113)
• Section 3. “Memory Organization” (DS60001115)
• Section 5. “Flash Program Memory” (DS60001121)
• Section 6. “Oscillator Configuration” (DS60001112)
• Section 7. “Resets” (DS60001118)
• Section 8. “Interrupt Controller” (DS60001108)
• Section 9. “Watchdog Timer and Power-up Timer” (DS60001114)
• Section 10. “Power-Saving Features” (DS60001130)
• Section 12. “I/O Ports” (DS60001120)
• Section 13. “Parallel Master Port (PMP)” (DS60001128)
• Section 14. “Timers” (DS60001105)
• Section 15. “Input Capture” (DS60001122)
• Section 16. “Output Compare” (DS60001111)
• Section 17. “10-bit Analog-to-Digital Converter (ADC)” (DS60001104)
• Sect i o n 19 . “Comparator” (DS60001110)
• Section 20. “Comparator Voltage Reference (CV
• Section 21. “Universal Asynchronous Receiver Transmitter (UART)” (DS60001107)
• Section 23. “Serial Peripheral Interface (SPI)” (DS60001106)
• Section 24. “Inter-Integrated Circuit™ (I
• Section 27. “USB On-The-Go (OTG)” (DS60001126)
• Section 29. “Real-Time Clock and Calendar (RTCC)” (DS60001125)
• Section 31. “Direct Memory Access (DMA) Controller” (DS60001117)
• Section 32. “Configuration” (DS60001124)
• Section 33. “Programming and Diagnostics” (DS60001129)
• Section 34. “Controller Area Network (CAN)” (DS60001123)
• Section 37. “Charge Time Measurement Unit (CTMU)” (DS60001167)
REF)” (DS60001109)
2
C™)” (DS60001116)
2014 Microchip Technology Inc. Preliminary DS60001290C-page 11
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
NOTES:
DS60001290C-page 12 Preliminary 2014 Microchip Technology Inc.
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
Note: Not all features are available on all devices. Refer to TABLE 1: “PIC32MX1XX/2XX/5XX 64/100-pin Controller
Family Features” for the list of features by device.
UART1-5
Comparators
PORTA/CNA
PORTD/CND
PORTE/CNE
PORTF/CNF
PORTG/CNG
PORTB/CNB
JTAG
Priority
DMAC ICD
MIPS32
®
M4K® CPU Core
IS DS
EJTAG INT
Bus Matrix
Data RAM
Peripheral Bridge
128
128-bit wide
Flash
32
32
32
32
Peripheral Bus Clocked by PBCLK
Program Flash Memory
Controller
32
32
32
Interrupt
Controller
BSCAN
PORTC/CNC
PMP
I2C1,2
SPI1-4
IC1-5
PWM
OC1-5
OSC1/CLKI
OSC2/CLKO
V
DD,
Timing
Generation
V
SS
MCLR
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Precision
Reference
Band Gap
FRC/LPRC
Oscillators
Regulator
Voltage
VCAP
OSC/SOSC
Oscillators
PLL
DIVIDERS
SYSCLK
PBCLK
Peripheral Bus Clocked by SYSCLK
USB
PLL-USB
USBCLK
32
RTCC
10-bit ADC
Timer1-5
32
32
Remappable
Pins
CTMU
1-3
CAN
32
1.0 DEVICE OVERVIEW
This document contains device-specific information for
PIC32MX1XX/2XX/5XX 64/100-pin devices.
Note 1: This data sheet summarizes the features
of the PIC32MX1XX/2XX/5XX 64/100pin family of devices. It is not intended to
be a comprehensive reference source.
To complement the information in this
data sheet, refer to the related section of
Figure 1-1 illustrates a general block diagram of the
core and peripheral modules in the PIC32MX1XX/2XX/
5XX 64/100-pin family of devices.
Table 1-1 lists the functions of the various pins shown
in the pinout diagrams.
the “PIC32 Family Reference Manual”,
which is available from the Microchip
site (www.microchip.com/PIC32).
web
FIGURE 1-1: PIC32MX1XX/2XX/5XX 64/100-PIN BLOCK DIAGRAM
2014 Microchip Technology Inc. Preliminary DS60001290C-page 13
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS
Pin Number
Pin Name
AN0 16 25 I Analog
AN1 15 24 I Analog
AN2 14 23 I Analog
AN3 13 22 I Analog
AN4 12 21 I Analog
AN5 11 20 I Analog
AN6 17 26 I Analog
AN7 18 27 I Analog
AN8 21 32 I Analog
AN9 22 33 I Analog
AN10 23 34 I Analog
AN11 24 35 I Analog
AN12 27 41 I Analog
AN13 28 42 I Analog
AN14 29 43 I Analog
AN15 30 44 I Analog
AN16 4 10 I Analog
AN17 5 11 I Analog
AN18 6 12 I Analog
AN19 8 14 I Analog
AN20 62 98 I Analog
AN21 64 100 I Analog
AN22 1 3 I Analog
AN23 2 4 I Analog
AN24 49 76 I Analog
AN25 50 77 I Analog
AN26 51 78 I Analog
AN27 3 5 I Analog
AN28 — 1 I Analog
AN29 — 6 I Analog
AN30 — 7 I Analog
AN31 — 8 I Analog
AN32 — 18 I Analog
AN33 — 19 I Analog
AN34 — 39 I Analog
AN35 — 40 I Analog
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
Pin
Type
Buffer
Type
Description
Analog input channels.
2014 Microchip Technology Inc. Preliminary DS60001290C-page 14
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
AN36 — 47 I Analog
AN37 — 48 I Analog
AN38 — 52 I Analog
AN39 — 53 I Analog
AN40 — 79 I Analog
AN41 — 80 I Analog
AN42 — 83 I Analog
AN43 — 84 I Analog
AN44 — 87 I Analog
AN45 — 88 I Analog
AN46 — 93 I Analog
AN47 — 94 I Analog
CLKI 39 63 I ST/CMOS
CLKO 40 64 O —
OSC1 39 63 I ST/CMOS
OSC2 40 64 O —
SOSCI 47 73 I ST/CMOS
SOSCO 48 74 O — 32.768 kHz low-power oscillator crystal output.
IC1 PPS PPS I ST
IC2 PPS PPS I ST
IC3 PPS PPS I ST
IC4 PPS PPS I ST
IC5 PPS PPS I ST
OC1 PPS PPS O ST Output Compare Output 1
OC2 PPS PPS O ST Output Compare Output 2
OC3 PPS PPS O ST Output Compare Output 3
OC4 PPS PPS O ST Output Compare Output 4
OC5 PPS PPS O ST Output Compare Output 5
OCFA PPS PPS I ST Output Compare Fault A Input
OCFB 30 44 I ST Output Compare Fault B Input
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
Pin
Type
Buffer
Type
Description
Analog input channels.
External clock source input. Always associated with OSC1 pin
function.
Oscillator crystal output. Connects to crystal or resonator in
Crystal Oscillator mode. Optionally functions as CLKO in RC
and EC modes. Always associated with the OSC2 pin
function.
Oscillator crystal input. ST buffer when configured in RC
mode; CMOS otherwise.
Oscillator crystal output. Connects to crystal or resonator in
Crystal Oscillator mode. Optionally functions as CLKO in RC
and EC modes.
32.768 kHz low-power oscillator crystal input; CMOS
otherwise.
Capture Input 1-5
2014 Microchip Technology Inc. Preliminary DS60001290C-page 15
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
INT0 35
INT1 PPS PPS I ST External Interrupt 1
INT2 PPS PPS I ST External Interrupt 2
INT3 PPS PPS I ST External Interrupt 3
INT4 PPS PPS I ST External Interrupt 4
RA0 — 17 I/O ST
RA1 — 38 I/O ST
RA2 — 58 I/O ST
RA3 — 59 I/O ST
RA4 — 60 I/O ST
RA5 — 61 I/O ST
RA6 — 91 I/O ST
RA7 — 92 I/O ST
RA9 — 28 I/O ST
RA10 — 29 I/O ST
RA14 — 66 I/O ST
RA15 — 67 I/O ST
RB0 16 25 I/O ST
RB1 15 24 I/O ST
RB2 14 23 I/O ST
RB3 13 22 I/O ST
RB4 12 21 I/O ST
RB5 11 20 I/O ST
RB6 17 26 I/O ST
RB7 18 27 I/O ST
RB8 21 32 I/O ST
RB9 22 33 I/O ST
RB10 23 34 I/O ST
RB11 24 35 I/O ST
RB12 27 41 I/O ST
RB13 28 42 I/O ST
RB14 29 43 I/O ST
RB15 30 44 I/O ST
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
(1)
, 46
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
(2)55(1)
, 72
Pin
Type
(2)
Buffer
Type
I ST External Interrupt 0
PORTA is a bidirectional I/O port
PORTB is a bidirectional I/O port
Description
2014 Microchip Technology Inc. Preliminary DS60001290C-page 16
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
RC1 — 6 I/O ST
RC2 — 7 I/O ST
RC3 — 8 I/O ST
RC4 — 9 I/O ST
RC12 39 63 I/O ST
RC13 47 73 I/O ST
RC14 48 74 I/O ST
RC15 40 64 I/O ST
RD0 46 72 I/O ST
RD1 49 76 I/O ST
RD2 50 77 I/O ST
RD3 51 78 I/O ST
RD4 52 81 I/O ST
RD5 53 82 I/O ST
RD6 54 83 I/O ST
RD7 55 84 I/O ST
RD8 42 68 I/O ST
RD9 43 69 I/O ST
RD10 44 70 I/O ST
RD11 45 71 I/O ST
RD12 — 79 I/O ST
RD13 — 80 I/O ST
RD14 — 47 I/O ST
RD15 — 48 I/O ST
RE0 60 93 I/O ST
RE1 61 94 I/O ST
RE2 62 98 I/O ST
RE3 63 99 I/O ST
RE4 64 100 I/O ST
RE5 1 3 I/O ST
RE6 2 4 I/O ST
RE7 3 5 I/O ST
RE8 — 18 I/O ST
RE9 — 19 I/O ST
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
Pin
Type
Buffer
Type
Description
PORTC is a bidirectional I/O port
PORTD is a bidirectional I/O port
PORTE is a bidirectional I/O port
2014 Microchip Technology Inc. Preliminary DS60001290C-page 17
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
64-pin
QFN/
TQFP
100-pin
TQFP
Pin
Type
RF0 58 87 I/O ST
RF1 59 88 I/O ST
RF2 34
(3)
52 I/O ST
RF3 33 51 I/O ST
RF4 31 49 I/O ST
RF5 32 50 I/O ST
RF6 35
(1)
RF7 — 54
55
(1)
(4)
I/O ST
I/O ST
RF8 — 53 I/O ST
RF12 — 40 I/O ST
RF13 — 39 I/O ST
RG0 — 90 I/O ST
RG1 — 89 I/O ST
RG2 37
RG3 36
(1)
(1)
57
56
(1)
(1)
I/O ST
I/O ST
RG6 4 10 I/O ST
RG7 5 11 I/O ST
RG8 6 12 I/O ST
RG9 8 14 I/O ST
RG12 — 96 I/O ST
RG13 — 97 I/O ST
RG14 — 95 I/O ST
RG15 — 1 I/O ST
T1CK 48 74 I ST Timer1 External Clock Input
T2CK PPS PPS I ST Timer2 External Clock Input
T3CK PPS PPS I ST Timer3 External Clock Input
T4CK PPS PPS I ST Timer4 External Clock Input
T5CK PPS PPS I ST Timer5 External Clock Input
U1CTS
U1RTS
PPS PPS I ST UART1 Clear to Send
PPS PPS O — UART1 Ready to Send
U1RX PPS PPS I ST UART1 Receive
U1TX PPS PPS O — UART1 Transmit
U2CTS
U2RTS
PPS PPS I ST UART2 Clear to Send
PPS PPS O — UART2 Ready to Send
U2RX PPS PPS I ST UART2 Receive
U2TX PPS PPS O — UART2 Transmit
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
Buffer
Type
Description
PORTF is a bidirectional I/O port
PORTG is a bidirectional I/O port
2014 Microchip Technology Inc. Preliminary DS60001290C-page 18
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
64-pin
QFN/
TQFP
100-pin
TQFP
Pin
Type
U3CTS PPS PPS I ST UART3 Clear to Send
U3RTS
PPS PPS O — UART3 Ready to Send
U3RX PPS PPS I ST UART3 Receive
U3TX PPS PPS O — UART3 Transmit
U4CTS
U4RTS
PPS PPS I ST UART4 Clear to Send
PPS PPS O — UART4 Ready to Send
U4RX PPS PPS I ST UART4 Receive
U4TX PPS PPS O — UART4 Transmit
U5CTS
U5RTS
— PPS I ST UART5 Clear to Send
— PPS O — UART5 Ready to Send
U5RX — PPS I ST UART5 Receive
U5TX — PPS O — UART5 Transmit
SCK1 35
, 50
(2)55(1)
, 70
(2)
I/O ST Synchronous Serial Clock Input/Output for SPI1
(1)
SDI1 PPS PPS I — SPI1 Data In
SDO1 PPS PPS O ST SPI1 Data Out
SS1
PPS PPS I/O — SPI1 Slave Synchronization for Frame Pulse I/O
SCK2 4 10 I/O ST Synchronous Serial Clock Input/Output for SPI2
SDI2 PPS PPS I — SPI2 Data In
SDO2 PPS PPS O ST SPI2 Data Out
SS2
PPS PPS I/O — SPI2 Slave Synchronization for Frame Pulse I/O
SCK3 29 39 I/O ST Synchronous Serial Clock Input/Output for SPI3
SDI3 PPS PPS I — SPI3 Data In
SDO3 PPS PPS O ST SPI3 Data Out
SS3
PPS PPS I/O — SPI3 Slave Synchronization for Frame Pulse I/O
SCK4 — 48 I/O ST Synchronous Serial Clock Input/Output for SPI4
SDI4 — PPS I — SPI4 Data In
SDO4 — PPS O ST SPI4 Data Out
SS4
SCL1 37
SDA1 36
— PPS I/O — SPI4 Slave Synchronization for Frame Pulse I/O
(1)
(1)
, 44
, 43
(2)57(1)
(2)56(1)
, 66
, 67
(2)
I/O ST Synchronous Serial Clock Input/Output for I2C1
(2)
I/O ST Synchronous Serial Data Input/Output for I2C1
SCL2 32 58 I/O ST Synchronous Serial Clock Input/Output for I2C2
SDA2 31 59 I/O ST Synchronous Serial Data Input/Output for I2C2
TMS 23 17 I ST JTAG Test Mode Select Pin
TCK 27 38 I ST JTAG Test Clock Input Pin
TDI 28 60 I — JTAG Test Clock Input Pin
TDO 24 61 O — JTAG Test Clock Output Pin
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
Buffer
Type
Description
2014 Microchip Technology Inc. Preliminary DS60001290C-page 19
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
RTCC 42 68 O — Real-Time Clock Alarm Output
CV
REFOUT 23 34 O Analog Comparator Voltage Reference (Output)
C1INA 11 20 I Analog
C1INB 12 21 I Analog
C1INC 5 11 I Analog
C1IND 4 10 I Analog
C2INA 13 22 I Analog
C2INB 14 23 I Analog
C2INC 8 14 I Analog
C2IND 6 12 I Analog
C3INA 58 87 I Analog
C3INB 55 84 I Analog
C3INC 54 83 I Analog
C3IND 51 78 I Analog
C1OUT PPS PPS O — Comparator 1 Output
C2OUT PPS PPS O — Comparator 2 Output
C3OUT PPS PPS O — Comparator 3 Output
PMALL 30 44 O TTL/ST Parallel Master Port Address Latch Enable Low Byte
PMALH 29 43 O TTL/ST Parallel Master Port Address Latch Enable High Byte
PMA0 30 44 O TTL/ST
PMA1 29 43 O TTL/ST
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
Pin
Type
Buffer
Type
Description
Comparator 1 Inputs
Comparator 2 Inputs
Comparator 3 Inputs
Parallel Master Port Address bit 0 Input (Buffered Slave
modes) and Output (Master modes)
Parallel Master Port Address bit 0 Input (Buffered Slave
modes) and Output (Master modes)
2014 Microchip Technology Inc. Preliminary DS60001290C-page 20
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
PMA2 8 14 O TTL/ST
PMA3 6 12 O TTL/ST
PMA4 5 11 O TTL/ST
PMA5 4 10 O TTL/ST
PMA6 16 29 O TTL/ST
PMA7 22 28 O TTL/ST
PMA8 32 50 O TTL/ST
PMA9 31 49 O TTL/ST
PMA10 28 42 O TTL/ST
PMA11 27 41 O TTL/ST
PMA12 24 35 O TTL/ST
PMA13 23 34 O TTL/ST
PMA14 45 71 O TTL/ST
PMA15 44 70 O TTL/ST
PMCS1 45 71 O TTL/ST
PMCS2 44 70 O TTL/ST
PMD0 60 93 I/O TTL/ST
PMD1 61 94 I/O TTL/ST
PMD2 62 98 I/O TTL/ST
PMD3 63 99 I/O TTL/ST
PMD4 64 100 I/O TTL/ST
PMD5 1 3 I/O TTL/ST
PMD6 2 4 I/O TTL/ST
PMD7 3 5 I/O TTL/ST
PMD8 — 90 I/O TTL/ST
PMD9 — 89 I/O TTL/ST
PMD10 — 88 I/O TTL/ST
PMD11 — 87 I/O TTL/ST
PMD12 — 79 I/O TTL/ST
PMD13 — 80 I/O TTL/ST
PMD14 — 83 I/O TTL/ST
PMD15 — 84 I/O TTL/ST
PMRD 53 82 O — Parallel Master Port Read Strobe
PMWR 52 81 O — Parallel Master Port Write Strobe
(2)
V
BUS
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
34 54 I Analog USB Bus Power Monitor
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
Pin
Type
Buffer
Type
Description
Parallel Master Port data (Demultiplexed Master mode) or
Address/Data (Multiplexed Master modes)
Parallel Master Port data (Demultiplexed Master mode) or
Address/Data (Multiplexed Master modes)
2014 Microchip Technology Inc. Preliminary DS60001290C-page 21
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
VUSB3V3
VBUSON
(2)
D+
(2)
D-
USBID
USBOEN 12 21 O TTL/ST USB D+, D- active status (see UOEMON bit in Register 10-20)
PGED1 16 25 I/O ST
PGEC1 15 24 I ST
PGED2 18 27 I/O ST
PGEC2 17 26 I ST
PGED3 13 22 I/O ST
PGEC3 14 23 I ST
TRCLK — 91 O — Trace clock
TRD0 — 97 O — Trace Data bit 0
TRD1 — 96 O — Trace Data bit 1
TRD2 — 95 O — Trace Data bit 2
TRD3 — 92 O — Trace Data bit 3
CTED1 — 17 I ST CTMU External Edge Input 1
CTED2 — 38 I ST CTMU External Edge Input 2
CTED3 18 27 I ST CTMU External Edge Input 3
CTED4 22 33 I ST CTMU External Edge Input 4
CTED5 29 43 I ST CTMU External Edge Input 5
CTED6 30 44 I ST CTMU External Edge Input 6
CTED7 — 9 I ST CTMU External Edge Input 7
CTED8 — 92 I ST CTMU External Edge Input 8
CTED9 — 60 I ST CTMU External Edge Input 9
CTED10 21 32 I ST CTMU External Edge Input 10
CTED11 23 34 I ST CTMU External Edge Input 11
CTED12 15 24 I ST CTMU External Edge Input 12
CTED13 14 23 I ST CTMU External Edge Input 13
C1RX PPS PPS I ST Enhanced CAN Receive
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
(2)
(2)
(2)
35 55 P —
11 20 O — USB Host and OTG bus power control Output
37 57 I/O Analog USB D+
36 56 I/O Analog USB D-
33 51 I ST USB OTG ID Detect
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
Pin
Type
Buffer
Type
Description
USB internal transceiver supply. If the USB module is not
used, this pin must be connected to V
Data I/O pin for Programming/Debugging Communication
Channel 1
Clock Input pin for Programming/Debugging Communication
Channel 1
Data I/O Pin for Programming/Debugging Communication
Channel 2
Clock Input Pin for Programming/Debugging Communication
Channel 2
Data I/O Pin for Programming/Debugging Communication
Channel 3
Clock Input Pin for Programming/Debugging Communication
Channel 3
DD.
2014 Microchip Technology Inc. Preliminary DS60001290C-page 22
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
C1TX PPS PPS O ST Enhanced CAN Transmit
MCLR
DD 19 30 P P
AV
SS 20 31 P P Ground reference for analog modules
AV
DD
V
VCAP 56 85 P — Capacitor for Internal Voltage Regulator
SS 9, 25, 41
V
REF+ 16 29 P Analog Analog Voltage Reference (High) Input
V
V
REF- 15 28 P Analog Analog Voltage Reference (Low) Input
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input O = Output
Note 1: This pin is only available on devices without a USB module.
2: This pin is only available on devices with a USB module.
3: This pin is not available on 64-pin devices with a USB module.
4: This pin is only available on 100-pin devices without a USB module.
64-pin
QFN/
TQFP
713IST
10, 26, 38, 572, 16, 37,
ST = Schmitt Trigger input with CMOS levels TTL = TTL input buffer P = Power
100-pin
TQFP
46, 62, 86
15, 36, 45,
65, 75
Pin
Type
Buffer
Type
Master Clear (Reset) input. This pin is an active-low Reset to
the device.
Positive supply for analog modules. This pin must be
connected at all times.
P — Positive supply for peripheral logic and I/O pins
P — Ground reference for logic and I/O pins
Description
2014 Microchip Technology Inc. Preliminary DS60001290C-page 23
NOTES:
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
2014 Microchip Technology Inc. Preliminary DS60001290C-page 24
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
2.0 GUIDELINES FOR GETTING STARTED WITH 32-BI T MCUS
Note: This data sheet summarizes the features
of the PIC32MX1XX/2XX/5XX 64/100-pin
family of devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to the related section of the
“PIC32 Family Reference Manual”, which
is available from the Microchip web
(www.microchip.com/PIC32).
2.1 Basic Connection Requirements
Getting started with the PIC32MX1XX/2XX/5XX 64/
100-pin family of 32-bit Microcontrollers (MCUs)
requires attention to a minimal set of device pin
connections before proceeding with development. The
following is a list of pin names, which must always be
connected:
• All VDD and VSS pins (see 2.2 “Decoupling
Capacitors”)
• All AVDD and AVSS pins, even if the ADC module is
not used (see 2.2 “Decoupling Capacitors”)
•VCAP pin (see 2.3 “Capacitor on Internal Voltage
Regulator (VCAP)”)
• MCLR pin (see 2.4 “Master Clear (MCLR) Pin”)
• PGECx/PGEDx pins, used for In-Circuit Serial
Programming (ICSP™) and debugging purposes
2.5 “ICSP Pins”)
(see
• OSC1 and OSC2 pins, when external oscillator
source is used (see
The following pins may be required:
VREF+/VREF- pins, used when external voltage
reference for the ADC module is implemented
Note: The AVDD and AVSS pins must be
connected, regardless of ADC use and
the ADC voltage reference source.
2.8 “External Oscillator Pins”)
site
.
2.2 Decoupling Capacitors
The use of decoupling capacitors on power supply
pins, such as VDD, VSS, AVDD and AVSS is required.
Figure 2-1.
See
Consider the following criteria when using decoupling
capacitors:
• Value and type of capacitor: A value of 0.1 µF
(100 nF), 10-20V is recommended. The capacitor
should be a low Equivalent Series Resistance
(low-ESR) capacitor and have resonance
frequency in the range of 20
further recommended that ceramic capacitors be
used.
• Placement on the printed circuit board: The
decoupling capacitors should be placed as close
to the pins as possible. It is recommended that
the capacitors be placed on the same side of the
board as the device. If space is constricted, the
capacitor can be placed on another layer on the
PCB using a via; however, ensure that the trace
length from the pin to the capacitor is within onequarter inch (6
• Handling high frequency noise: If the board is
experiencing high frequency noise, upward of
tens of MHz, add a second ceramic-type capacitor
in parallel to the above described decoupling
capacitor. The value of the second capacitor can
be in the range of 0.01
second capacitor next to the primary decoupling
capacitor. In high-speed circuit designs, consider
implementing a decade pair of capacitances as
close to the power and ground pins as possible.
For example, 0.1 µF in parallel with 0.001 µF.
• Maximizing performance: On the board layout
from the power supply circuit, run the power and
return traces to the decoupling capacitors first,
and then to the device pins. This ensures that the
decoupling capacitors are first in the power chain.
Equally important is to keep the trace length
between the capacitor and the power pins to a
minimum thereby reducing PCB track inductance.
mm) in length.
MHz and higher. It is
µF to 0.001 µF. Place this
2014 Microchip Technology Inc. Preliminary DS60001290C-page 25
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
PIC32
VDD
VSS
VDD
VSS
VSS
VDD
AVDD
AVSS
VDD
VSS
0.1 µF
Ceramic
0.1 µF
Ceramic
0.1 µF
Ceramic
0.1 µF
Ceramic
C
10K
V
DD
MCLR
0.1 µF
Ceramic
L1
(2)
R1
Note 1: If the USB module is not used, this pin must be
connected to V
DD.
2: As an option, instead of a hard-wired connection, an
inductor (L1) can be substituted between V
DD and
AV
DD to improve ADC noise rejection. The inductor
impedance should be less than 3Ω and the inductor
capacity greater than 10 mA.
Where:
f
FCNV
2
------------- -=
f
1
2π LC()
-----------------------=
L
1
2πfC()
--------------------- -
2
=
(i.e., ADC conversion rate/2)
Connect
(2)
VUSB3V3
(1)
VCAP
Tantalum or
ceramic 10 µF
ESR ≤ 3Ω
(3)
2: Aluminum or electrolytic capacitors should not be
used. ESR ≤ 3Ω from -40ºC to 125ºC @ SYSCLK
frequency (i.e., MIPS).
1K
0.1 µF
Note 1: 470Ω ≤ R1 ≤ 1Ω will limit any current flowing into
MCLR
from the external capacitor C, in the event of
MCLR
pin breakdown, due to Electrostatic Discharge
(ESD) or Electrical Overstress (EOS). Ensure that the
MCLR
pin VIH and VIL specifications are met without
interfering with the Debug/Programmer tools.
2: The capacitor can be sized to prevent unintentional
Resets from brief glitches or to extend the device
Reset period during POR.
3: No pull-ups or bypass capacitors are allowed on
active debug/program PGECx/PGEDx pins.
R1
(1)
10k
V
DD
MCLR
PIC32
1 kΩ
0.1 µF
(2)
PGECx
(3)
PGEDx
(3)
ICSP™
1
5
4
2
3
6
V
DD
VSS
NC
R
C
FIGURE 2-1: RECOMMENDED
MINIMUM CONNECTION
2.4 Master Clear (MCLR) Pin
The MCLR pin provides two specific device
functions:
• Device Reset
• Device programming and debugging
Pulling The MCLR pin low generates a device Reset.
Figure 2-2 illustrates a typical MCLR circuit. During
device programming and debugging, the resistance
and capacitance that can be added to the pin must
be considered. Device programmers and debuggers
drive the
levels (V
not be adversely affected. Therefore, specific values
of R and C will need to be adjusted based on the
application and PCB requirements.
For example, as illustrated in Figure 2-2, it is
recommended that the capacitor C, be isolated from
the
operations.
Place the components illustrated in Figure 2-2 within
one-quarter inch (6 mm) from the MCLR pin.
FIGURE 2-2: EXAMPLE OF MCLR PIN
MCLR pin. Consequently, specific voltage
IH and VIL) and fast signal transitions must
MCLR pin during programming and debugging
CONNECTIONS
2.2.1 BULK CAPACITORS
The use of a bulk capacitor is recommended to improve
power supply stability. Typical values range from 4.7 µF
to 47
the device as possible.
2.3 Capacitor on Internal Voltage
2.3.1 INTERNAL REGULATOR MODE
A low-ESR (3 ohm) capacitor is required on the VCAP
pin, which is used to stabilize the internal voltage regulator output. The VCAP pin must not be connected to
DD, and must have a CEFC capacitor, with at least a
V
6V rating, connected to ground. The type can be
ceramic or tantalum. Refer to
Electrical Characteristics” for additional information
on CEFC specifications.
DS60001290C-page 26 Preliminary 2014 Microchip Technology Inc.
µF. This capacitor should be located as close to
Regulator (V
CAP)
Section 31.0 “40 MHz
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
Main Oscillator
Guard Ring
Guard Trace
Secondary
Oscillator
2.5 ICSP Pins
The PGECx and PGEDx pins are used for In-Circuit
Serial Programming™ (ICSP™) and debugging pur
poses. It is recommended to keep the trace length
between the ICSP connector and the ICSP pins on the
device as short as possible. If the ICSP connector is
expected to experience an ESD event, a series resistor
is recommended, with the value in the range of a few
tens of Ohms, not to exceed 100 Ohms.
Pull-up resistors, series diodes and capacitors on the
PGECx and PGEDx pins are not recommended as they
will interfere with the programmer/debugger communi
cations to the device. If such discrete components are
an application requirement, they should be removed
from the circuit during programming and debugging.
Alternatively, refer to the AC/DC characteristics and
timing requirements information in the respective
device Flash programming specification for information
on capacitive loading limits and pin input voltage high
IH) and input voltage low (VIL) requirements.
(V
Ensure that the “Communication Channel Select” (i.e.,
PGECx/PGEDx pins) programmed into the device
matches the physical connections for the ICSP to
®
MPLAB
For more information on MPLAB ICD 3 and MPLAB
REAL ICE connection requirements, refer to the follow
ing documents that are available on the Microchip web
site.
• “Using MPLAB® ICD 3” (poster) DS50001765
• “MPLAB® ICD 3 Design Advisory” DS50001764
• “MPLAB® REAL ICE™ In-Circuit Debugger
• “Using MPLAB® REAL ICE™ Emulator” (poster)
ICD 3 or MPLAB REAL ICE™.
User’s Guide” DS50001616
DS50001749
-
-
-
2.7 Trace
The trace pins can be connected to a hardware
trace-enabled programmer to provide a compressed
real-time instruction trace. When used for trace, the
TRD3, TRD2, TRD1, TRD0 and TRCLK pins should
be dedicated for this use. The trace hardware
requires a 22 Ohm series resistor between the trace
pins and the trace connector.
2.8 External Oscillator Pins
Many MCUs have options for at least two oscillators: a
high-frequency primary oscillator and a low-frequency
secondary oscillator (refer to
Configuration” for details).
The oscillator circuit should be placed on the same side
of the board as the device. Also, place the oscillator circuit close to the respective oscillator pins, not exceeding one-half inch (12 mm) distance between them. The
load capacitors should be placed next to the oscillator,
on the same side of the board. Use a grounded copper
pour around the oscillator circuit to isolate them from
surrounding circuits. The grounded copper pour should
be routed directly to the MCU ground. Do not run any
signal traces or power traces inside the ground pour.
Also, if using a two-sided board, avoid any traces on
the other side of the board where the crystal is placed.
A suggested layout is illustrated in
FIGURE 2-3: SUGGESTED OSCILLATOR
CIRCUIT PLACEMENT
Section 8.0 “Oscillator
Figure 2-3.
2.6 JTAG
The TMS, TDO, TDI and TCK pins are used for testing
and debugging according to the Joint Test Action
Group (JTAG) standard. It is recommended to keep the
trace length between the JTAG connector and the
JTAG pins on the device as short as possible. If the
JTAG connector is expected to experience an ESD
event, a series resistor is recommended, with the value
in the range of a few tens of Ohms, not to exceed 100
Ohms.
Pull-up resistors, series diodes and capacitors on the
TMS, TDO, TDI and TCK pins are not recommended
as they will interfere with the programmer/debugger
communications to the device. If such discrete
components are an application requirement, they
should be removed from the circuit during
programming and debugging. Alternatively, refer to the
AC/DC characteristics and timing requirements
information in the respective device Flash
programming specification for information on
capacitive loading limits and pin input voltage high (V
and input voltage low (VIL) requirements.
2014 Microchip Technology Inc. Preliminary DS60001290C-page 27
IH)
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
Crystal manufacturer recommended: C1 = C2 = 15 pF
Therefore:
C
LOAD = {( [CIN + C1] * [COUT + C2] ) / [CIN + C1 + C2 + COUT] }
+ estimated oscillator PCB stray capacitance
= {( [5 + 15][5 + 15] ) / [5 + 15 + 15 + 5] } + 2.5 pF
= {( [20][20]) / [40] } + 2.5
= 10 + 2.5 = 12.5 pF
Rounded to the nearest standard value or 13 pF in this example for
Primary Oscillator crystals “C1” and “C2”.
OSC2 OSC1
1M
Typical XT
(4-10 MHz)
Circuit A
C1
C2
OSC2 OSC1
Typical HS
(10-25 MHz)
Circuit B
C1
C2
Rs
OSC2
OSC1
1M
Typical XT/HS
(4-25 MHz)
Circuit C
C1
C2
1M
Rs
OSC2 OSC1
Not Recommended
Circuit D
Not Recommended
1M
Rs
OSC2
OSC1
Circuit E
2.8.1 CRYSTAL OSCILLATOR DESIGN
CONSIDERATION
The following example assumptions are used to
calculate the Primary Oscillator loading capacitor
values:
•CIN = PIC32_OSC2_Pin Capacitance = ~4-5 pF
•COUT = PIC32_OSC1_Pin Capacitance = ~4-5 pF
• C1 and C2 = XTAL manufacturing recommended
loading capacitance
• Estimated PCB stray capacitance, (i.e.,12 mm
length) = 2.5 pF
EXAMPLE 2-1: CRYSTAL LOAD CAPACITOR
CALCULATION
The following tips are used to increase oscillator gain,
(i.e., to increase peak-to-peak oscillator signal):
• Select a crystal with a lower “minimum” power drive
rating
• Select an crystal oscillator with a lower XTAL
manufacturing “ESR” rating.
• Add a parallel resistor across the crystal. The smaller
the resistor value the greater the gain. It is recom
mended to stay in the range of 600k to 1M
• C1 and C2 values also affect the gain of the oscillator.
The lower the values, the higher the gain.
• C2/C1 ratio also affects gain. To increase the gain,
make C1 slightly smaller than C2, which will also help
start-up performance.
Note: Do not add excessive gain such that the
oscillator signal is clipped, flat on top of
the sine wave. If so, you need to reduce
the gain or add a series resistor, RS, as
shown in circuit “C” in
Figure 2-4. Failure
to do so will stress and age the crystal,
which can result in an early failure. Adjust
the gain to trim the max peak-to-peak to
DD-0.6V. When measuring the oscilla-
~V
tor signal you must use a FET scope
probe or a probe with ≤ 1.5 pF or the
scope probe itself will unduly change the
gain and peak-to-peak levels.
2.8.1.1 Additional Microchip References
• AN588 “PICmicro® Microcontroller Oscillator
• AN826 “Crystal Oscillator Basics and Crystal
• AN849 “Basic PICmicro® Oscillator Design”
DS60001290C-page 28 Preliminary 2014 Microchip Technology Inc.
Design Guide”
Selection for rfPIC™ and PICmicro® Devices”
FIGURE 2-4: PRIMARY CRYSTAL
OSCILLATOR CIRCUIT
RECOMMENDATIONS
-
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
PIC32
SOSCO
SOSCI
2.2 K
33 pF
33 pF
Note 1: P/N: Epson MC-306 32.7680K-A0:ROHS.
Crystal
(1)
2.9 Unused I/Os
Unused I/O pins should not be allowed to float as
inputs. They can be configured as outputs and driven
to a logic-low state.
Alternatively, inputs can be reserved by connecting the
pin to VSS through a 1k to 10k resistor and configuring
the pin as an input.
2.10 SOSC Design Recommendation
Figure 2-5 shows the recommended Sosc circuit
design. All components should be as close as possible
to the SOSCI and SOSCO pins of the PIC32 device,
(≤ 8 mm) and the capacitors should be ceramic-type.
FIGURE 2-5: RECOMMENDED
OSCILLATOR CIRCUIT
PLACEMENT
2014 Microchip Technology Inc. Preliminary DS60001290C-page 29
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
Current Flow
CPU LOGIC
TRIS
ANSEL
I/O IN
I/O OUT
VSS
PIC32
AN2/RB0
On/Off
PIC32
POWER
SUPPLY
Non-5V Tolerant
Pin Architecture
V
DD
Remote
0.3V dVIH d 3.6V
Remote
GND
Note: When VDD power is OFF.
2.11 Considerations When Interfacing to Remotely Powered Circuits
2.11.1 NON-5V TOLERANT INPUT PINS
A quick review of the absolute maximum rating section
31.0 “40 MHz Electrical Characteristics” will indi-
in
cate that the voltage on any non-5v tolerant pin may not
exceed AVDD/VDD + 0.3V. Figure 2-6 shows an exam-
ple of a remote circuit using an independent power
source, which is powered while connected to a PIC32
non-5V tolerant circuit that is not powered.
FIGURE 2-6: PIC32 NON-5V TOLERANT CIRCUIT EXAMPLE
DS60001290C-page 30 Preliminary 2014 Microchip Technology Inc.
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