Datasheet PIC16F1788, PIC16F1789, PIC16LF1788, PIC16LF1789 Datasheet

PIC16(L)F1788/9

28/40/44-Pin 8-Bit Advanced Analog Flash Microcontrollers

High-Performance RISC CPU:

• Only 49 Instructions

• Operating Speed:

- DC – 32 MHz clock input

- DC – 125 ns instruction cycle

• Interrupt Capability with Automatic Context
Saving

• 16-Level Deep Hardware Stack with Optional
Overflow/Underflow Reset

• Direct, Indirect and Relative Addressing modes:

- Two full 16-bit File Select Registers (FSRs)

- FSRs can read program and data memory

Memory Features:

• Up to 16 KW Flash Program Memory:

- Self-programmable under software control

- Programmable code protection

- Programmable write protection

• 256 Bytes of Data EEPROM

• Up to 2048 Bytes of RAM

High-Performance PWM Controller:

• Four Programmable Switch Mode Controller
(PSMC) modules:

- Digital and/or analog feedback control of

PWM frequency and pulse begin/end times

- 16-bit Period, duty cycle and phase

- 16 ns clock resolution

- Supports single PWM, complementary, push-

pull and 3-phase modes of operation

- Dead-band control with 8-bit counter

- Auto-shutdown and restart

- Leading and falling edge blanking

-Burst mode

Extreme Low-Power Management PIC16LF1788/9 with XLP:

• Sleep mode: 50 nA @ 1.8V, typical

• Watchdog Timer: 500 nA @ 1.8V, typical

• Secondary Oscillator: 500 nA @ 32 kHz

• Operating Current:

-8A @ 32 kHz, 1.8V, typical

-32A/MHz @ 1.8V, typical

Analog Peripheral Features:

• Analog-to-Digital Converter (ADC):

- Fully differential 12-bit converter

- Up to 75 ksps conversion rate

- Up to 14 single-ended channels

- Up to 7 differential channels

- Positive and negative reference selection

• One 8-Bit and three 5-Bit Digital-to-Analog
Converters (DAC):

- Output available externally

- Positive and negative reference selection

- Internal connections to comparators, op

amps, Fixed Voltage Reference (FVR) and
ADC

• Four High-Speed Comparators:

- 50 ns response time @ V

- Rail-to-rail inputs

- Software selectable hysteresis

- Internal connection to op amps, FVR and

DAC

• Up to Three Operational Amplifiers:

- Rail-to-rail inputs/outputs

- High/Low selectable Gain Bandwidth Product

- Internal connection to DAC and FVR

• Fixed Voltage Reference (FVR):

- 1.024V, 2.048V and 4.096V output levels

- Internal connection to ADC, comparators and

DAC

DD = 5V

I/O Features:

• Up to 36 I/O Pins and 1 Input-only Pin:

- High current sink/source for LED drivers

- Individually programmable interrupt-on-

change pins

- Individually programmable weak pull-ups

- Individual input level selection

- Individually programmable slew rate control

- Individually programmable open drain

outputs

 2013 Microchip Technology Inc. Preliminary DS41675A-page 1

PIC16(L)F1788/9

Digital Peripheral Features:

• Timer0: 8-Bit Timer/Counter with 8-Bit
Programmable Prescaler

• Enhanced Timer1:

- 16-bit timer/counter with prescaler

- External Gate Input mode

- Dedicated low-power 32 kHz oscillator driver

• Timer2: 8-Bit Timer/Counter with 8-Bit Period
Register, Prescaler and Postscaler

• Three Capture/Compare/PWM modules (CCP):

- 16-bit capture, max resolution 12.5 ns

- 16-bit compare, max resolution 31.25 ns

- 10-bit PWM, max frequency 32 kHz

• Master Synchronous Serial Port (SSP) with SPI

2

CTM with:

and I

- 7-bit address masking

- SMBus/PMBus

• Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART):

- RS-232, RS-485 and LIN compatible

- Auto-baud detect

- Auto-wake-up on Start

TM

compatibility

Oscillator Features:

• Operate up to 32 MHz from Precision Internal
Oscillator:

- Factory calibrated to ±1%, typical

- Software selectable frequency range from

32 MHz to 31 kHz

• 31 kHz Low-Power Internal Oscillator

• 32.768 kHz Timer1 Oscillator:

- Available as system clock

- Low-power RTC

• External Oscillator Block with:

- 4 crystal/resonator modes up to 32 MHz

using 4x PLL

- 3 external clock modes up to 32 MHz

• 4x Phase-Locked Loop (PLL)

• Fail-Safe Clock Monitor:

- Detect and recover from external oscillator

failure

• Two-Speed Start-up:

- Minimize latency between code execution

and external oscillator start-up

General Microcontroller Features:

• Power-Saving Sleep mode

• Power-on Reset (POR)

• Power-up Timer (PWRT)

• Oscillator Start-up Timer (OST)

• Brown-out Reset (BOR) with Selectable Trip Point

• Extended Watchdog Timer (WDT)

• In-Circuit Serial Programming

• In-Circuit Debug (ICD)

• Enhanced Low-Voltage Programming (LVP)

• Operating Voltage Range:

- 1.8V to 3.6V (PIC16LF1788/9)

- 2.3V to 5.5V (PIC16F1788/9)

TM

(ICSPTM)

DS41675A-page 2 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F178X Family Types

PIC16(L)F1788/9

C™/SPI)

2

MSSP (I

(1)

Debug

(bytes)

Data SRAM

(2)

Mode Controllers

(PSMC)

CCP

EUSART

I/O’s

Comparators

12-bit ADC (ch)

8-bit/

Timers

(8/16-bit)

5-bit DAC

Amplifiers

Operational

Programmable Switch

Device

(bytes)

Flash (words)

Data Sheet Index

Program Memory

PIC16(L)F1782 (1) 2048 256 256 25 11 3 2 1/0 2/1 2 2 1 1 I Y
PIC16(L)F1783 (1) 4096 256 512 25 11 3 2 1/0 2/1 2 2 1 1 I Y
PIC16(L)F1784 (2) 4096 256 512 36 14 4 3 1/0 2/1 3 3 1 1 I Y
PIC16(L)F1786 (2) 8192 256 1024 25 11 4 2 1/0 2/1 3 3 1 1 I Y
PIC16(L)F1787 (2) 8192 256 1024 36 14 4 3 1/0 2/1 3 3 1 1 I Y
PIC16(L)F1788 (3) 16384 256 2048 25 11 4 2 1/3 2/1 4 3 1 1 I Y
PIC16(L)F1789 (3) 16384 256 2048 36 14 4 3 1/3 2/1 4 3 1 1 I Y

Note 1: I - Debugging, Integrated on Chip; H - Debugging, available using Debug Header.

2: One pin is input-only.

Data Sheet Index: (Unshaded devices are described in this document.)

1: DS41579 PIC16(L)F1782/3 Data Sheet, 28-Pin Flash, 8-bit Advanced Analog MCUs.
2: DS41637 PIC16(L)F1784/6/7 Data Sheet, 28/40/44-Pin Flash, 8-bit Advanced Analog MCUs.
3: DS41675 PIC16(L)F1788/9 Data Sheet, 28/40/44-Pin Flash, 8-bit Advanced Analog MCUs.

Note: For other small form-factor package availability and marking information, please visit

http://www.microchip.com/packaging or contact your local sales office.

Data EEPROM

XLP

 2013 Microchip Technology Inc. Preliminary DS41675A-page 3

PIC16(L)F1788/9

SPDIP, SOIC, SSOP

1
2
3
4
5
6
7
8

9
10

VPP/MCLR/RE3

RA0
RA1
RA2

RA3
RA4

RA5

RB6/ICSPCLK

RB5

RB4
RB3
RB2
RB1

RB0

VDD

VSS
11
12

13
14

15

16

17

18

19

20

28
27
26
25
24
23

22

21

V

SS

RA7

RA6
RC0
RC1
RC2
RC3

RC5
RC4

RC7
RC6

RB7/ICSPDAT

Note: See Tab l e 1 for the location of all peripheral functions.

PIC16(L)F1788

2
3

6

1

18

19

20

21

15

7

16

17

RC0

5

4

RB7/ICSPDAT

RB6/ICSPCLK

RB5

RB4

RB3
RB2
RB1
RB0

V

DD

VSS
RC7

RC6

RC5

RC4

RE3/MCLR

/VPP

RA0

RA1

RA2
RA3
RA4
RA5
VSS
RA7
RA6

RC1

RC2

RC3

9

10

13814

12

11

27

26

232822

24

25

PIC16(L)F1788

QFN

Note: See Tab l e 1 for the location of all peripheral functions.

Pin Diagrams

FIGURE 1: 28-PIN DIAGRAM FOR PIC16(L)F1788

FIGURE 2: 28-PIN DIAGRAM FOR PIC16(L)F1788

DS41675A-page 4 Preliminary  2013 Microchip Technology Inc.

TABLE 1: 28-PIN ALLOCATION TABLE (PIC16(L)F1788)

PIC16(L)F1788/9

I/O

SOIC, SSOP

28-Pin SPDIP,

RA0 2 27 AN0 — C1IN0-

ADC

28-Pin QFN,

Reference

Comparator

C2IN0-

8-bit/

Operation

Amplifiers

5-bit DAC

Timers

PSMC

— — — — — — SS

CCP

EUSART

MSSP

Interrupt

(1)

IOC Y —

Pull-up

C3IN0­C4IN0-

RA1 3 28 AN1 — C1IN1-

OPA1OUT — — — — — — IOC Y —
C2IN1­C3IN1­C4IN1-

RA2 4 1 AN2 VREF-

DAC1V

REF-

C1IN0+
C2IN0+
C3IN0+

DAC1OUT1 — — — — — IOC Y —

C4IN0+

RA3 5 2 AN3 V

REF+

DAC1V
DAC2V
DAC3V
DAC4V

C1IN1+ — — — — — — — IOC Y —

REF+
REF+
REF+
REF+

RA4 6 3 — — C1OUT OPA1IN+ DAC4OUT1 T0CKI — — — — IOC Y —

RA5 7 4 AN4 — C2OUT OPA1IN- DAC2OUT1 — — — — SS

RA6 10 7 — — C2OUT

(1)

— — — — — — — IOC Y VCAP

IOC Y —

OSC2

CLKOUT

RA7 9 6 — — — — — —

PSMC1CLK
PSMC2CLK

— — — IOC Y CLKIN

OSC1

PSMC3CLK

RB0 21 18 AN12 — C2IN1+ — — —

PSMC4CLK

PSMC1IN
PSMC2IN

CCP1

(1)

— — INT

Y —

IOC

PSMC3IN
PSMC4IN

RB1 22 19 AN10 — C1IN3-

C2IN3-

OPA2OUT — — — — — — IOC Y —

C3IN3­C4IN3-

RB2 23 20 AN8 — — OPA2IN- DAC3OUT1 — — — — — IOC Y CLKR

RB3 24 21 AN9 —

C1IN2-

OPA2IN+ — — — CCP2

(1)

— — IOC Y —

C2IN2­C3IN2-

RB4 25 22 AN11 — C3IN1+ — — — — — — SS

RB5 26 23 AN13 — C4IN2-

C3OUT

— — T1G — CCP3

(1)

—SDO

RB6 27 24 — — C4IN1+ — — — — — TX

CK

RB7 28 25 — — — — DAC1OUT2

DAC2OUT2

———RX

DT

(1)

IOC Y —

(1)

IOC Y —

(1)

(1)

SDI

(1)

(1)
(1)

IOC Y ICSPCLK

(1)

SDA

(1)

SCK

IOC Y ICSPDAT

(1)

SCL
DAC3OUT2
DAC4OUT2

RC0 11 8 — — — — — T1CKI

PSMC1A — — — IOC Y —

SOSCO

RC1 12 9 — — — — — SOSCI PSMC1B CCP2 — — IOC Y —

RC2 13 10 — — — — — — PSMC1C

CCP1 — — IOC Y —

PSMC3B

RC3 14 11 — — — — — — PSMC1D

PSMC4A

RC4 15 12 — — — — — — PSMC1E

PSMC4B

RC5 16 13 — — — — — — PSMC1F

——SCK

— — SDI

SCL

IOC Y —

IOC Y —

SDA

— — SDO IOC Y —

PSMC3A

RC6 17 14 — — — — — — PSMC2A CCP3 TXCK— IOC Y —

Basic

Note 1: Alternate pin function selected with the APFCON1 (Register 13-1) and APFCON2 (Register 13-2) registers.

 2013 Microchip Technology Inc. Preliminary DS41675A-page 5

PIC16(L)F1788/9

TABLE 1: 28-PIN ALLOCATION TABLE (PIC16(L)F1788) (Continued)

I/O

SOIC, SSOP

28-Pin SPDIP,

RC7 18 15 — — C4OUT — — — PSMC2B — RXDT— IOC Y —

RE3 1 26 — — — — — — — — — — IOC Y MCLR

VDD 20 17 — — — — — — — — — — — — VDD

VSS 8,195,

Note 1: Alternate pin function selected with the APFCON1 (Register 13-1) and APFCON2 (Register 13-2) registers.

ADC

28-Pin QFN,

—— — — — — — —————VSS

16

Reference

Comparator

Operation

Amplifiers

8-bit/

5-bit DAC

Timers

PSMC

CCP

EUSART

MSSP

Pull-up

Interrupt

VPP

Basic

DS41675A-page 6 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

40-Pin PDIP

PIC16(L)F1789

2

3

4

5

6

7

8
9

10

VPP/MCLR/RE3

RA0

RA1

RA2

RA3

RA4

RA5
RE0

RE1

RE2

RB6/ICSPCLK

RB5

RB4

RB0

V

DD

VSS

RD2

11

12

13

14

15

16

17
18

19

20

40

39

38

37

36

35

34

33
32

31
30

29

28

27

26

25

24
23

22

21

V

DD

VSS

RA7

RA6

RC0

RC1

RC2
RC3

RD0

RD1

RC5

RC4
RD3

RD4

RC7

RC6

RD7

RD6

RD5

RB7ICSPDAT

1

RB3

RB2

RB1

Note: See Ta b le for the location of all peripheral functions.

FIGURE 3: 40-PIN PDIP PACKAGE DIAGRAM FOR PIC16(L)F1789

 2013 Microchip Technology Inc. Preliminary DS41675A-page 7

PIC16(L)F1788/9

40-Pin UQFN (5x5)

10

11

2

3
4

5

6

1

181920

21

22

121314

15

38

8

7

40

39

16

17

29

30

31

32

33

23

24

25

26

27

28

363435

9

37

RA1

RA0

V

PP/MCLR/RE3

RB3

ICSPDAT/RB7

ICSPCLK/RB6

RB5

RB4

RC6

RC5

RC4

RD3

RD2

RD1

RD0

RC3

RC2

RC1

RC0
RA6
RA7
V

SS

VDD
RE2
RE1
RE0
RA5
RA4

RC7
RD4

RD5
RD6

RD7

V

SS

VDD
RB0
RB1
RB2

PIC16(L)F1789

RA3

RA2

Note: See Table for the location of all peripheral functions.

FIGURE 4: 40-PIN UQFN (5X5) PACKAGE DIAGRAM FOR PIC16(L)F1789

DS41675A-page 8 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

44-pin QFN

Note: See Table for the location of all peripheral functions.

RA6

RA7

N/C

AV

SS

N/C

V

DD

RE2

RE1

RE0

RA5

RA4

RC7

RD4
RD5

RD6

RD7

VSS

VDD

AVDD

RB0

RB1

RB2

RC6

RC5

RC4

RD3

RD2

RD1

RD0

RC3

RC2

RC1

RC0

RB3

N/C

RB4

RB5

ICSPCLK/RB6

ICSPDAT/RB7

V

PP/MCLR/RE3

RA0

RA1

RA2

RA3

PIC16(L)F1789

1

2

3

4

5

6

7

8

9

10

11

12

13

141516

17

18

19

202122

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

FIGURE 5: 44-PIN QFN PACKAGE DIAGRAM FOR PIC16(L)F1789

 2013 Microchip Technology Inc. Preliminary DS41675A-page 9

PIC16(L)F1788/9

10
11

2
3

6

1

1819202122

121314

15

38

8

7

44

43

42

414039

16

17

29

30

31

32

33

23

24

25

26

27

28

363435

9

37

RA3

RA2

RA1

RA0

V

PP/MCLR/RE3

NC

ICSPDAT/RB7

ICSPCLK/RB6

RB5

RB4

NC

NC

NC
RC0

V

SS

VDD

RB0
RB1
RB2
RB3

5

4

44-Pin TQFP

RA6
RA7
V

SS

VDD
RE2
RE1
RE0
RA5
RA4

RC7
RD4
RD5
RD6
RD7

RC6

RC5

RC4

RD3

RD2

RD1

RD0

RC3

RC2

RC1

PIC16(L)F1789

Note: See Table for the location of all peripheral functions.

FIGURE 6: 44-PIN TQFP PACKAGE DIAGRAM FOR PIC16(L)F1789

DS41675A-page 10 Preliminary  2013 Microchip Technology Inc.

TABLE 2: 40/44-PIN ALLOCATION TABLE (PIC16(L)F1789)

PIC16(L)F1788/9

I/O

40-Pin PDIP

40-Pin UQFN

44-Pin TQFP

ADC

44-Pin QFN

Reference

Comparator

RA0 2 17 19 19 AN0 — C1IN0-

C2IN0­C3IN0-

Op Amps

8-bit/

5-bit DAC

Timers

PSMC

— — — — — — SS

CCP

EUSART

MSSP

Interrupt

(1)

IOC Y —

Pull-up

C4IN0-

RA1 3 18 20 20 AN1 — C1IN1-

C2IN1-

OPA1OUT — — — — — — IOC Y —

C3IN1­C4IN1-

RA2 4 19 21 21 AN2 DAC1VREF-

REF-

V

C1IN0+
C2IN0+

DAC1OUT1 — — — — — IOC Y —

C3IN0+
C4IN0+

RA3 5 20 22 22 AN3 V

REF+

DAC1V
DAC2V
DAC3V
DAC4V

C1IN1+ — — — — — — — IOC Y —

REF+
REF+
REF+
REF+

RA4 6 21 23 23 — — C1OUT OPA1IN+ — T0CKI — — — — IOC Y —

RA5 7 22 24 24 AN4 — C2OUT OPA1IN- DAC2OUT1 — — — — SS

RA6 14 29 31 33 — — C2OUT

RA7 13 28 30 32 — — — — — — PSMC1CLK

(1)

— — — — — — — IOC Y VCAP

— — — IOC Y CLKIN
PSMC2CLK
PSMC3CLK

IOC Y —

CLKOUT

OSC2

OSC1

PSMC4CLK

RB0 33 8 8 9 AN12 — C2IN1+ — — — PSMC1IN

PSMC2IN

CCP1

(1)

— — INT

IOC

Y —

PSMC3IN
PSMC4IN

RB1 34 9 9 10 AN10 — C1IN3-

OPA2OUT — — — — — — IOC Y —
C2IN3­C3IN3­C4IN3-

RB2 35 10 10 11 AN8 — — OPA2IN- DAC3OUT1 — — — — — IOC Y CLKR

RB3 36 11 11 12 AN9 — C1IN2-

C2IN2-

OPA2IN+ — — — CCP2

(1)

— — IOC Y —

C3IN2-

RB4 37 12 14 14 AN11 — C3IN1+ — — — — — — SS

RB5 38 13 15 15 AN13 — C4IN2- — — T1G — CCP3

(1)

RB6 39 14 16 16 — — C4IN1+ — — — — — TX

CK

RB7 40 15 17 17 — — — — DAC1OUT2

DAC2OUT2
DAC3OUT2
DAC4OUT2

RC0 15 30 32 34 — — — — — T1CKI

———RX

DT

PSMC1A — — — IOC Y —

(1)

—SDO

(1)

(1)

(1)

SDA

(1)

(1)

SDI

(1)

(1)

SCL

(1)

(1)

SCK

IOC Y —

IOC Y —

IOC Y ICSPCLK

IOC Y ICSPDAT

SOSCO

RC1 16 31 35 35 — — — — — SOSCI PSMC1B CCP2 — — IOC Y —

RC2 17 32 36 36 — — — — — — PSMC1C CCP1 — — IOC Y

RC3 18 33 37 37 — — — — — — PSMC1D — — SCL

RC4 23 38 42 42 — — — — — — PSMC1E — — SDI

SCK

IOC Y —

IOC Y —

SDA

RC5 24 39 43 43 — — — — — — PSMC1F — — SDO IOC Y —

RC6 25 40 44 44 — — — — — — PSMC2A — TXCK— IOC Y —

Basic

RC7 26 1 1 1 — — — — — — PSMC2B — RXDT—IOCY —

RD0 19 34 38 38 — — — OPA3IN+ — — — — — — — Y —

Note 1: Alternate pin function selected with the APFCON1 (Register 13-1) and APFCON2 (Register 13-2) registers.

 2013 Microchip Technology Inc. Preliminary DS41675A-page 11

PIC16(L)F1788/9

TABLE 2: 40/44-PIN ALLOCATION TABLE (PIC16(L)F1789) (Continued)

I/O

40-Pin PDIP

RD1 20 35 39 39 AN21 — C1IN4-

RD2 21 36 40 40 — — — OPA3IN- DAC4OUT1 — — — — — — Y —

RD3 22 37 41 41 — — — — — — PSMC4A — — — — Y

RD4 27 2 2 2 — — — — — — PSMC3F — — — — Y —

RD5 28 3 3 3 — — — — — — PSMC3E — — — — Y —

RD6 29 4 4 4 — — C3OUT — — — PSMC3D — — — — Y —

RD7 30 5 5 5 — — C4OUT — — — PSMC3C — — — — Y —

RE0 8 23 25 25 AN5 — — — — — PSMC4B CCP3 — — — Y —

RE1 9 24 26 26 AN6 — — — — — PSMC3B — — — — Y —

RE2 10 25 27 27 AN7 — — — — — PSMC3A — — — — Y —

RE3 1 16 18 18

VDD 11,327,267,287,8,

Vss 12,316,276,296,30—— — — — — — —————VSS

Note 1: Alternate pin function selected with the APFCON1 (Register 13-1) and APFCON2 (Register 13-2) registers.

40-Pin UQFN

44-Pin TQFP

ADC

44-Pin QFN

—— — — — — — ———IOC

— — — — — — — — — — — — VDD

28

Reference

Comparator

C2IN4­C3IN4­C4IN4-

Op Amps

OPA3OUT — — — — — — — Y —

8-bit/

5-bit DAC

Timers

PSMC

CCP

EUSART

MSSP

Pull-up

Interrupt

YMCLR

VPP

Basic

DS41675A-page 12 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

Table of Contents

1.0 Device Overview ........................................................................................................................................................................ 15

2.0 Enhanced Mid-Range CPU ........................................................................................................................................................ 27

3.0 Memory Organization ................................................................................................................................................................. 29

4.0 Device Configuration.................................................................................................................................................................. 59

5.0 Resets ........................................................................................................................................................................................ 65

6.0 Oscillator Module........................................................................................................................................................................ 73

7.0 Reference Clock Module ............................................................................................................................................................ 91

8.0 Interrupts .................................................................................................................................................................................... 95

9.0 Power-Down Mode (Sleep) ...................................................................................................................................................... 109

10.0 Low Dropout (LDO) Voltage Regulator .................................................................................................................................... 113

11.0 Watchdog Timer (WDT) ........................................................................................................................................................... 115

12.0 Date EEPROM and Flash Program Memory Control ............................................................................................................... 121

13.0 I/O Ports ................................................................................................................................................................................... 135

14.0 Interrupt-on-Change ................................................................................................................................................................. 163

15.0 Fixed Voltage Reference (FVR) ............................................................................................................................................... 167

16.0 Temperature Indicator.............................................................................................................................................................. 171

17.0 Analog-to-Digital Converter (ADC) Module .............................................................................................................................. 173

18.0 Operational Amplifier (OPA) Module ........................................................................................................................................ 191

19.0 8-bit Digital-to-Analog Converter (DAC1) Module .................................................................................................................... 195

20.0 5-bit Digital-to-Analog Converter (DAC2/3/4) Module .............................................................................................................. 199

21.0 Comparator Module.................................................................................................................................................................. 203

22.0 Timer0 Module ......................................................................................................................................................................... 213

23.0 Timer1 Module ......................................................................................................................................................................... 217

24.0 Timer2 Module ......................................................................................................................................................................... 219

25.0 Programmable Switch Mode Control (PSMC) Module ............................................................................................................. 233

26.0 Capture/Compare/PWM Module .............................................................................................................................................. 291

27.0 Master Synchronous Serial Port (MSSP) Module .................................................................................................................... 301

28.0 Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) ............................................................... 357

29.0 In-Circuit Serial Programming™ (ICSP™) ............................................................................................................................... 387

30.0 Instruction Set Summary.......................................................................................................................................................... 389

31.0 Electrical Specifications............................................................................................................................................................ 403

32.0 DC and AC Characteristics Graphs and Tables....................................................................................................................... 435

33.0 Development Support............................................................................................................................................................... 453

34.0 Packaging Information.............................................................................................................................................................. 457

Appendix A: Revision History............................................................................................................................................................. 479

Index .................................................................................................................................................................................................. 481

The Microchip Web Site..................................................................................................................................................................... 489

Customer Change Notification Service .............................................................................................................................................. 489

Customer Support .............................................................................................................................................................................. 489

Reader Response .............................................................................................................................................................................. 490

Product Identification System ............................................................................................................................................................ 491

 2013 Microchip Technology Inc. Preliminary DS41675A-page 13

PIC16(L)F1788/9

TO OUR VALUED CUSTOMERS

It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
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If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
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Most Current Data Sheet

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You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
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DS41675A-page 14 Preliminary  2013 Microchip Technology Inc.

1.0 DEVICE OVERVIEW

The PIC16(L)F1788/9 are described within this data
sheet. They are available in 28-pin packages. Figure 1-1
shows a block diagram of the PIC16(L)F1788/9 devices.

Table 1-2 shows the pinout descriptions.

Reference Table 1-1 for peripherals available per device.

TABLE 1-1: DEVICE PERIPHERAL

SUMMARY

Peripheral

PIC16(L)F1788

PIC16(L)F1789

Analog-to-Digital Converter (ADC) ●●
Digital-to-Analog Converter (DAC) ●●
Fixed Voltage Reference (FVR) ●●
Reference Clock Module ●●
Temperature Indicator ●●
Capture/Compare/PWM (CCP/ECCP) Modules

CCP1 ●●
CCP2 ●●
CCP3 ●●

Comparators

C1 ●●
C2 ●●
C3 ●●
C4 ●●

Enhanced Universal Synchronous/Asynchronous
Receiver/Transmitter (EUSART)

EUSART ●●

Master Synchronous Serial Ports

MSSP ●●

Op Amp

Op Amp 1 ●●
Op Amp 2 ●●
Op Amp 3 ●

Programmable Switch Mode Controller (PSMC)

PSMC1 ●●
PSMC2 ●●
PSMC3 ●●
PSMC4 ●●

Timers

Timer0 ●●
Timer1 ●●
Timer2 ●●

PIC16(L)F1788/9

 2013 Microchip Technology Inc. Preliminary DS41675A-page 15

PIC16(L)F1788/9

PORTA

PORTB

PORTC

Note 1: PIC16(L)F1789 only.

2: See applicable chapters for more information on peripherals.

CPU

Program

Flash Memory

RAM

Timing

Generation

LFINTOSC

Oscillator

MCLR

Figure 2-1

CLKIN

CLKOUT

ADC

12-Bit

FVR

Te mp .

Indicator

EUSART

Comparators

MSSPTimer2Timer1Timer0

DAC

CCPs

PSMCsOp Amps

PORTD

(1)

HFINTOSC/

PORTE

FIGURE 1-1: PIC16(L)F1788/9 BLOCK DIAGRAM

DS41675A-page 16 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

TABLE 1-2: PIC16(L)F1788 PINOUT DESCRIPTION

Input

Name Function

RA0/AN0/C1IN0-/C2IN0-/
C3IN0-/C4IN0-/SS

(1)

RA0 TTL/ST CMOS General purpose I/O.

AN0 AN — ADC Channel 0 input.

C1IN0-

C2IN0-

C3IN0-

C4IN0-

SS

RA1/AN1/C1IN1-/C2IN1-/
C3IN1-/C4IN1-/OPA1OUT

RA1 TTL/ST CMOS General purpose I/O.

AN1 AN — ADC Channel 1 input.

C1IN1-

C2IN1-

C3IN1-

C4IN1-

OPA1OUT

RA2/AN2/C1IN0+/C2IN0+/
C3IN0+/C4IN0+/DAC1OUT1/

REF-/DAC1VREF-

V

RA2 TTL/ST CMOS General purpose I/O.

AN2 AN — ADC Channel 2 input.

C1IN0+

C2IN0+

C3IN0+

C4IN0+

DAC1OUT1 — AN Digital-to-Analog Converter output.

REF- AN — ADC Negative Voltage Reference input.

V

REF- AN — Digital-to-Analog Converter negative reference.

DAC1V

RA3/AN3/V
DAC1V
DAC3V

REF+/C1IN1+/
REF+/DAC2VREF+/
REF+/DAC4VREF+

RA3 TTL/ST CMOS General purpose I/O.

AN3 AN — ADC Channel 3 input.

REF+ AN — ADC Voltage Reference input.

V

C1IN1+

DAC1VREF+ AN — Digital-to-Analog Converter positive reference.

REF+ AN — Digital-to-Analog Converter positive reference.

DAC2V

DAC3V

REF+ AN — Digital-to-Analog Converter positive reference.

REF+ AN — Digital-to-Analog Converter positive reference.

DAC4V

RA4/C1OUT/OPA1IN+/T0CKI/
DAC4OUT1

RA4 TTL/ST CMOS General purpose I/O.

C1OUT

OPA1IN+

T0CKI ST — Timer0 clock input.

DAC4OUT1 — AN Digital-to-Analog Converter output.

RA5/AN4/C2OUT/OPA1IN-/

(1)

/DAC2OUT1

SS

RA5 TTL/ST CMOS General purpose I/O.

AN4 AN — ADC Channel 4 input.

C2OUT

OPA1IN-

SS

DAC2OUT1 — AN Digital-to-Analog Converter output.

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

2: All pins have interrupt-on-change functionality.

Output

Typ e

Typ e

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN — Comparator C4 negative input.

ST — Slave Select input.

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN — Comparator C4 negative input.

—AN

AN — Comparator C1 positive input.

AN — Comparator C2 positive input.

AN — Comparator C3 positive input.

AN — Comparator C4 positive input.

AN — Comparator C1 positive input.

—

CMOS

AN —

—

CMOS

AN —

Operational Amplifier 1 output.

Comparator C1 output.

Operational Amplifier 1 non-inverting input.

Comparator C2 output.

Operational Amplifier 1 inverting input.

Description

ST — Slave Select input.

2

C™ = Schmitt Trigger input with I2C

 2013 Microchip Technology Inc. Preliminary DS41675A-page 17

PIC16(L)F1788/9

TABLE 1-2: PIC16(L)F1788 PINOUT DESCRIPTION (CONTINUED)

Input

Name Function

RA6/C2OUT
CLKOUT/V

RA7/PSMC1CLK/PSMC2CLK/
PSMC3CLK/PSMC4CLK/OSC1/
CLKIN

RB0/AN12/C2IN1+/PSMC1IN/
PSMC2IN/PSMC3IN/PSMC4IN/
CCP1

RB1/AN10/C1IN3-/C2IN3-/
C3IN3-/C4IN3-/OPA2OUT

RB2/AN8/OPA2IN-/CLKR/
DAC3OUT1

RB3/AN9/C1IN2-/C2IN2-/
C3IN2-/OPA2IN+/CCP2

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

(1)

/OSC2/

CAP

(1)

/INT

(1)

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

2: All pins have interrupt-on-change functionality.

RA6 TTL/ST CMOS General purpose I/O.

C2OUT

OSC2 — XTAL Crystal/Resonator (LP, XT, HS modes).

CLKOUT — CMOS F

V

CAP Power Power Filter capacitor for Voltage Regulator.

RA7 TTL/ST CMOS General purpose I/O.

PSMC1CLK

PSMC2CLK ST — PSMC2 clock input.

PSMC3CLK ST — PSMC3 clock input.

PSMC4CLK ST — PSMC4 clock input.

OSC1 — XTAL Crystal/Resonator (LP, XT, HS modes).

CLKIN ST — External clock input (EC mode).

RB0 TTL/ST CMOS General purpose I/O.

AN12 AN — ADC Channel 12 input.

C2IN1+

PSMC1IN ST — PSMC1 Event Trigger input.

PSMC2IN ST — PSMC2 Event Trigger input.

PSMC3IN ST — PSMC3 Event Trigger input.

PSMC4IN ST — PSMC4 Event Trigger input.

CCP1 ST CMOS Capture/Compare/PWM1.

INT ST — External interrupt.

RB1 TTL/ST CMOS General purpose I/O.

AN10 AN — ADC Channel 10 input.

C1IN3-

C2IN3-

C3IN3-

C4IN3-

OPA2OUT

RB2 TTL/ST CMOS General purpose I/O.

AN8 AN — ADC Channel 8 input.

OPA2IN-

CLKR

DAC3OUT1 — AN Digital-to-Analog Converter output.

RB3 TTL/ST CMOS General purpose I/O.

AN9 AN — ADC Channel 9 input.

C1IN2-

C2IN2-

C3IN2-

OPA2IN+

CCP2 ST CMOS Capture/Compare/PWM2.

Output

Typ e

Typ e

—

CMOS

ST — PSMC1 clock input.

AN — Comparator C2 positive input.

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN — Comparator C4 negative input.

—AN

AN —

—CMOS

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN —

Comparator C2 output.

OSC/4 output.

Operational Amplifier 2 output.

Operational Amplifier 2 inverting input.

Clock output.

Operational Amplifier 2 non-inverting input.

Description

2

C™ = Schmitt Trigger input with I2C

DS41675A-page 18 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

TABLE 1-2: PIC16(L)F1788 PINOUT DESCRIPTION (CONTINUED)

Input

Name Function

RB4/AN11/C3IN1+/SS

(1)

RB4 TTL/ST CMOS General purpose I/O.

AN11 AN — ADC Channel 11 input.

C3IN1+

SS

RB5/AN13/C4IN2-/T1G/CCP3

(1)

SDO

/C3OUT

(1)

RB5 TTL/ST CMOS General purpose I/O.

AN13 AN — ADC Channel 13 input.

C4IN2-

T1G ST — Timer1 gate input.

CCP3 ST CMOS Capture/Compare/PWM3.

SDO — CMOS SPI data output.

RB6/C4IN1+/TX

(1)

/ICSPCLK

SDA

(1)

(1)

/CK

/SDI

(1)

/

C3OUT —

RB6 TTL/ST CMOS General purpose I/O.

C4IN1+

TX — CMOS USART asynchronous transmit.

CK ST CMOS USART synchronous clock.

SDI ST — SPI data input.

SDA I

ICSPCLK ST — Serial Programming Clock.

RB7/DAC1OUT2/DAC2OUT2/
DAC3OUT2/DAC4OUT2/RX

(1)

(1)

DT

/SCK

/SCL

(1)

/ICSPDAT

(1)

RB7 TTL/ST CMOS General purpose I/O.

/

DAC1OUT2 — AN Voltage Reference output.

DAC2OUT2 — AN Voltage Reference output.

DAC3OUT2 — AN Voltage Reference output.

DAC4OUT2 — AN Voltage Reference output.

RX ST — USART asynchronous input.

DT ST CMOS USART synchronous data.

SCK ST CMOS SPI clock.

SCL I

ICSPDAT ST CMOS ICSP™ Data I/O.

RC0/SOSCO/T1CKI/PSMC1A RC0 TTL/ST CMOS General purpose I/O.

SOSCO XTAL XTAL Secondary Oscillator Connection.

T1CKI ST — Timer1 clock input.

PSMC1A — CMOS PSMC1 output A.

RC1/SOSCI/PSMC1B/CCP2 RC1 TTL/ST CMOS General purpose I/O.

SOSCI XTAL XTAL Secondary Oscillator Connection.

PSMC1B — CMOS PSMC1 output B.

CCP2 ST CMOS Capture/Compare/PWM2.

RC2/PSMC1C/PSMC3B/CCP1 RC2 TTL/ST CMOS General purpose I/O.

PSMC1C — CMOS PSMC1 output C.

PSMC3B — CMOS PSMC3 output B.

CCP1 ST CMOS Capture/Compare/PWM1.

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

2: All pins have interrupt-on-change functionality.

Output

Typ e

Typ e

AN — Comparator C3 positive input.

ST — Slave Select input.

AN — Comparator C4 negative input.

CMOS

AN — Comparator C4 positive input.

2

CODI2C™ data input/output.

2

CODI2C™ clock.

Comparator C3 output.

Description

2

C™ = Schmitt Trigger input with I2C

 2013 Microchip Technology Inc. Preliminary DS41675A-page 19

PIC16(L)F1788/9

TABLE 1-2: PIC16(L)F1788 PINOUT DESCRIPTION (CONTINUED)

Input

Name Function

RC3/PSMC1D/PSMC4A/SCK/
SCL

RC4/PSMC1E/PSMC4B/SDI/
SDA

RC5/PSMC1F/PSMC3A/SDO RC5 TTL/ST CMOS General purpose I/O.

RC6/PSMC2A/TX/CK/CCP3 RC6 TTL/ST CMOS General purpose I/O.

RC7/C4OUT/PSMC2B/RX/DT RC7 TTL/ST CMOS General purpose I/O.

RE3/MCLR

DD VDD Power — Positive supply.

V

V

SS VSS Power — Ground reference.

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

/VPP

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

2: All pins have interrupt-on-change functionality.

RC3 TTL/ST CMOS General purpose I/O.

PSMC1D — CMOS PSMC1 output D.

PSMC4A — CMOS PSMC4 output A.

SCK ST CMOS SPI clock.

SCL I

RC4 TTL/ST CMOS General purpose I/O.

PSMC1E — CMOS PSMC1 output E.

PSMC4B — CMOS PSMC4 output B.

SDI ST — SPI data input.

SDA I

PSMC1F — CMOS PSMC1 output F.

PSMC3A — CMOS PSMC3 output A.

SDO — CMOS SPI data output.

PSMC2A — CMOS PSMC2 output A.

TX — CMOS USART asynchronous transmit.

CK ST CMOS USART synchronous clock.

CCP3 ST CMOS Capture/Compare/PWM3.

C4OUT —

PSMC2B — CMOS PSMC2 output B.

RX ST — USART asynchronous input.

DT ST CMOS USART synchronous data.

RE3 TTL/ST — General purpose input.

MCLR

PP HV — Programming voltage.

V

Output

Typ e

Typ e

2

CODI2C™ clock.

2

CODI2C™ data input/output.

CMOS

ST — Master Clear with internal pull-up.

Comparator C4 output.

Description

2

C™ = Schmitt Trigger input with I2C

DS41675A-page 20 Preliminary  2013 Microchip Technology Inc.

TABLE 1-3: PIC16(L)F1789 PINOUT DESCRIPTION

Input

Name Function

Typ e

Output

Typ e

PIC16(L)F1788/9

Description

RA0/AN0/C1IN0-/C2IN0-/
C3IN0-/C4IN0-/SS

(1)

RA1/AN1/C1IN1-/C2IN1-/
C3IN1-/C4IN1-/OPA1OUT

RA2/AN2/C1IN0+/C2IN0+/
C3IN0+/C4IN0+/DAC1OUT1/

REF-/DAC1VREF-

V

RA0 TTL/ST CMOS General purpose I/O.

AN0 AN — ADC Channel 0 input.

C1IN0-

C2IN0-

C3IN0-

C4IN0-

SS

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN — Comparator C4 negative input.

ST — Slave Select input.

RA1 TTL/ST CMOS General purpose I/O.

AN1 AN — ADC Channel 1 input.

C1IN1-

C2IN1-

C3IN1-

C4IN1-

OPA1OUT

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN — Comparator C4 negative input.

—AN

Operational Amplifier 1 output.

RA2 TTL/ST CMOS General purpose I/O.

AN2 AN — ADC Channel 2 input.

C1IN0+

C2IN0+

C3IN0+

C4IN0+

AN — Comparator C1 positive input.

AN — Comparator C2 positive input.

AN — Comparator C3 positive input.

AN — Comparator C4 positive input.

DAC1OUT1 — AN Digital-to-Analog Converter output.

REF- AN — ADC Negative Voltage Reference input.

V

REF- AN — Digital-to-Analog Converter negative reference.

DAC1V

RA3/AN3/V
DAC1V
DAC3V

REF+/C1IN1+/
REF+/DAC2VREF+/
REF+/DAC4VREF+

RA3 TTL/ST CMOS General purpose I/O.

AN3 AN — ADC Channel 3 input.

REF+ AN — ADC Voltage Reference input.

V

C1IN1+

AN — Comparator C1 positive input.

DAC1VREF+ AN — Digital-to-Analog Converter positive reference.

REF+ AN — Digital-to-Analog Converter positive reference.

DAC2V

DAC3V

REF+ AN — Digital-to-Analog Converter positive reference.

REF+ AN — Digital-to-Analog Converter positive reference.

DAC4V

RA4/C1OUT/OPA1IN+/T0CKI RA4 TTL/ST CMOS General purpose I/O.

C1OUT

OPA1IN+

—

CMOS

AN —

Comparator C1 output.

Operational Amplifier 1 non-inverting input.

T0CKI ST — Timer0 clock input.

RA5/AN4/C2OUT/OPA1IN-/

(1)

/DAC2OUT1

SS

RA5 TTL/ST CMOS General purpose I/O.

AN4 AN — ADC Channel 4 input.

C2OUT

OPA1IN-

SS

—

CMOS

AN —

ST — Slave Select input.

Comparator C2 output.

Operational Amplifier 1 inverting input.

DAC2OUT1 — AN Digital-to-Analog Converter output.

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I

2

C™ = Schmitt Trigger input with I2C

HV = High Voltage XTAL = Crystal levels

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

2: All pins have interrupt-on-change functionality.

 2013 Microchip Technology Inc. Preliminary DS41675A-page 21

PIC16(L)F1788/9

TABLE 1-3: PIC16(L)F1789 PINOUT DESCRIPTION (CONTINUED)

Input

Name Function

RA6/C2OUT
CLKOUT/V

RA7/PSMC1CLK/PSMC2CLK/
PSMC3CLK/PSMC4CLK/OSC1/
CLKIN

RB0/AN12/C2IN1+/PSMC1IN/
PSMC2IN/PSMC3IN/PSMC4IN/
CCP1

RB1/AN10/C1IN3-/C2IN3-/
C3IN3-/C4IN3-/OPA2OUT

RB2/AN8/OPA2IN-/CLKR/
DAC3OUT1

RB3/AN9/C1IN2-/C2IN2-/
C3IN2-/OPA2IN+/CCP2

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

(1)

/OSC2/

CAP

(1)

/INT

(1)

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

2: All pins have interrupt-on-change functionality.

RA6 TTL/ST CMOS General purpose I/O.

C2OUT

OSC2 — XTAL Crystal/Resonator (LP, XT, HS modes).

CLKOUT — CMOS F

V

CAP Power Power Filter capacitor for Voltage Regulator.

RA7 TTL/ST CMOS General purpose I/O.

PSMC1CLK

PSMC2CLK ST — PSMC2 clock input.

PSMC3CLK ST — PSMC3 clock input.

PSMC4CLK ST — PSMC4 clock input.

OSC1 — XTAL Crystal/Resonator (LP, XT, HS modes).

CLKIN ST — External clock input (EC mode).

RB0 TTL/ST CMOS General purpose I/O.

AN12 AN — ADC Channel 12 input.

C2IN1+

PSMC1IN ST — PSMC1 Event Trigger input.

PSMC2IN ST — PSMC2 Event Trigger input.

PSMC3IN ST — PSMC3 Event Trigger input.

PSMC4IN ST — PSMC4 Event Trigger input.

CCP1 ST CMOS Capture/Compare/PWM1.

INT ST — External interrupt.

RB1 TTL/ST CMOS General purpose I/O.

AN10 AN — ADC Channel 10 input.

C1IN3-

C2IN3-

C3IN3-

C4IN3-

OPA2OUT

RB2 TTL/ST CMOS General purpose I/O.

AN8 AN — ADC Channel 8 input.

OPA2IN-

CLKR

DAC3OUT1 — AN Digital-to-Analog Converter output.

RB3 TTL/ST CMOS General purpose I/O.

AN9 AN — ADC Channel 9 input.

C1IN2-

C2IN2-

C3IN2-

OPA2IN+

CCP2 ST CMOS Capture/Compare/PWM2.

Output

Typ e

Typ e

—

CMOS

ST — PSMC1 clock input.

AN — Comparator C2 positive input.

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN — Comparator C4 negative input.

—AN

AN —

—CMOS

AN — Comparator C1 negative input.

AN — Comparator C2 negative input.

AN — Comparator C3 negative input.

AN —

Comparator C2 output.

OSC/4 output.

Operational Amplifier 2 output.

Operational Amplifier 2 inverting input.

Clock output.

Operational Amplifier 2 non-inverting input.

Description

2

C™ = Schmitt Trigger input with I2C

DS41675A-page 22 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

TABLE 1-3: PIC16(L)F1789 PINOUT DESCRIPTION (CONTINUED)

Input

Name Function

RB4/AN11/C3IN1+/SS

(1)

RB4 TTL/ST CMOS General purpose I/O.

AN11 AN — ADC Channel 11 input.

C3IN1+

SS

RB5/AN13/C4IN2-/T1G/CCP3

(1)

SDO

(1)

RB5 TTL/ST CMOS General purpose I/O.

AN13 AN — ADC Channel 13 input.

C4IN2-

T1G ST — Timer1 gate input.

CCP3 ST CMOS Capture/Compare/PWM3.

SDO — CMOS SPI data output.

RB6/C4IN1+/TX

(1)

/ICSPCLK

SDA

/CK

/SDI

(1)

RB6 TTL/ST CMOS General purpose I/O.

/

C4IN1+

(1)

(1)

TX — CMOS USART asynchronous transmit.

CK ST CMOS USART synchronous clock.

SDI ST — SPI data input.

SDA I

ICSPCLK ST — Serial Programming Clock.

RB7/DAC1OUT2/DAC2OUT2/
DAC3OUT2/DAC4OUT2/RX

(1)

(1)

DT

/SCK

/SCL

(1)

/ICSPDAT

(1)

RB7 TTL/ST CMOS General purpose I/O.

/

DAC1OUT2 — AN Voltage Reference output.

DAC2OUT2 — AN Voltage Reference output.

DAC3OUT2 — AN Voltage Reference output.

DAC4OUT2 — AN Voltage Reference output.

RX ST — USART asynchronous input.

DT ST CMOS USART synchronous data.

SCK ST CMOS SPI clock.

SCL I

ICSPDAT ST CMOS ICSP™ Data I/O.

RC0/SOSCO/T1CKI/PSMC1A RC0 TTL/ST CMOS General purpose I/O.

SOSCO XTAL XTAL Secondary Oscillator Connection.

T1CKI ST — Timer1 clock input.

PSMC1A — CMOS PSMC1 output A.

RC1/SOSCI/PSMC1B/CCP2 RC1 TTL/ST CMOS General purpose I/O.

SOSCI XTAL XTAL Secondary Oscillator Connection.

PSMC1B — CMOS PSMC1 output B.

CCP2 ST CMOS Capture/Compare/PWM2.

RC2/PSMC1C/CCP1 RC2 TTL/ST CMOS General purpose I/O.

PSMC1C — CMOS PSMC1 output C.

CCP1 ST CMOS Capture/Compare/PWM1.

RC3/PSMC1D/SCK/SCL RC3 TTL/ST CMOS General purpose I/O.

PSMC1D — CMOS PSMC1 output D.

SCK ST CMOS SPI clock.

SCL I

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

2: All pins have interrupt-on-change functionality.

Output

Typ e

Typ e

AN — Comparator C3 positive input.

ST — Slave Select input.

AN — Comparator C4 negative input.

AN — Comparator C4 positive input.

2

CODI2C™ data input/output.

2

CODI2C™ clock.

2

CODI2C™ clock.

Description

2

C™ = Schmitt Trigger input with I2C

 2013 Microchip Technology Inc. Preliminary DS41675A-page 23

PIC16(L)F1788/9

TABLE 1-3: PIC16(L)F1789 PINOUT DESCRIPTION (CONTINUED)

Input

Name Function

RC4/PSMC1E/SDI/SDA RC4 TTL/ST CMOS General purpose I/O.

PSMC1E — CMOS PSMC1 output E.

SDI ST — SPI data input.

SDA I

RC5/PSMC1F/SDO RC5 TTL/ST CMOS General purpose I/O.

PSMC1F — CMOS PSMC1 output F.

SDO — CMOS SPI data output.

RC6/PSMC2A/TX/CK RC6 TTL/ST CMOS General purpose I/O.

PSMC2A — CMOS PSMC2 output A.

TX — CMOS USART asynchronous transmit.

CK ST CMOS USART synchronous clock.

RC7/PSMC2B/RX/DT RC7 TTL/ST CMOS General purpose I/O.

PSMC2B — CMOS PSMC2 output B.

RX ST — USART asynchronous input.

DT ST CMOS USART synchronous data.

RD0/OPA3IN+ RD0 TTL/ST CMOS General purpose I/O.

OPA3IN+

RD1/AN21/C1IN4-/C2IN4-/
C3IN4-/C4IN4-/OPA3OUT

RD2/OPA3IN-/DAC4OUT1 RD2 TTL/ST CMOS General purpose I/O.

RD3/PSMC4A RD3 TTL/ST CMOS General purpose I/O.

RD4/PSMC3F RD4 TTL/ST CMOS General purpose I/O.

RD5/PSMC3E RD5 TTL/ST CMOS General purpose I/O.

RD6/C3OUT/PSMC3D RD6 TTL/ST CMOS General purpose I/O.

RD7/C4OUT/PSMC3C RD7 TTL/ST CMOS General purpose I/O.

RE0/AN5/CCP3/PSMC4B

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

2: All pins have interrupt-on-change functionality.

RD1 TTL/ST CMOS General purpose I/O.

AN21 AN — ADC Channel 21 input.

C1IN4-

C2IN4-

C3IN4-

C4IN4-

OPA3OUT

OPA3IN-

DAC4OUT1 — AN Digital-to-Analog Converter output.

PSMC4A — CMOS PSMC4 output A.

PSMC3F — CMOS PSMC3 output F.

PSMC3E — CMOS PSMC3 output E.

C3OUT

PSMC3D — CMOS PSMC3 output D.

C4OUT

PSMC3C — CMOS PSMC3 output C.

RE0 TTL/ST — General purpose input.

AN5 AN — ADC Channel 5 input.

CCP3 ST CMOS Capture/Compare/PWM3.

PSMC4B — CMOS PSMC4 output B.

Output

Typ e

Typ e

2

CODI2C™ data input/output.

AN —

AN — Comparator C4 negative input.

AN — Comparator C4 negative input.

AN — Comparator C4 negative input.

AN — Comparator C4 negative input.

—AN

AN —

—

CMOS

—

CMOS

Operational Amplifier 3 non-inverting input.

Operational Amplifier 3 output.

Operational Amplifier 3 inverting input.

Comparator C3 output.

Comparator C4 output.

Description

2

C™ = Schmitt Trigger input with I2C

DS41675A-page 24 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

TABLE 1-3: PIC16(L)F1789 PINOUT DESCRIPTION (CONTINUED)

Input

Name Function

RE1/AN6/PSMC3B RE1 TTL/ST CMOS General purpose I/O.

AN6 AN — ADC Channel 6 input.

PSMC3B — CMOS PSMC3 output B.

RE2/AN7/PSMC3A RE2 TTL/ST CMOS General purpose I/O.

AN7 AN — ADC Channel 7 input.

PSMC3A — CMOS PSMC3 output A.

RE3/MCLR

DD VDD Power — Positive supply.

V

V

SS VSS Power — Ground reference.

Legend: AN = Analog input or output CMOS = CMOS compatible input or output OD = Open Drain

Note 1: Pin functions can be assigned to one of two locations via software. See Register 13-1.

/VPP

TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
HV = High Voltage XTAL = Crystal levels

2: All pins have interrupt-on-change functionality.

RE3 TTL/ST — General purpose input.

MCLR

PP HV — Programming voltage.

V

Output

Typ e

Typ e

ST — Master Clear with internal pull-up.

Description

2

C™ = Schmitt Trigger input with I2C

 2013 Microchip Technology Inc. Preliminary DS41675A-page 25

PIC16(L)F1788/9

NOTES:

DS41675A-page 26 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

Data Bus

8

14

Program

Bus

Instruction reg

Program Counter

8 Level Stack

(13-bit)

Direct Addr

7

12

Addr MUX

FSR reg

STATUS reg

MUX

ALU

Power-up

Timer

Oscillator

Start-up Timer

Power-on

Reset

Watchdog

Timer

Instruction

Decode &

Control

Timing

Generation

OSC1/CLKIN

OSC2/CLKOUT

V

DD

8

8

Brown-out

Reset

12

3

VSS

Internal

Oscillator

Block

Data Bus

8

14

Program

Bus

Instruction reg

Program Counter

8 Level Stack

(13-bit)

Direct Addr

7

Addr MUX

FSR reg

STATUS reg

MUX

ALU

W reg

Instruction

Decode &

Control

Timing

Generation

V

DD

8

8

3

VSS

Internal

Oscillator

Block

15

Data Bus

8

14

Program

Bus

Instruction Reg

Program Counter

16-Level Stack

(15-bit)

Direct Addr

7

RAM Addr

Addr MUX

Indirect

Addr

FSR0 Reg

STATUS Reg

MUX

ALU

Instruction

Decode and

Control

Timing

Generation

VDD

8

8

3

VSS

Internal

Oscillator

Block

RAM

FSR regFSR reg

FSR1 Reg

15

15

MUX

15

Program Memory

Read (PMR)

12

FSR regFSR reg

BSR Reg

5

ConfigurationConfigurationConfiguration

Flash

Program

Memory

2.0 ENHANCED MID-RANGE CPU

This family of devices contain an enhanced mid-range
8-bit CPU core. The CPU has 49 instructions. Interrupt
capability includes automatic context saving. The
hardware stack is 16 levels deep and has Overflow and
Underflow Reset capability. Direct, Indirect, and

FIGURE 2-1: CORE BLOCK DIAGRAM

Relative addressing modes are available. Two File
Select Registers (FSRs) provide the ability to read
program and data memory.

• Automatic Interrupt Context Saving

• 16-level Stack with Overflow and Underflow

• File Select Registers

• Instruction Set

 2013 Microchip Technology Inc. Preliminary DS41675A-page 27

PIC16(L)F1788/9

2.1 Automatic Interrupt Context Saving

During interrupts, certain registers are automatically
saved in shadow registers and restored when returning
from the interrupt. This saves stack space and user
code. See 8.5 “Automatic Context Saving” for more
information.

2.2 16-level Stack with Overflow and Underflow

These devices have an external stack memory 15 bits
wide and 16 words deep. A Stack Overflow or Under­flow will set the appropriate bit (STKOVF or STKUNF)
in the PCON register, and if enabled will cause a soft­ware Reset. See Section 3.5 “Stack” for more details.

2.3 File Select Registers

There are two 16-bit File Select Registers (FSR). FSRs
can access all file registers and program memory,
which allows one Data Pointer for all memory. When an
FSR points to program memory, there is one additional
instruction cycle in instructions using INDF to allow the
data to be fetched. General purpose memory can now
also be addressed linearly, providing the ability to
access contiguous data larger than 80 bytes. There are
also new instructions to support the FSRs. See

Section 3.6 “Indirect Addressing” for more details.

2.4 Instruction Set

There are 49 instructions for the enhanced mid-range
CPU to support the features of the CPU. See

Section 30.0 “Instruction Set Summary” for more

details.

DS41675A-page 28 Preliminary  2013 Microchip Technology Inc.

PIC16(L)F1788/9

3.0 MEMORY ORGANIZATION

These devices contain the following types of memory:

• Program Memory

- Configuration Words

- Device ID

-User ID

- Flash Program Memory

• Data Memory

- Core Registers

- Special Function Registers

- General Purpose RAM

- Common RAM

• Data EEPROM memory

Note 1: The Data EEPROM Memory and the

method to access Flash memory through
the EECON registers is described in

Section 12.0 “Data EEPROM and Flash
Program Memory Control”.

(1)

The following features are associated with access and
control of program memory and data memory:

• PCL and PCLATH

•Stack

• Indirect Addressing

3.1 Program Memory Organization

The enhanced mid-range core has a 15-bit program
counter capable of addressing a 32K x 14 program
memory space. Table 3-1 shows the memory sizes
implemented for the PIC16(L)F1788/9 family. Accessing
a location above these boundaries will cause a
wrap-around within the implemented memory space.
The Reset vector is at 0000h and the interrupt vector is
at 0004h (see Figure 3-1).

TABLE 3-1: DEVICE SIZES AND ADDRESSES

Device Program Memory Space (Words) Last Program Memory Address

PIC16(L)F1788/9 16,384 07FFh

 2013 Microchip Technology Inc. Preliminary DS41675A-page 29

PIC16(L)F1788/9

PC<14:0>

15

0000h

0004h

Stack Level 0

Stack Level 15

Reset Vector

Interrupt Vector

Stack Level 1

0005h

On-chip
Program
Memory

Page 0

07FFh

Rollover to Page 0

0800h

0FFFh
1000h

7FFFh

Page 1

Rollover to Page 7

Page 2

Page 3

17FFh
1800h

1FFFh
2000h

Page 4

Page 7

3FFFh
4000h

CALL, CALLW

RETURN, RETLW

Interrupt, RETFIE

constants

BRW ;Add Index in W to

;program counter to

;select data
RETLW DATA0 ;Index0 data
RETLW DATA1 ;Index1 data
RETLW DATA2
RETLW DATA3

my_function

;… LOTS OF CODE…
MOVLW DATA_INDEX
call constants
;… THE CONSTANT IS IN W

FIGURE 3-1: PROGRAM MEMORY MAP

AND STACK FOR
PIC16(L)F1788/9

3.1.1 READING PROGRAM MEMORY AS DATA

There are two methods of accessing constants in
program memory. The first method is to use tables of
RETLW instructions. The second method is to set an
FSR to point to the program memory.

3.1.1.1 RETLW Instruction

The RETLW instruction can be used to provide access
to tables of constants. The recommended way to create
such a table is shown in Example 3-1.

EXAMPLE 3-1: RETLW INSTRUCTION

The BRW instruction makes this type of table very
simple to implement. If your code must remain portable
with previous generations of microcontrollers, then the
BRW instruction is not available so the older table read
method must be used.

3.1.1.2 Indirect Read with FSR

The program memory can be accessed as data by
setting bit 7 of the FSRxH register and reading the
matching INDFx register. The MOVIW instruction will
place the lower 8 bits of the addressed word in the W
register. Writes to the program memory cannot be per­formed via the INDF registers. Instructions that access
the program memory via the FSR require one extra
instruction cycle to complete. Example 3-2
demonstrates accessing the program memory via an
FSR.

The high directive will set bit<7> if a label points to a
location in program memory.

DS41675A-page 30 Preliminary  2013 Microchip Technology Inc.