Datasheet PI74LPT16543A, PI74LPT16543V Datasheet (PERICOM)

PI74LPT16543

16-BIT LATCHED TRANSCEIVERS

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PS2072A 01/16/97

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PI74LPT16543

Fast CMOS 16-Bit Latched Transceivers

Product Description

Pericom Semiconductor’s PI74LPT series of logic circuits are pro­duced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.

The PI74LPT16543 is 16-bit latched transceivers organized with
two sets of eight D-type latches with separate input and output
controls for each set. For data flow from A to B, for example, the A­to-B Enable (xCEAB) input must be LOW in order to enter data
from xAx or to take data from xBx, as indicated in the Truth Table.
With xCEAB LOW, a LOW signal makes the A-to-B latches
transparent; a subsequent LOW-to-HIGH transition of the xLEAB
signal puts the A latches in the storage mode and their outputs no
longer change the A inputs. With xCEAB and xOEAB both LOW,
the 3-state B output buffers are active and reflect the data present at
the output of the A latches. Control of data from B to A is similar,
but uses the xCEAB, xLEAB, and xOEAB inputs.

The PI74LPT16543 can be driven from either 3.3V or 5.0V devices
allowing this device to be used as a translator in a mixed 3.3/5.0V
system.

Product Features

• Compatible with LCX™ and LVT™ families of products

• Supports 5V Tolerant Mixed Signal Mode Operation
– Input can be 3V or 5V
– Output can be 3V or connected to 5V bus

• Advanced Low Power CMOS Operation

• Excellent output drive capability:
Balanced drives (24 mA sink and source)

• Pin compatible with industry standard double-density
pinouts

• Low ground bounce outputs

• Hysteresis on all inputs

• Industrial operating temperature range: –40°C to +85°C

• Multiple center pins and distributed Vcc/GND pins
minimize switching noise

• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)

1B0

D

C

1A0

TO 7 OTHER CHANNELS

D

C

1

LEAB

1

CEAB

1

OEAB

1

LEBA

1

CEBA

1

OEBA

2B0

D

C

2A0

TO 7 OTHER CHANNELS

D

C

2

LEAB

2

CEAB

2

OEAB

2

LEBA

2

CEBA

2

OEBA

Logic Block Diagram

PI74LPT16543

16-BIT LATCHED TRANSCEIVERS

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PS2072A 01/16/97

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Product Pin Description

Pin Name Description

xOEAB A-to-B Output Enable Input (Active LOW)
xOEBA B-to-A Output Enable Input (Active LOW)
xCEAB A-to-B Enable Input (Active LOW)
xCEBA B-to-A Enable Input (Active LOW)
xLEAB A-to-B Latch Enable Input (Active LOW)
xLEBA B-to-A Latch Enable Input (Active LOW)
xAx A-to-B Data Inputs or B-to-A 3-State Outputs
xBx B-to-A Data Inputs or B-to-A 3-State Outputs
GND Ground
VCC Power

Latch Output

Inputs Status Buffers

XCEAB XLEAB XOEAB XAX TO XBXXBX

H X X Storing High Z
X H X Storing X
X X H X High Z
L L L Transparent Current A Inputs
L H L Storing Previous* A Inputs

Product Pin Configuration

1OEAB

1LEAB

1CEAB

GND

1A0
1A1

VCC

1A2
1A3
1A4

GND

1A5
1A6
1A7
2A0
2A1
2A2

GND

2A3
2A4
2A5

VCC

2A6
2A7

GND

2CEAB

2LEAB

2OEAB

1OEBA
1LEBA
1CEBA

GND

1B0
1B1

VCC

1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5

VCC

2B6
2B7

GND

2CEBA
2LEBA
2OEBA

Truth Table

(1)

NOTES:

1. *Before xLEAB LOW-to-HIGH Transistion
H = High Voltage Level
L = Low Voltage Level
X = Don't Care or Irrelevant
Z = High Impedance

2. A-to-B data flow shown. B-to-A flow control
is the same, except using xCEBA, xLEBA,
and xOEBA.

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26
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31

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29

56-PIN

V56
A56

PI74LPT16543

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PS2072A 01/16/97

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DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 2.7V to 3.6V)

Parameters Description Test Conditions

(1)

Min. Typ

(2)

Max. Units

VIH Input HIGH Voltage (Input pins) Guaranteed Logic HIGH Level 2.2 — 5.5 V

Input HIGH Voltage (I/O pins) 2.0 — 5.5 V

VIL Input LOW Voltage Guaranteed Logic LOW Level –0.5 — 0.8 V

(Input and I/O pins)

IIH Input HIGH Current (Input pins) VCC = Max. VIN = 5.5V — — ±1 µA

Input HIGH Current (I/O pins) VCC = Max. VIN = VCC ——±1µA

IIL Input LOW Current (Input pins) VCC = Max. VIN = GND — — ±1 µA

Input LOW Current (I/O pins) VCC = Max. VIN = GND — — ±1 µA
IOZH High Impedance Output Current VCC = Max. VOUT = 5.5V — — ±1 µA
IOZL (3-State Output pins) VCC = Max. VOUT = GND — — ±1 µA
VIK Clamp Diode Voltage VCC = Min., IIN = –18 mA — –0.7 –1.2 V
IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V

(3)

–36 –60 –110 mA

IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V

(3)

50 90 200 mA

VOH Output HIGH Voltage VCC = Min. IOH = –0.1 mA Vcc-0.2 — — V

VIN = VIH or VIL IOH = –3 mA 2.4 3.0 — V
VCC = 3.0V, IOH = –8 mA 2.4

(5)

3.0 — V

VIN = VIH or VIL IOH = –24 mA 2.0 — —

VOL Output LOW Voltage VCC = Min. IOL = 0.1 mA — — 0.2 V

VIN = VIH or VIL IOL = 16 mA — 0.2 0.4 V

IOL = 24 mA — 0.3 0.5 V

IOS Short Circuit Current

(4)

VCC = Max.

(3)

, VOUT = GND –60 –85 –240 mA

IOFF Power Down Disable VCC = 0V, VIN or VOUT

≤≤

≤≤

≤ 4.5V — — ±100 µA

VH Input Hysteresis — 150 — mV

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Note:

Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the de­vice. This is a stress rating only and functional opera­tion of the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 3.3V, +25°C ambient and maximum loading.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. This parameter is guaranteed but not tested.

5. VOH = VCC – 0.6V at rated current.

Storage Temperature.............................................................–55°C to +125°C

Ambient Temperature with Power Applied............................ –40°C to +85°C

Supply Voltage to Ground Potential (Inputs & Vcc Only)......–0.5V to +7.0V

Supply Voltage to Ground Potential (Outputs & D/O Only) ..–0.5V to +7.0V

DC Input Voltage ....................................................................–0.5V to +7.0V

DC Output Current ..............................................................................120 mA

Power Dissipation.................................................................................... 1.0W

PI74LPT16543

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Power Supply Characteristics

Parameters Description Test Conditions

(1)

Min. Typ

(2)

Max. Units

ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 0.1 10 µA
∆ICC Quiescent Power Supply Current VCC = Max. VIN = VCC – 0.6V

(3)

2.0 30 µA

TTL Inputs HIGH

ICCD Dynamic Power Supply

(4)

VCC = Max., VIN = VCC 50 75 µA/
Outputs Open VIN = GND MHz

XOE = GND

One Bit Toggling
50% Duty Cycle

IC Total Power Supply VCC = Max., VIN = VCC – 0.6V 0.6 2.3 mA

Current

(6)

Outputs Open VIN = GND
fI = 10 MHZ
50% Duty Cycle

XOE = GND

One Bit Toggling
VCC = Max., VIN = VCC – 0.6V 2.1 4.7

(5)

Outputs Open VIN = GND
fI = 2.5 MHZ
50% Duty Cycle

XOE = GND

16 Bits Toggling

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.

2. Typical values are at Vcc = 3.3V, +25°C ambient.

3. Per TTL driven input; all other inputs at Vcc or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.

6. IC =IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.

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Switching Characteristics over Operating Range

(1)

LPT16543 LPT16543A LPT16543C

Com. Com. Com.

Parameters Description Conditions

(2)

Min

(3)

Max Min

(3)

Max Min

(3)

Max Unit

t

PLH

Propagation Delay CL = 50 pF 2.5 8.5 2.5 6.5 2.5 5.3 ns

t

PHL

Transparent Mode RL = 500

Ω

xAx to xBx or xBx to xAx

t

PLH

Propagation Delay 2.5 12.5 2.5 8.0 2.5 7.0 ns

t

PHL

xLEBA to xAx, xLEAB to xBx

t

PZH

Output Enable Time 2.0 12.0 2.0 9.0 2.0 8.0 ns

t

PZL

xOEBA or xOEAB to xAx or xBx

t

PHZ

Output Disable Time

(4)

2.0 9.0 2.0 7.5 2.0 6.5 ns

t

PLZ

xOEBA or xOEAB to xAx or xBx

t

SU

Setup Time HIGH or LOW 3.0 — 2.0 — 2.0 — ns
xAx or xBx to xLEAB or xLEBA

t

H

Hold Time HIGH or LOW 2.0 — 2.0 — 2.0 — ns
xAx or xBx to xLEAB or xLEBA

t

W

xLEAB or xLEBA Pulse Width 5.0 — 5.0 — 5.0 — ns
LOW

t

SK

(o) Output Skew

(5)

— 0.5 — 0.5 — 0.5 ns

Notes:

1. Propagation Delays and Enable/Disable times are with Vcc = 3.3V ±0.3V, normal range. For Vcc = 2.7V, extended
range, all Propagation Delays and Enable/Disable times should be degraded by 20%.

2. See test circuit and wave forms.

3. Minimum limits are guaranteed but not tested on Propagation Delays.

4. This parameter is guaranteed but not production tested.

5. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed
by design.

Note:

1. This parameter is determined by device characterization but is not production tested.

Capacitance (TA = 25°C, f = 1 MHz)

Parameters

(1)

Description Test Conditions Typ Max. Units

CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 5.5 8 pF

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax [phone] • http://www.pericom.com