Datasheet PI74LPT162Q952A, PI74LPT162Q952V Datasheet (PERICOM)

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Product Description

Pericom Semiconductors PI74LPT series of logic circuits are
produced in the Companys advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.

The PI74LPT162Q952 has 16-bit registered transceivers organized
with two sets of eight D-type latches with separate input and output
controls for each set. For data flow from A to B, for example, the
A-to-B Enable (xCEAB) input must be LOW to enter data from xAx.
The data present on the A port will be clocked on the B register when
xCLKAB toggles from LOW-to-HIGH. The xOEAB control performs
the output enable function on the B port. Control of data from B to
A is similar, but uses the xCEAB, xCLKAB, and xOEAB inputs. By
connecting the control pins of the two independent transceivers
together, a full 16-bit operation can be achieved. The output buffers
are designed with a Power-Off disable allowing live insertion of
boards when used as backplane drivers.

The PI74LPT162Q952 can be driven from either 3.3V or 5.0V devices
allowing this device to be used as a translator in a mixed

3.3/5.0V system.

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PI74LPT162Q952

Fast CMOS 3.3V

16-Bit Registered Transceivers

Logic Block Diagram

D

1

CLKAB

C

1

OEAB

1

CEAB

1

CLKBA

1

CEBA

1B0

TO 7 OTHER CHANNELS

D

C

1A0

1

OEBA

D

2

CLKAB

C

2

OEAB

2

CEAB

2

CLKBA

2

CEBA

2B0

TO 7 OTHER CHANNELS

D

C

2A0

2

OEBA

Product Features

 Compatible with LCX and LVT families of products
 Supports 5V Tolerant Mixed Signal Mode Operation

 Input can be 3V or 5V

 Output can be 3V or connected to 5V bus
 Advanced Low Power CMOS Operation
 Excellent output drive capability:

Balanced drives (12mA sink and source)
 25-Ohm Series resistor on outputs to reduce

overshoot and undershoot
 Pin compatible with industry standard

double-density pinouts
 Low ground bounce outputs
 Hysteresis on all inputs
 Industrial operating temperature range: 40°C to +85°C
 Multiple center pins and distributed Vcc/GND pins

minimize switching noise
 Packages available:

 56-pin 240 mil wide plastic TSSOP (A)

 56-pin 300 mil wide plastic SSOP (V)

PI74LPT162Q952

3.3V 16-Bit Registered Transceivers

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Product Pin Description

Truth Table

(1,2)

Product Pin Configuration

Notes:

1. H = High Voltage Level
L = Low Voltage Level
X = Dont Care or Irrelevant

↑

= LOW-to-HIGH Transition

Z = High Impedance

2. A-to-B data flow shown. B-to-A flow control
is the same, except using xCEBA, xCLKBA,
and xOEBA.

3. Level of B before the indicated steady-state
input conditions were established.

Pin Name

Description

xOEAB A- to-B Out put Enable Inpu t (Act ive LOW)

X

OEBA B-to- A Output En able Input ( Act ive LOW)

X

CEAB A-to- B Clock Enab le Input (Act ive LOW)

xCEBA B-to-A Clock Enab le Input (Act ive LOW)

X

CL KAB A-to - B C lo ck Inpu t

X

CLKBA B-to-A Clock Input

XAX

A-to-B Data Inputs or B-to-A 3-State Outputs

XBX

B-to-A Data Input s or B-t o-A 3-S tate Outputs

GN D Gro und

V

CC

Power

Inputs Outputs

xCEABxCLKABxOEAB xAx xBx

HXLX B

(3)

XLLX B

(3)

L

↑

LL L

L

↑

LH H

XXHXHigh-Z

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34

33
25
26
27
28

32

31

30

29

1OEAB

1CLKAB

1CEAB

GND

1A0
1A1

VCC

1A2
1A3
1A4

1A5
1A6
1A7
2A0
2A1
2A2

GND

2A3
2A4
2A5

2A6
2A7

VCC

GND

GND

2CEAB

2CLKAB

2OEAB

1OEBA
1CLKBA
1CEBA
GND
1B0
1B1
VCC
1B2
1B3
1B4

1B5
1B6
1B7
2B0
2B1
2B2

GND

2B3
2B4
2B5

2B6
2B7

VCC

GND

GND
2CEBA
2CLKBA
2OEBA

56-Pin

A,V

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PI74LPT162Q952

3.3V 16-Bit Registered Transceivers

Note:

Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.

DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 2.7V to 3.6V)

Parameters Description Test Conditions

(1)

Min. Typ

(2)

Max. Units

VIH Input HIGH Voltage (Input pins) Guaranteed Logic HIGH Level 2.2  5.5 V

Input HIGH Voltage (I/O pins) 2.0  5.5 V

VIL Input LOW Voltage Guaranteed Logic LOW Level 0.5  0.8 V

(Input and I/O pins)

IIH Input HIGH Current (Input pins) VCC = Max. VIN = 5.5V   ±1 µA

Input HIGH Current (I/O pins) VCC = Max. VIN = VCC ±1µA

IIL Input LOW Current (Input pins) VCC = Max. VIN = GND   ±1 µA

Input LOW Current (I/O pins) VCC = Max. VIN = GND   ±1 µA
IOZH High Impedance Output Current VCC = Max. VOUT = 5.5V   ±1 µ A
IOZL (3-State Output pins) VCC = Max. VOUT = GND   ±1 µA
VIK Clamp Diode Voltage VCC = Min., IIN = 1 8m A  70 1.2 V
IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V

(3)

36  110 mA

IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V

(3)

25  100 mA

VOH Output HIGH Voltage VCC = Min. IOH = 12.0mA 2.4 3.0  V

VIN = VIH or VIL

VOL Output LOW Voltage VCC = Min. IOL =12.0mA  0.40 0.55 V

VIN = VIH or VIL

IOS Short Circuit Current

(4)

VCC = Max.

(3)

, VOUT ≤ GN D 60 85 240 mA

IOFF Power Down Disable VCC = 0V, VIN or VOUT  4.5V   ±100 µA
VH Input Hysteresis  150  mV

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 3.3V, +25°C ambient and maximum loading.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. This parameter is guaranteed but not tested.

5. VOH = VCC  0.6V at rated current.

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested)

Storage Temperature ............................................................... 65°C to +150°C

Ambient Temperature with Power Applied .............................. 40°C to +85°C

Supply Voltage to Ground Potential (Inputs & Vcc Only) ......... 0.5V to +7.0V

Supply Voltage to Ground Potential (Outputs & D/O Only) ......0.5V to +7.0V

DC Input Voltage .......................................................................0.5V to +7.0V

DC Output Current ................................................................................ 120 mA

Power Dissipation .................................................................................... 1.0W

PI74LPT162Q952

3.3V 16-Bit Registered Transceivers

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Power Supply Characteristics

Parameters Description Test Conditions

(1)

Min. Typ

(2)

Max. Units

ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 0.1 10 µ A
∆ICC Quiescent Power Supply Current VCC = Max. VIN = VCC  0.6V

(3)

2.0 30 µ A

TTL Inputs HIGH

ICCD Dynamic Power Supply

(4)

VCC = Max., VIN = VCC 50 75 µA/
Outputs Open VIN = GND MHz

XOE = GND

One Bit Toggling
50% Duty Cycle

IC Total Power Supply VCC = Max., VIN = VCC  0.6V 0.6 2.3 mA

Current

(6)

Outputs Open VIN = GND
fI = 10 MHZ
50% Duty Cycle

XOE = GND

One Bit Toggling

VCC = Max., VIN = VCC  0.6V 2.1 4.7

(5)

Outputs Open VIN = GND
fI = 2.5 MHZ
50% Duty Cycle

XOE = GND

16 Bits Toggling

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.

2. Typical values are at Vcc = 3.3V, +25°C ambient.

3. Per TTL driven input; all other inputs at Vcc or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.

6. I C =IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC D HNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.

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PI74LPT162Q952

3.3V 16-Bit Registered Transceivers

Capacitance (TA = 25°C, F = 1 MHz)

Note:

1. This parameter is determined by device characterization but it not production tested.

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax [phone] • http://www.pericom.com

Switching Characteristics over Operating Range

(1)

LPT162Q952A LPT162Q952B LPT162Q952C

Com. Com. Com.

Parameters Description Conditions

(2)

Min.

(3)

Max. Min.

(3)

Max. Min.

(3)

Max. Units

t

PLH

Propagation Delay CL = 5 0p F 2.0 10.0 2.0 7.5 2.0 6.3 ns

t

PHL X

CLKAB, XCLKBA to XBX, XA

X

RL = 500

Ω

t

PZH

Output Enable Time 1.5 10.5 1.5 8.0 1.5 7.0 ns

t

PZL X

OEBA, XOEAB to XAX, XB

X

t

PHZ

Output Disable Time

(4)

1.5 10.0 1.5 7.5 1.5 6.5 ns

t

PLZ X

OEBA, XOEAB to XAX, XB

X

t

SU

Set-up Time HIGH or LOW 2.5  2.5  2.5  ns
xAx, xBx to xCLKAB, xCLKBA

t

H

Hold Time HIGH or LOW 2.0  2.0  2.0  ns
xAx, xBx to xCLKAB, xCLKBA

t

SU

Setup Time HIGH or LOW 3.0  3.0  3.0  ns
xCEAB, xCEBA to
xCLKAB, xCLKBA

t

H

Hold Time HIGH or LOW 2.0  2.0  2.0  ns
xCEAB, xCEBA to
xCLKAB, xCLKBA

t

W

Pulse Width HIGH

(4)

or 3.0  3.0  3.0  ns

LOW, xCLKAB or xCLKBA

t

SK

(o) Output Skew

(5)

 0.5  0.5  0.5 ns

Notes:

1. Propagation Delays and Enable/Disable times are with Vcc = 3.3V ±0.3V, normal
range. For Vcc = 2.7V, extended range, all Propagation Delays and Enable/Disable
times should be degraded by 20%.

2. See test circuit and waveforms.

3. Minimum limits are guaranteed but not tested on Propagation Delays.

4. This parameter is guaranteed but not production tested.

5. Skew between any two outputs, of the same package, switching in the same
direction. This parameter is guaranteed by design.

sretemaraP

)1(

noitpircseDsnoitidnoCtseT.pyT.xaMstinU

C

IN

ecnaticapaCtupnIV

IN

V0=5.46

Fp

C

OUT

ecnaticapaCtuptuOV

O

tuV0=5.58