Datasheet PI74FCT162244MTA, PI74FCT162244MTV Datasheet (PERICOM)

Page 1
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
1 PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI74FCT162244MT
Fast CMOS 16-Bit
Logic Block Diagram
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are produced in the Company’s advanced CMOS technology, achieving industry leading speed grades.
The PI74FCT162244MT is a non-inverting 16-bit buffer/line driver designed specifically for applications driving heavy loads—ideally for DRAM modules/arrays and heavy load bus applications. This very high-speed, high-drive, low noise buffer driver device meets the JEDEC specification for DRAM DIMM module buffer drivers.
The PI74FCT162244MT offers a flow-through organization for ease of board layout. This part is plug-in compatible with the 74ABT16244/162244 and excels in applications where much higher speed and lower power dissipation are required.
The output drivers of the PI74FCT162244MT have the features of a balanced drive and controlled edge rate, resulting in minimal undershoot/ringback and ground bounce. This eliminates the need for external series termination resistors.
Product Features:
• Very high-speed buffer drivers for 150 pF heavy load and all 16-bit switching in 4.8ns max
• Meets JEDEC specification for DRAM DIMM module buffer propagation delay
• Low noise drivers: minimal undershoot/ringback and typical VOLP (output ground bounce) < 0.6V
• Packages available: – 48-pin 240-mil wide plastic TSSOP (A) – 48-pin 300-mil wide plastic SSOP (V)
1OE
1A01Y0
1A11Y1
1A21Y2
1A3 1Y3
3OE
3A03Y0
3A13Y1
3A23Y2
3A33Y3
2OE
2A02Y0
2A12Y1
2A22Y2
2A3 2Y3
4OE
4A04Y0
4A14Y1
4A24Y2
4A34Y3
Page 2
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
2
PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Product Pin Description
Pin Name Description
xOE 3-State Output Enable Inputs (Active LOW) xAx Inputs xYx 3-State Outputs GND Ground VCC Power
Inputs
(1)
Outputs
(1)
XOE xAx xYx
LL L LH H HX Z
Truth Table
Note: 1. H = High Voltage Level
X = Don’t Care L = Low Voltage Level Z = High Impedance
Product Pin Configuration
1 2 3 4 5 6 7 8 9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33 32 31 30 29 28 27 26 25
1
OE
1Y0 1
Y
1
GND
1Y2 1
Y
3
V
CC
2
Y
0
2
Y
1
GND
2Y2 2
Y
3
3
Y
0
3
Y
1
GND
3Y2 3
Y
3
V
CC
4
Y
0
4
Y
1
GND
4
Y
2
4
Y
3
4
OE
2
OE
1A0 1
A
1
GND
1A2 1
A
3
V
CC
2
A
0
2
A
1
GND
2D2 2
A
3
3
A
0
3
A
1
GND
3A2 3
A
3
V
CC
4
A
0
4
A
1 GND 4
A
2 4
A
3 3
OE
48-PIN
V48 A48
Page 3
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
3 PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%)
Parameters Description Test Conditions
(1)
Min. Typ
(2)
Max. Units
VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 V VIL Input LOW Voltage Guaranteed Logic LOW Level 0.8 V IIH Input HIGH Current VCC = Max. VIN = VCC A IIL Input LOW Current VCC = Max. VIN = GND –1 µ A IOZH High Impedance VCC = Max. VOUT = 2.7V 1 µA IOZL Output Current VCC = Max. VOUT = 0.5V –1 µ A VIK Clamp Diode Voltage VCC = Min., IIN = –18 mA –0.7 –1.2 V IOS Short Circuit Current VCC = Max.
(3)
, VOUT = GND –80 –140 –200 mA
IO Output Drive Current VCC = Max.
(3)
, VOUT = 2.5V –50 –180 mA
VH Input Hysteresis 100 mV
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature.................................................................... –65°C to +150°C
Ambient Temperature with Power Applied ....................................–40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only)........... –0.5V to +7.0V
DC Input Voltage ............................................................................ –0.5V to +7.0V
DC Output Current..................................................................................... 120 mA
Power Dissipation ..........................................................................................1.0W
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Output Drive Characteristics (Over the Operating Range)
Parameters Description Test Conditions
(1)
Min. Typ
(2)
Max. Units
VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL IOH = –24.0 mA 2.4 3.3 V VOL Output LOW Voltage VCC = Min., VIN = VIH or VIL IOL = 24 mA 0.3 0.55 V IODL Output LOW Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V
(3)
60 115 150 mA
IODH Output HIGH Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V
(3)
–60 –115 –150 mA
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
Capacitance (TA = 25°C, f = 1 MHz)
Parameters
(4)
Description Test Conditions Typ Max. Units
CIN Input Capacitance VIN = 0V 4.5 6 pF COUT Output Capacitance VOUT = 0V 5.5 8 pF
Page 4
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
4
PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Power Supply Characteristics
Parameters Description Test Conditions
(1)
Min. Typ
(2)
Max. Units
ICC Quiescent Power VCC = Max. VIN = GND or VCC 0.1 500 µA
Supply Current
ICC Supply Current per VCC = Max. VIN = 3.4V
(3)
0.5 1.5 mA
Input @ TTL HIGH
ICCD Supply Current per VCC = Max., VIN = VCC 60 100 µA/
Input per MHz
(4)
Outputs Open VIN = GND MHz
XOE = GND
One Bit Toggling 50% Duty Cycle
IC Total Power Supply VCC = Max., VIN = VCC 0.6 1.5
(5)
mA
Current
(6)
Outputs Open VIN = GND fI = 10 MHZ 50% Duty Cycle
XOE = GND
One Bit Toggling VIN = 3.4V 0.9 2.3
(5)
VIN = GND
VCC = Max., VIN = VCC 2.4 4.5
(5)
Outputs Open VIN = GND fI = 2.5 MHZ 50% Duty Cycle
XOE = GND
16 Bits Toggling VIN = 3.4V 6.4 16.5
(5)
VIN = GND
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
Page 5
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
5 PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
162244MT
Com.
Parameters Description Conditions
(1)
Min Max Unit
tPLH Propagation Delay
(2)
CL = 150 pF 1.5 4.8 ns
tPHL XAX to XYX All 16 Bits Switching tPZH Output Enable Time CL = 50 pF 1.5 6.2 ns
tPZL XOE to XAX or XYX RL = 500 tPHZ Output Disable Time
(3)
1.5 5.6 ns
tPLZ XOE to XAX or XYX tSK(o) Output Skew
(4)
0.5 ns
Switching Characteristics over Operating Range - High-LoadCondition
Page 6
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
6
PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Application Note
Almost all propagation delay specifications in standard data books are specified for one single bit switching, not multiple-bit switching. The propagation delay tPLH/tPHL of a buffer driver increases very significantly for all 16 bits switching simulta­neously, as compared with one single bit switching.
For realistic heavy load applications such as DRAM modules and per JEDEC DRAM module specification, the driver propagation delay should be specified for all 16 bits switching worst case. The specification for one single bit switching in standard data books has no useful meaning.
The following PI74FCT162244MT test data are tested under
150 pF heavy loads and all 16 bits switching simultaneously:
Figure 1. Vertical voltage scale is 1.0V/div. Reference voltage level y2 at the middle is 1.5V. Horizontal
time scale is 1.0 ns/div. For PI74FCT162244MT with 150 pF loads, all 16 bits switching, the propagation delay tPLH is 3.64 ns. Minimal undershoot and overshoot.
Page 7
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
7 PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Figure 2. For PI74FCT162244MT, with 150pF load, all 16 bits switching, the propagation
delay tPHL is 4.3ns.
Figure 3. For PI74FCT162244MT, Output Skew tLH of less than 300 ps under 150 pF load, and all
16 bits switching.
Page 8
PI74FCT162244MT
16-BIT HEAVY BUFFER/LINE DRIVER
8
PS2043A 03/12/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Figure 4. For PI74FCT162244MT, Output Skew tHL is less than 300 ps under 150 pF load, and all
16 bits switching.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
Loading...