Datasheet PI74ALVCH16652A, PI74ALVCH16652V Datasheet (PERICOM)

1

PS8135B 11/06/00

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

PI74ALVCH16652

16-Bit Bus Transceiver and Register

with 3-State Outputs

Product Description

Pericom Semiconductors PI74ALVCH series of logic circuits are
produced in the Companys advanced 0.5 micron CMOS technology,
achieving industry leading speed.

The PI74ALVCH16652 is a 16-bit bus transceiver and register
designed for low 2.3V to 3.6V Vcc operation. It consists of D-type
flip-flops and control circuitry arranged for multiplexed transmission
of data directly from the data bus or from the internal storage
registers. The device can be used as two 8-bit transceivers or one 16­bit transceiver.

Complementary Output Enable (OEAB and OEBA) inputs are
provided to control the transceiver functions. Select Control (SAB
and SBA) inputs are provided to select whether real-time or stored
data is transferred. A low input level selects real-time data, and a high
input level selects stored data. Circuitry used for Select Control
eliminates the typical decoding glitch that occurs in a multiplexer
during the transition between stored and real-time data.

Data on the A or B bus, or both, can be stored in the internal D flip­flops by low-to-high transitions at the appropriate clock (CLKAB or
CLKBA) inputs regardless of the levels on the Select Control or
Output Enable inputs. When SAB and SBA are in the real-time
transfer mode, it also is possible to store data without using the
internal D-type flip-lops by simultaneously enabling OEAB and
OEBA. In this configuration, each output reinforces its input. Thus,
when all other data sources to the two sets of bus lines are in the high­impedance state, each set of bus lines remains at its last level
configuration.

Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.

To ensure the high-impedance state during power up or power down,
OEBA should be tied to Vcc through a pull-up resistor and OEAB
should be tied to GND through a pull-down resistor; the minimum
value of the resistor is determined by the current-sinking current
sourcing capability of the driver.

Product Features

• PI74ALVCH16652 is designed for low voltage operation

• V

CC

= 2.3V to 3.6V

• Hysteresis on all inputs

• Typical V

OLP

(Output Ground Bounce)

< 0.8V at VCC = 3.3V, TA = 25°C

• Typical V

OHV

(Output VOH Undershoot)

< 2.0V at VCC = 3.3V, TA = 25°C

• Bus Hold retains last active bus state during 3-State,

eliminating the need for external pullup resistors

• Industrial operation at 40°C to +85°C

• Packages available:

 56-pin 240 mil wide plastic TSSOP (A)
 56-pin 300 mil wide plastic SSOP (V)

Product Pin Configuration

1

OEAB 1

1

CLKAB 2

1

SAB 3

GND 4

1A1

5

1A2

6

VCC7

1A3

8

1A4

9

1A5

10

GND 11

1A6

12

1A7

13

1A8

14

2A1

15

2A2

16

2A3

17

GND 18

2A4

19

2A5

20

2A6

21

V

CC

22

2A7

23

2A8

24

1

OEBA56

1

CLKBA55

1

SBA54

GND53

1B1

52

1B2

51

V

CC

50

1B3

49

1B4

48

1B5

47

GND46

1B6

45

1B7

44

1B8

43

2B1

42

2B2

41

2B3

40

GND39

2B4

38

2B5

37

2B6

36

V

CC

35

2B7

34

2B8

33

GND 25

2

SAB 26

2

CLKAB 27

2

OEAB 28

GND32

2

SBA31

2

CLKBA30

2

OEBA29

56-Pin

A,V

2

PS8135B 11/06/00

PI74ALVCH16652

3.3V 20-Bit Flip-Flop with 3-State Outputs

Logic Block Diagrams

1OEBA

C1

1D

TO SEVEN OTHER CHANNELS

1OEAB

1CLKBA

56

1

55

1SBA

1CLKAB

1SAB

54

2

3

5

1A1

C1

1D

52

1B1

One of Eight Channels

2OEBA

C1

1D

TO SEVEN OTHER CHANNELS

2OEAB

2CLKBA

29

28

30

2SBA

2CLKAB

2SAB

31

27

26

15

2A1

C1

1D

42

2B1

One of Eight Channels

3

PS8135B 11/06/00

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

PI74ALVCH16652

3.3V 20-Bit Flip-Flop with 3-State Outputs

Product Pin Description

Notes:

1. H = High Voltage Level, X = Dont Care,

L = Low Voltage Level, ↑ = LOW-to-HIGH Transition
* The data output functions may be enabled or disabled by a varietyof level combinations at the OEAB or OEBA

inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH
transition on the clock inputs.

** Select control = L; clocks can occur simultaneously. Select control = H; to load both registers,

clocks must be staggered.

stupnI*O/IataD

noitcnuFronoitarepO

BAEOABEOBAKLCABKLCBASABS8A-1A8B-1B

LH LroHLroHXX tupnItupnInoitalosI
LH ↑↑XX tupnItupnIatadBdnaAerotS
XH ↑ LroHXX tupnI**deificepsnUBdloh,AerotS
HH ↑↑**XX tupnItuptuOsretsigerhtobniAerotS
LX LroH ↑ XX **deificepsnUtupnIBerots,AdloH
LL ↑↑X**XtuptuOtupnIsretsigerhtobniBerotS

LL X XXL tuptuOtupnIsubAotatadBemit-laeR

LL X LroHXH tuptuOtupnIsubAotatadBderotS

HH X X LX tupnItuptuOsubBotatadAemit-laeR

HH LroHXHX tupnItuptuOsubBotatadAderotS

HL LroHLroHHH tuptuOtuptuOsubAotatadBderots&subBotatadAderotS

emaNniPnoitpircseD

BAEO)HGIHevitcA(stupnIelbanEtuptuO

ABEO)WOLevitcA(stupnIelbanEtuptuO

ABKLCx,BAKLCxstupnIesluPkcolC

ABSx,BASxstupnIlortnoCtceleS

xAxstuptuOBretsigeRataD,stupnIAretsigeRataD

xBxstuptuOAretsigeRataD,stupnIBretsigeRataD

DNGdnuorG

V

CC

rewoP

Truth Table

(

1)

4

PS8135B 11/06/00

PI74ALVCH16652

3.3V 20-Bit Flip-Flop with 3-State Outputs

REAL-TIME TRANSFER

BUS B TO A

OEAB OEBA xCLKAB xCLKBA xSAB xSBA

LLXXXL

REAL-TIME TRANSFER

BUS A TO B

OEAB OEBA xCLKAB xCLKBA xSAB xSBA

HH X X L X

STORAGE FROM

A AND/OR B

TRANSFER STORED

DATA TO A AND/OR B

OEAB OEBA xCLKAB xCLKBA xSAB xSBA

XH ↑ XXX
LX X ↑ XX
LH ↑↑XX

OEAB OEBA xCLKAB xCLKBA xSAB xSBA

H L H or L H or L H X

BUS

A

BUS

B

BUS

A

BUS

B

BUS

A

BUS

B

BUS

A

BUS

B

Note:

1. Cannot transfer data to A bus and B bus simultaneously.

5

PS8135B 11/06/00

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

PI74ALVCH16652

3.3V 20-Bit Flip-Flop with 3-State Outputs

Storage Temperature ................................................. 65°C to +150°C

Ambient Temperature with Power Applied ................. 40°C to +85°C

Input Voltage Range, V

IN

............................................

0.5V to V

CC

+0.5V

Output Voltage Range, V

OUT

.....................................

0.5V to V

CC

+0.5V

DC Input Voltage .......................................................... 0.5V to +5.0V

DC Output Current ................................................................... 100 mA

Power Dissipation ........................................................................ 1.0W

Note:

Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

DC Electrical Characteristics (Over the Operating Range, T

A

= 40°C to +85°C, VCC = 3.3V ±10%)

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

sretemaraPnoitpircseDsnoitidnoCtseT

)1(

.niM.pyT

)2(

.xaMstinU

V

CC

egatloVylppuS3.26.3

V

V

HI

)3(

egatloVHGIHtupnI

V

CC

V7.2otV3.2=7.1

V

CC

V6.3otV7.2=0.2

V

LI

)3(

egatloVWOLtupnI

V

CC

V7.2otV3.2=7.0

V

CC

V6.3otV7.2=8.0

V

NI

)3(

egatloVtupnI0V

CC

V

TUO

)3(

egatloVtuptuO0V

CC

V

HO

egatloVHGIHtuptuO

I

HO

001-= µ V,A

CC

=.xaMot.niMV

CC

2.0

V

HI

I,V7.1=

HO

=6 V,Am

CC

=V3.20.2

V

HI

I,V7.1=

HO

= 21V,Am

CC

=V3.27.1

V

HI

I,V0.2=

HO

= 21V,Am

CC

=V7.22.2

V

HI

I,V0.2=

HO

= 21V,Am

CC

=V0.34.2

V

HI

I,V0.2=

HO

= 42V,Am

CC

=V0.30.2

V

LO

tuptuO

WOL

egatloV

I

LO

001= µ V,A

LI

=.xaMot.niM2.0

V

LI

I,V7.0=

LO

6=V,Am

CC

=V3.24.0

V

LI

I,V7.0=

LO

21=V,Am

CC

=V3.27.0

V

LI

I,V8.0=

LO

21=V,Am

CC

=V7.24.0

V

LI

I,V8.0=

LO

42=V,Am

CC

=V0.355.0

I

HO

)3(

tuptuO

HGIH

tnerruC

V

CC

V3.2=21-

Am

V

CC

V7.2=21-

V

CC

V0.3=42-

I

LO

)3(

tuptuO

WOL

tnerruC

V

CC

V3.2=21

V

CC

V7.2=21

V

CC

V0.3=42

6

PS8135B 11/06/00

PI74ALVCH16652

3.3V 20-Bit Flip-Flop with 3-State Outputs

Notes:

1. For Max or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.

3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.

DC Electrical Characteristics-Continued (Over the Operating Range, T

A

= 40°C to +85°C, VCC = 3.3V ±10%)

sretemaraPnoitpircseDsnoitidnoCtseT

)1(

.niM.pyT

)2(

.xaMstinU

I

NI

tnerruCtupnIV

NI

V=

CC

V,DNGro

CC

V6.3=5±

µA

I

NI

(

HOLD

)tnerruCdloHtupnI

V

NI

V,V7.0=

CC

V3.2=54

V

NI

V,V7.1=

CC

V3.2=54

V

NI

V,V8.0=

CC

V0.3=57

V

NI

V,V0.2=

CC

V0.3=57

V

NI

0=otV,V6.3

CC

V6.3=005±

I

ZO

)stuptuOetatS-3(tnerruCtuptuOV

TUO

V=

CC

ro,DNGVCCV6.3=01±

I

CC

tnerruCylppuS

V

CC

=V6.3I,

TUO

0= µ ,A

V

NI

VroDNG=

CC

04

∆I

CC

tupnIreptnerruCylppuS

HGIHLTT@

V

CC

V0.3=ot6.3V

VtatupnIenO

CC

-V6.0

VtastupnIrehtO

CC

DNGro

057

C

I

stupnIlortnoCV

NI

V=

CC

V,DNGro

CC

V3.3=5.3

Fp

C

OI

stroPBroAV

O

V=

CC

V,DNGro

CC

V3.3=5.8

sretemaraPnoitpircseDsnoitidnoC

V

CC

V2.0±V5.2=V

CC

V7.2=

V

CC

±V3.3=

V3.0

stinU

.niM.xaM.niM.xaM.niM.xaM

f

KCOLC

ycneuqerFkcolC

C

L

Fp05=

R

L

005= Ω

005100510 051zHM

t

W

noitaruDesluP

ABKLCroBAKLC

WOLroHGIH

5.2

snt

US

emiTputeS

BAKLCerofebA ↑ ro
ABKLCerofebB ↑

9.0

t

H

emiTdloH

BAKLCretfaA ↑ ro
ABKLCretfaB ↑

9.0

Timing Requirements over Operating Range

Note:

1. Unused control inputs must be held HIGH or LOW to prevent them from floating.

7

PS8135B 11/06/00

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

PI74ALVCH16652

3.3V 20-Bit Flip-Flop with 3-State Outputs

sretemaraP

morF

)TUPNI(

oT

)TUPTUO(

snoitidnoC

V

CC

V7.2=VCCV3.0±V3.3=

stinU

.niM.xaM.niM

)2(

.xaM

f

XAM

C

L

Fp05=

R

L

005= Ω

051051zHM

t

DP

BroAAroB7.54.12.5

sn

ABKLCroBAKLCBroA3.74.26.6

ABSroBASAotB4.79.17.6

t

NE

EOroEOBroA0.56.15.4

t

SID

EOroEOBroA3.52.18.4

noitpircseD

∆ /t ∆v

)3(

llaFroesiRnoitisnarttupnI0010 01V/sn

Switching Characteristics over Operating Range

(1)

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax [phone] • http://www.pericom.com

Operating Characteristics, TA = 25ºC

retemaraPsnoitidnoCtseT

V

CC

V2.0±V5.2=VCCV3.0±V3.3=

stinU

lacipyT

C

DP

noitapissiDrewoP

ecnaticapaC

delbanEstuptuO

C

L

Fp05=

zHM01=f

Fp

delbasiDstuptuO

Notes:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.