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PS8138A 09/03/98
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16-Bit Edge Triggered D-Type Flip-Flop
with 3-State Outputs
PI74ALVCH16374
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are
produced in the Companys advanced 0.5 micron CMOS technology,
achieving industry leading speed.
This 16-bit edge-triggered D-type flip-flop is designed for 2.3V to
3.6V VCC operation.
The PI74ALVCH16374 is particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers. This device can be used as two 8-bit flip-flops or one
16-bit flip-flop. On the positive transition of the Clock (CLK)
input, the Q outputs of the flip-flop take on the logic levels set up
at the data (D) inputs. OE can be used to place the eight outputs in
either a normal logic state (high or low logic levels) or a highimpedance state. In that state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and the increased
drive provide the capability to drive bus lines without need for
interface or pullup components. OE does not affect internal
operations of the flip-flop. Old data can be retained or new data can
be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
Product Features
• PI74ALVCH16374 is designed for low voltage operation
• V
CC
= 2.3V to 3.6V
• Hysteresis on all inputs
• Typical V
OLP
(Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
• Typical V
OHV
(Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Bus Hold retains last active bus state during 3-STATE
eliminating the need for external pullup resistors
• Industrial operation at 40°C to +85°C
• Packages available:
48-pin 240 mil wide plastic TSSOP (A)
48-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
1CLK
1Q1
1D
C1
1D1
To Seven Other Channels
1OE
1
48
47
2
2CLK
2Q1
1D
C1
2D1
To Seven Other Channels
25
36
13
24
2OE
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PS8138A 09/03/98
PI74ALVCH16374
16-Bit Edge Triggered D-Type Flip-Flop
with 3-State Outputs
stupnIstuptuO
EOKLCDQ
L
HH
L
LL
LLroHXQ
0
HXXZ
Pin Name Description
OE Output Enable Input (Active LOW)
CLK Clock Input (Active HIGH)
Dx Data Inputs
Qx 3-State Outputs
GND Ground
V
CC
Power
Product Pin Description Truth Table
(1)
Product Pin Configuration
Notes:
1. H = High Signal Level
L = Low Signal Level
X = Irrelevant
Z = High Impedance
↑ = LOW to HIGH Transition
n = 1,2
1
2
3
4
5
6
7
8
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
32
31
30
29
28
27
26
25
1OE 1CLK
1Q1 1D1
1Q2 1D2
GND GND
1Q3 1D3
1Q4 1D4
V
1Q5 1D5
1Q6 1D6
GND GND
1Q7 1D7
1Q8 1D8
2Q1 2D1
2Q2 2D2
GND GND
2Q3 2D3
2Q4 2D4
2Q5 2D5
2Q6 2D6
GND GND
2Q7 2D7
2Q8 2D8
2OE 2CLK
CC
V
CC
V
CC
V
CC
48-PIN
V48
A48
Page 3
PI74ALVCH16374
16-Bit Edge Triggered D-Type Flip-Flop
with 3-State Outputs
3
PS8138A 09/03/98
Storage Temperature ............................................................65°C to +150°C
Ambient Temperature with Power Applied .......................... 40°C to +85°C
Input Voltage Range, V
IN
....................................................
0.5V to V
CC
+0.5V
Output Voltage Range, V
OUT
.............................................
0.5V to V
CC
+0.5V
DC Input Voltage ................................................................... 0.5V to +5.0V
DC Output Current.............................................................................. 100 mA
Power Dissipation ................................................................................... 1.0W
Note:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, T
A
= 40°C to +85°C, VCC = 3.3V ±10%)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
sretemaraPnoitpircseDsnoitidnoCtseT
)1(
.niM.pyT
)2(
.xaMstinU
V
CC
egatloVylppuS3.26.3
V
V
HI
)3(
egatloVHGIHtupnI
V
CC
V7.2otV3.2=7.1
V
CC
V6.3otV7.2=0.2
V
LI
)3(
egatloVWOLtupnI
V
CC
V7.2otV3.2=7.0
V
CC
V6.3otV7.2=8.0
V
NI
)3(
egatloVtupnI0V
CC
V
TUO
)3(
egatloVtuptuO0V
CC
V
HO
tuptuO
HGIH
egatloV
I
HO
001-= m V,A
CC
=.xaMot.niMV
CC
2.0-
V
HI
I,V7.1=
HO
6-=V,Am
CC
=V3.20.2
V
HI
I,V7.1=
HO
21-=V,Am
CC
=V3.27.1
V
HI
I,V0.2=
HO
21-=V,Am
CC
=V7.22.2
V
HI
I,V0.2=
HO
21-=V,Am
CC
=V0.34.2
V
HI
I,V0.2=
HO
42-=V,Am
CC
=V0.30.2
V
LO
tuptuO
WOL
egatloV
I
LO
001= m V,A
LI
=.xaMot.niM2.0
V
LI
I,V7.0=
LO
6=V,Am
CC
=V3.24.0
V
LI
I,V7.0=
LO
21=V,Am
CC
=V3.27.0
V
LI
I,V8.0=
LO
21=V,Am
CC
=V7.24.0
V
LI
I,V8.0=
LO
42=V,Am
CC
=V0.355.0
I
HO
)3(
tuptuO
HGIH
tnerruC
V
CC
V3.2=21-
Am
V
CC
V7.2=21-
V
CC
V0.3=42-
I
LO
)3(
tuptuO
WOL
tnerruC
V
CC
V3.2=21
V
CC
V7.2=21
V
CC
V0.3=42
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4
PS8138A 09/03/98
PI74ALVCH16374
16-Bit Edge Triggered D-Type Flip-Flop
with 3-State Outputs
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.
3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
DC Electrical Characteristics-Continued (Over the Operating Range, T
A
= 40°C to +85°C, VCC = 3.3V ±10%)
sretemaraPnoitpircseDsnoitidnoCtseT
)1(
.niM.pyT
)2(
.xaMstinU
I
NI
tnerruCtupnIV
NI
V=
CC
V,DNGro
CC
V6.3=5±
mA
I
NI
(
HOLD
)
tupnI
dloH
tnerruC
V
NI
V,V7.0=
CC
V3.2=54
V
NI
V,V7.1=
CC
V3.2=54-
V
NI
V,V8.0=
CC
V0.3=57
V
NI
V,V0.2=
CC
V0.3=57-
V
NI
0=otV,V6.3
CC
V6.3=005±
I
ZO
)stuptuOETATS-3(tnerruCtuptuOV
TUO
V=
CC
ro,DNGVCCV6.3=01±
I
CC
tnerruCylppuS
V
CC
=V6.3I,
TUO
0= m ,A
V
NI
VroDNG=
CC
04
DI
CC
tupnIreptnerruCylppuS
HGIHLTT@
V
CC
V0.3=ot6.3V
VtatupnIenO
CC
-V6.0
VtastupnIrehtO
CC
DNGro
057
C
I
stupnIlortnoC
V
NI
V=
CC
V,DNGro
CC
V3.3=
3
FpstupnIataD6
C
O
stuptuOV
O
V=
CC
V,DNGro
CC
V3.3=7
sretemaraPnoitpircseD
V
CC
V2.0±V5.2=V
CC
V7.2=VCCV3.0±V3.3=
stinU
.niM.xaM.niM.xaM.niM.xaM
f
KCOLC
ycneuqerFkcolC005100510 051zHM
t
W
noitaruDesluP
roHGIHKLC
WOL
3.33.33.3
sn
t
US
ataDemiTputeS
KLCerofeB
1.22.29.1
t
H
ataDemiTdloH
KLCretfA
6.05.05.0
D /t Dv
)1(
noitisnarTtupnI
llaFroesiR
V/sn
Timing Requirements over Operating Range
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
Page 5
PI74ALVCH16374
16-Bit Edge Triggered D-Type Flip-Flop
with 3-State Outputs
5
PS8138A 09/03/98
sretemaraP)TUPNI(morF)TUPTUO(oT
V
CC
V2.0±V5.2=V
CC
V7.2=VCCV3.0±V3.3=
stinU
.niM
)2(
.xaM.niM.xaM.niM
)2(
.xaM
f
XAM
051051051zHM
t
DP
KLC
Q
0.13.59.40.12.4
snt
NE
EO0.12.69.50.18.4
t
SID
EO7.13.57.40.13.4
Switching Characteristics over Operating Range
(1)
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
Operating Characteristics, TA = 25ºC
retemaraPsnoitidnoCtseT
V
CC
V2.0±V5.2=VCCV3.0±V3.3=
stinU
.pyT
C
DP
noitapissiDrewoP
ecnaticapaC
delbanEstuptuO
C
L
zHM01=f,Fp05=
1303
Fp
delbasiDstuptuO6181
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
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