Datasheet PI6C2308A-1HL, PI6C2308A-1HLI, PI6C2308A-1HW, PI6C2308A-1HWI, PI6C2308A-1L Datasheet (PERICOM)

1

PS8385C 08/03/00

Product Features

• 10 MHz to 140 MHz operating range

• Zero input-output propagation delay, adjustable by

capacitive load on FBK input

• Multiple configurations, see Available PI6C2308A

Configurations table

• Input to output delay, less than 150ps

• Multiple low skew outputs

- Output-output skew less than 200ps

- Device-device skew less than 500ps

- Two banks of four outputs, Hi-Z by two select inputs

• Low Jitter, less than 200ps

• 3.3V operation

• Available in industrial &commercial temperatures

• Packages:

- Space-saving 16-pin, 150-mil SOIC (W)

- 16-pin TSSOP (L)

Functional Description

Providing two banks of four outputs, the PI6C2308A is a 3.3V zero­delay buffer designed to distribute clock signals in applications
including PC, workstation, datacom, telecom, and high-performance
systems. Each bank of four outputs can be controlled by the select
inputs as shown in the Select Input Decoding Table.

The PI6C2308A provides 8 copies of a clock signal that has 150ps
phase error compared to a reference clock. The skew between the
output clock signals for PI6C2308A is less than 200ps. When there
are no rising edges on the REF input, the PI6C2308A enters a power
down state. In this mode, the PLL is off and all outputs are Hi-Z. This
results in less than 12µA of current draw. The Select Input Decoding
table shows additional examples when the PLL shuts down. The
PI6C2308A configuration table shows all available devices.

The base part, PI6C2308A-1, provides output clocks in sync with
a reference clock. With faster rise and fall times, the PI6C2308A-1H
is the high-drive version of the PI6C2308A-1. Depending on which
output drives the feedback pin, PI6C2308A-2 provides 2X and 1X
clock signals on each output bank. The PI6C2308A-3 allows the user
to obtain 4X and 2X frequencies on the outputs. The PI6C2308A-4
provides 2X clock signals on all outputs. PI6C2308A (-1, -2, -3, -4)
allows bank B to be Hi-Z when all output clocks are not required.The
PI6C2308A-6 allows bank B to switch from Reference clock to half
of the frequency of Reference clock using the control inputs S1 and
S2 if Bank A is connected to feedback FBK. In addition, using the
control inputs S1 and S2, the PI6C2308A-6 allows bank A to switch
from Reference clock to 2X the frequency of Reference clock if Bank
B is connected to feedback FBK. For testing purposes, the select
inputs connect the input clock directly to outputs.

Block Diagrams

Pin Configuration PI6C2308A (-1, -1H, -2, -3, -4, -6)

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

3.3V Zero-Delay Buffer

PI6C2308A

1
2
3

V

DD

4

GND 5

CLKA2

6

CLKB2 7

S18

CLKB1

FBK

CLKA3
V

DD

CLKB4
CLKB3

S2

16
15
14
13
12
11
10

9

REF

CLKA1

GND

CLKA4

16-Pin

W, L

PLL

MUX

REF

S2
S1

Select Input

Decoding

FBK
CLKA1

CLKA2
CLKA3
CLKA4

CLKB2
CLKB3
CLKB4

CLKB1

PI6C2308A-6

MUX

÷2

÷2

PLL

MUX

Extra Divider (-3, -4)

Extra Divider (-2,-3)

REF

S2
S1

Select Input

Decoding

FBK
CLKA1

CLKA2
CLKA3
CLKA4

CLKB2
CLKB3
CLKB4

CLKB1

PI6C2308A (-1, -1H, -2, -3, -4)

÷2

2

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

2S1S]4-1[AKLC]4-1[BKLCecruoStuptuOnwodtuhSLLP

00 Z-iHZ-iHLLPY

01 nevirDZ-iHLLPN

10 nevirDnevirDecnerefeRY

11 nevirDnevirDLLPN

Select Input Decoding for PI6C2308A (-1, -1H, -2, -3, -4)

eciveDmorFkcabdeeFycneuqerFAknaBycneuqerFBknaB

1-A8032C6IPBknaBroAknaBecnerefeRecnerefeR

H1-A8032C6IPBknaBroAknaBecnerefeRecnerefeR

2-A8032C6IPAknaBecnerefeR2/ecnerefeR

2-A8032C6IPBknaBecnerefeRX2ecnerefeR

3-A8032C6IPAknaBecnerefeRX2ecnerefeR

3-A8032C6IPBknaBecnerefeRX4ecnerefeRX2

4-A8032C6IPBknaBroAknaBecnerefeRX2ecnerefeRX2

6-A8032C6IPAknaBecnerefeR2/ecnerefeRroecnerefeR

6-A8032C6IPBknaBecnerefeRX2roecnerefeRecnerefeR

Available PI6C2308A Configurations

2S1S]4-1[AKLC]4-1[BKLCecruoStuptuOnwodtuhSLLP

00 Z-iHZ-iHLLPY

01 ecnerefeR=nevirD

=nevirD

2/ecnerefeR

ecnerefeRY

10 LLP=nevirDLLP=nevirDLLPN

11 LLP=nevirD2/LLP=nevirDLLPN

Select Input Decoding for PI6C2308A-6

3

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

600

800

400

200

0

-200

-400

-600

-800

-900

-1000

-25 -20 -15 -10 -5

0 5 10 15 20 25

Output Load Difference: FBK Load - CLKA/CLKB Load (pF)

REF - Input to CLKA/CLKB Delay (ps)

PI6C2308A-1H

PI6C2308A-1,2,3,4,6

To close the feedback loop of the PI6C2308A, the FBK pin can be
driven from any of the 8 available output pins. The output driving
the FBK pin will be driving a total load of 7pF plus any additional
load that it drives. The relative loading of this output (with respect
to the remaining outputs) can adjust the input-output delay. This is
shown in the graph above.

Zero Delay and Skew Control

REF. Input to CLKA/CLKB Delay vs. Difference in Loading between FBK pin and CLKA/CLKB pins

Maximum Ratings

Supply Voltage to Ground Potential ...................................................0.5V to +7.0V

DC Input Voltage (Except REF) .................................................. 0.5V to VDD +0.5V

DC Input Voltage REF ................................................................................ 0.5 to 7V

Storage Temperature ........................................................................ 65ºC to +150ºC

Maximum Soldering Temperature (10 seconds) ................................................ 260ºC

Junction Temperature ....................................................................................... 150ºC

Static Discharge Voltage

(per MIL-STD-883, Method 3015) .................................................................. >2000V

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Operating Conditions (over the operating range, T

A

= 0ºC to +70°C, VCC = 3.3V ±0.3V)

For applications requiring zero input-output delay, all outputs
including the one providing feedback should be equally loaded. If
input-output delay adjustments are required, use the above graph to
calculate loading differences between the feedback output and
remaining outputs.

4

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

Electrical Characteristics for Commercial Temperature Device

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Pin Description

5

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

Notes:

1. Weak pull-down.

2. Weak pull-down on all outputs.

3. Weak pull-ups on these inputs.

4. REF and FBK inputs have a threshhold voltage of VDD/2.

5. For definition of t

1-8

, see Switching Waveforms on page 8.

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Switching Characteristics

(5)

for Commercial Temperature Device

6

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

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Operating Conditions for Industrial Temperature Devices

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Electrical Characteristics for Industrial Temperature Devices

7

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

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Switching Characteristics for Industrial Temperature Devices

(5)

Notes:

1. Weak pull-down.

2. Weak pull-down on all outputs.

3. Weak pull-ups on these inputs.

4. REF and FBK inputs have a threshhold voltage of VDD/2.

5. For definition of t

1-8

, see Switching Waveforms on page 8.

8

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

V

DD

C

LOAD

V

DD

GND GND

CLK out

OUTPUTS

0.1mF

0.1mF

Test Circuit for all parameters except t

8

V

DD

10pF

V

DD

GND GND

CLK out

OUTPUTS

0.1mF

0.1mF

Test Circuit for t

8

,

Output slew rate on -1H device

1k

W

1k

W

Switching Waveforms

Test Circuit #2Test Circuit #1

t

2

t

1

1.4V 1.4V 1.4V

t

4

t

3

0.8V

2.0V

0.8V

2.0V

OUTPUT

0V

3.3V

1.4V

t

5

OUTPUT

1.4V

OUTPUT

VDD/2

t

6

INPUT

VDD/2

FBK

VDD/2

t

7

FBK Device 1

VDD/2

FBK Device 2

Duty Cycle Timing

All Outputs Rise/Fall Time

Output-Output Skew

Input-Output Propagation Delay

Device-Device Skew

9

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

Package Diagrams

16-Pin SOIC (W)

Note: Controlling dimensions in millimeters. Ref: JEDEC MS - 012 AC

SEATING PLANE

.050
BSC

1

16

0-8˚

.149
.157

X.XX
X.XX

DENOTES DIMENSIONS
IN MILLIMETERS

3.78

3.99

.386
.393

9.80

10.00

1.27

.053
.068

1.35

1.75

.2284
.2440

5.80

6.20

.0040
.0098

0.10

0.25

.013
.020

.0155
.0260

0.330

0.508

0.393

0.660

.0075
.0098

0.25

0.50

.0099
.0196

x 45˚

0.19

0.25

.016
.050

0.41

1.27

REF

.193
.201

.047
max.

.002
.006

SEATING
PLANE

.0256

BSC

.018
.030

.004
.008

.252
BSC

1

16

.169
.177

X.XX
X.XX

DENOTES CONTROLLING
DIMENSIONS IN MILLIMETERS

0.05

0.15

6.4

0.45

0.75

0.09

0.20

4.3

4.5

1.20

4.9

5.1

0.65

0.19

0.30

.007
.012

16-Pin TSSOP (L)

10

PS8385C 08/03/00

PI6C2308A

3.3V Zero Delay Buffer

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax [phone] • http://www.pericom.com

edoCgniredrOemaNegakcaPepyTegakcaPegnaRgnitarepO

W1-A8032C6IP

61WCIOSlim-051nip-61

laicremmoC

WH1-A8032C6IP

W2-A8032C6IP

W3-A8032C6IP

W4-A8032C6IP

W6-A8032C6IP

L1-A8032C6IP

61LPOSSTnip-61

LH1-A8032C6IP

-A8032C6IPL2

A8032C6IPL3

A8032C6IP4L

-A8032C6IP6L

Ordering Information (Commercial Temperature Device)

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IW1-A8032C6IP

61WCIOSlim-051nip-61

lairtsudnI

IWH1-A8032C6IP

IW2-A8032C6IP

IW3-A8032C6IP

IW4-A8032C6IP

IW6-A8032C6IP

IL1-A8032C6IP

61LPOSSTnip-61

ILH1-A8032C6IP

A8032C6IPIL2-

-A8032C6IPIL3

-A8032C6IPIL4

-A8032C6IPIL6I

Ordering Information (Industria l Temperature Device)