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PI5L100
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LanSwitch QUAD 2:1 MUX/DEMUX
PI5L100
Wide Bandwidth
Low Voltage LanSwitch
Quad 2:1 MUX/DEMUX
Product Features:
• Replaces mechanical relays
• High-performance, low-cost solution for switching
between different LAN signals
• Ultra-low quiescent power (0.1 µA typical)
• Low crosstalk: –40 dB @ 30 Mbps
• Low insertion loss or on-resistance: 3Ω typical
• Single extended supply operation up to 6.2V ± 5%
• Off isolation: –30 dB @ 30 Mbps
• Wide bandwidth data rates > 200 Mbps
• Packages available:
– 16-pin 150 mil wide plastic SOIC (W)
– 16-pin 150 mil wide plastic QSOP (Q)
– 20-pin 173 mil wide plastic TSSOP (L)
Logic Block Diagram
IA
1
IB
0
IB
IA
0
E
1
Product Description:
Pericom Semiconductor’s PI5L series of logic circuits are
produced in the Company’s advanced submicron CMOS
technology.
The PI5L100 is a Quad 2:1 multiplexer/demultiplexer
LanSwitch with three-state outputs. This device can be used for
switching between various standards, such as 10 Base-T, 100
Base-T, 100VG-AnyLAN or Token Ring. Generally, this part
can be used to replace mechanical relays in low voltage LAN
applications that have phsical layer, unshielded twisted pair
media (UTP) with either CAT 3 or CAT 5 grade cable.
The PI5L100 is powered from a 6.2V Zener voltage to reduce
the insertion loss.
16-Pin Product Configuration
1
IC
0
IC
1
ID
0
ID
1
IA0
IA1
YA
IB0
IB1
YB
GND
S
2
3
4
5
6
7
8
16-PIN
W16
Q16
16
V
CC
15
E
14
ID0
13
ID1
12
YD
11
IC0
10
IC1
9
YC
20-Pin Product Configuration
5
6
7
8
9
10
20-PIN
L20
20
19
18
17
16
15
14
13
12
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PS7031B 04/29/97
NC 1
S
YA YB YC YD
Truth Table
(1)
E S Y A YB Y C Y D Function
H X Hi-Z Hi-Z Hi-Z Hi-Z Disable
L L IA0 IB0 IC0 ID0 S = 0
L H IA1 IB1 IC1 ID1 S = 1
Note:
1. H = High Voltage Level
L = Low Voltage Level
Product Pin Description
S2
IA03
IA14
YA
IB
0
IB
1
YB
GND
NC
Pin Name Description
IAn-IDn Data Inputs
S Select Inputs
E Enable
YA-YD Data Outputs
GND Ground
VCC Power
216
NC
V
E
ID
ID
YD
IC
IC
YC
NC
CC
0
1
0
1
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
PI5L100
LanSwitch QUAD 2:1 MUX/DEMUX
Storage Temperature .................................................................–65°C to +150°C
Ambient Temperature with Power Applied..................................... 0°C to +70°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V
DC Input Voltage ......................................................................... –0.5V to +7.0V
DC Output Current ................................................................................... 120 mA
Power Dissipation......................................................................................... 0.5W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 0°C to +70°C, VCC = 6.2V, + 5%, – 2%)
Parameters Description Test Conditions
(1)
Min. Typ
VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 — — V
VIL Input LOW Voltage Guaranteed Logic LOW Level –0.5 — 0.8 V
IIH Input HIGH Current VCC = Max., VIN = VCC ——±1µA
IIL Input LOW Current VCC = Max., VIN = GND — — ±1 µA
IOZH High Impedance Output Current 0 ≤ A, B ≤ VCC ——±1µA
VIK Clamp Diode Voltage VCC = Min., IIN = –18 mA — –0.7 –1.2
V
IOS Short Circuit Current
(3)
A (B) = 0V, B (A) = VCC 100 — — m A
(2)
Max. Units
VH Input Hysteresis at Control Pins — 150 — mV
VON Switch On Voltage VIN = 4.5V, E = LOW 3.7
(4)
4.06
(5)
—V
See Figure 10, RL = 100Ω
(6)
RON
RON
M1 Switch On Resistance Calculated from VON 19 11.2 — Ω
(7)
M2 Switch On Resistance VIN = 4.5V, E = LOW 2.0 3.0 — Ω
See Figure 10, RL = 100Ω
∆RON On Resistance Match VIN = 4.5V, E = LOW — 1.0 — Ω
Notes:
1. For Max. or Min. conditions, use appropriate value specified under
Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 6.2V, TA = 25°C ambient temperature.
3. Not more than one output should be shorted at one time. Duration of the
test should not exceed one second.
4. VON (min) value is at Vcc = 6.1V, TA = 70°C.
5. The expected AC VON value is about 125 mV higher than the DC VON
value using the similar test circuit in Figure 10 with VIN swing from 0.0V
to 4.5V at 10 MHz sine wave.
6. The value of RON of M1 is calculated with the equvalent mathematical
formula of the test circuit in Figure 10.
V
IN
– V
RON (M1) =
where
I
ON
=
RL + RON (M2)
with RON (M2) = 3 Ohm
ON
I
ON
ON
V
7. This parameter is determined by device characterization but is not
production tested.
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LanSwitch QUAD 2:1 MUX/DEMUX
Capacitance (TA = 25°C, f = 1 MHz)
Parameters
CIN Input Capacitance VIN = 0V 6 pF
COFF Capacitance, Switch Off VIN = 0V 6 pF
CON Capacitance, Switch On VIN = 0V 8 pF
Note:
1. This parameter is determined by device characterization but is not production tested.
(1)
Description Test Conditions Typ Max. Units
Power Supply Characteristics
Parameters Description Test Conditions
(1)
Min. Typ
ICC Quiescent Power VCC = Max. VIN = GND or VCC — 0.1 3.0 µ A
Supply Current
∆ICC Supply Current per VCC = Max. VIN = 3.4V
(3)
— — 2.5 m A
Input @ TTL HIGH
(2)
Max. Units
PI5L100
ICCD Supply Current per VCC = Max., — — 0.25 mA /
Input per MHz
(4)
Input Pins Open MHz
E = GND
Control Input Toggling
50% Duty Cycle
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 6.2V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V, control inputs only); A and B pins do not contribute to Icc.
4. This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified
frequency. The A and B inputs generate no significant AC or DC currents as they transition. This parameter is not tested, but is
guaranteed by design.
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Switching Characteristics over Operating Range
Parameters Description Conditions
tIY Propagation Delay
In to Y RL = 500Ω
tSY Bus Enable Time 0.5 — 5.2 ns
S to Y
tPHZ Bus Disable Time 0.5 — 5.0 ns
tPLZ E to Y
tEY Bus Disable Time 0.5 — 4.8 ns
E to Y
XTALK (Dif) Differential Crosstalk
XTALK Crosstalk RL = 100Ω — –40 — dB
OIRR Off Isolation RL = 100Ω — –30 — dB
BW –3 dB Bandwidth RL = 100Ω — 216 — MHz
tON Turn On Time RL = 100Ω —11—ns
tOFF Turn Off Time CL = 35 pF — 11 — ns
(2,3)
(2)
LanSwitch QUAD 2:1 MUX/DEMUX
PI5L100
Com.
(1)
Min Typ Max Unit
CL = 50 p F — — 0.25 ns
RL = 100Ω –40 –60 — dB
f = 10 MHz
See Figure 11
f = 30 MHz
See Figure 9
f = 30 MHz
See Figure 6
See Figure 9
See Figure 8
PI5L100
Notes:
1. See test circuit and wave forms.
2. This parameter is guaranteed but not tested.
3. The bus switch contributes no propagational delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone is of the
order of 0.25 ns for 50 pF load. Since this time constant is much smaller than the rise/fall times
of typical driving signals, it adds very little propagational delay to the system. Propagational
delay of the bus switch when used in a system is determined by the driving circuit on the
driving side of the switch and its interaction with the load on the driven side.
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PI5L100
LanSwitch QUAD 2:1 MUX/DEMUX
20.00
E+00
2.000/Div.
0.000
R
ON
0.000 6.000
VIN = 4.5000V, RON = 14.3E+00, VON = 3.9569V
25˚C
V
ON
75˚C
R
ON
V
IN
6.000/Div.
75˚C
25˚C
V
ON
Figure 3. RON vs Input Voltage over Temperature
(RON at Vcc = 6.1V @ 75°C)
6.000
0.6000/Div.
0.000
20.00
E+00
2.000/Div.
0.000
R
ON
0.000 6.000
VIN = 4.5000V, RON = 10.9E+00, VON = 4.0720V
V
ON
R
ON
V
IN
V
ON
6.000/Div.
Figure 4. RON vs Input Voltage
(RON at Vcc = 6.2V @ 25°C)
6.000
0.6000/Div.
0.000
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,
0dB
NETWORK
A: REF
5.500
[dB]
B: REF
180.0
[deg]
PI5L100
LanSwitch QUAD 2:1 MUX/DEMUX
MKR 216 115 931.231 Hz
T/R 519.486m dB
θ –90.2501 deg
+180˚
–1dB
–2dB
–3db
–4dB
–5dB
–6dB
–7dB
–8dB
–9dB
–10dB
GAIN
PHASE
24681246812
DIV
1.000
DIV
36.00
RBW: 10 kHz ST: 1.41 sec RANGE: R = 0, T = 0dBm
PI5L100 –3dB BANDWIDTH
PHASE
Figure 5. Gain/Phase vs Frequency
START
STOP
+144˚
+108˚
+72˚
+36˚
0˚
–36˚
–72˚
–108˚
–144˚
–180˚
1 000 000 . 000 Hz
300 000 000 . 000 Hz
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NETWORK
,
A: REF
10.00
+10dB
–10dB
–20db
–30dB
–40dB
–50dB
–60dB
–70dB
–80dB
–90dB
[dB]
0dB
24681246812
DIV
10.00
RBW: 10 kHz ST: 1.41 sec RANGE: R = 0, T = 0dBm
PI5L100 OFF ISOLATION
B: REF
180.0
[deg]
DIV
36.00
PHASE
GAIN
LanSwitch QUAD 2:1 MUX/DEMUX
MKR 100 063 436.436 Hz
T/R 519.486m dB
θ –90.2501 deg
START
STOP
1 000 000 . 000 Hz
300 000 000 . 000 Hz
+180˚
+144˚
+108˚
+72˚
+36˚
0¡
–36˚
–72˚
–108˚
–144˚
–180˚
PI5L100
0dB
–10dB
–20dB
–30db
–40dB
–50dB
–60dB
–70dB
–80dB
–90dB
–100dB
Figure 6. Off Isolation vs Frequency
NETWORK
A: REF
0.000
[dB]
24681246812
DIV
10.00
RBW: 10 kHz ST: 4.05 sec RANGE: R = 0, T = 0dBm
PI5L100 XTALK 10 MHz
B: REF
180.0
[deg]
DIV
36.00
RL = 50 Ohm
MKR 10 074 746.057 Hz
T/R 519.486m dB
θ –90.2501 deg
PHASE
MAGNITUDE
START
STOP
+180˚
+144˚
+108˚
+72˚
+36˚
0¡
–36˚
–72˚
–108˚
–144˚
–180˚
1 000 000 . 000 Hz
300 000 000 . 000 Hz
Figure 7. Crosstalk vs Frequency
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APPLICATIONS SECTION
PI5L100
LanSwitch QUAD 2:1 MUX/DEMUX
LAN Switch Applications
The PI5L100 was designed to switch between various
standards such as 10Base-T, 100Base-T, 100VGAnyLAN, and Token Ring. Also general purpose
applications such as loopback, line termination, and line
clamps that might normally use mechanical relays are
also ideal uses for this LAN Switch (see Figure 11
applications). Generally speaking, this LAN Switch can
be used for data rates to 200 Mbps and data signal levels
from 0V to 4.5V.
LAN Standards Data Rate per twisted pair (UTP)
10Base-T 10 Mbps
100Base-T 100 Mbps
100VG-AnyLAN 25 Mbps
Differential Crosstalk ...X
Adjacent pins cause the most crosstalk because of the
interlead package capacitance which is generally in the
order of 0.5 pF (pin-to-pin). It can be seen in Figure 11
that this Evaluation (EV) Board schematic uses four
pairs of switches. The pair 1B/2B are RX1 that connect
to YA and YB. The second pair 3B/4B are TX1 and
connect to YC and YB. Pairs 3 and 4 are grounded for
this differential crosstalk test. The purpose of this EV
board is to determine the amont of crosstalk between the
transmit and receive pairs in a full duplex application.
Figure 15 shows the scope waveforms. Traces 1 and 2
are single ended inputs to the differential inputs of the
DUT. Trace 3 is the differential X
equates to 20LOG V
44dB. Since the edge rate is 2 ns, the effective input
frequency is equal to 0.3/t
TALK (DIF)
TALK output which
OUT/VIN = 20LOG 30 mV/5V = –
R which is ~150 MHz. So the
approximate Differential Crosstalk at 150 MHz is
–44dB.
Because pins measured are not adjacent, the differential
crosstalk is typically > 60 dB at 10 MHz. The load
resistor (R
ance). Increasing the data rate or R
L) used was 100 ( to match the UTP imped-
L will also increase
differential crosstalk.
CC Bias Voltage vs RON
V
To keep RON to a minimum, it is recommended that the
CC voltage be increased to a voltage between +6.0V
V
and +6.5V (see Figure 13). The R
ON vs VIN curve shows
the effect of on-resistance and input voltage which is
exponential. Ideally an input voltage between 0.2V and
3.6V will keep RON in the flat part of the curve (
flatness is ~2
Ω).
∆RON or
Signal Distortion
Distortion of the input signal is equated to 20LOG
L. So keeping RON flat as the data signal level varies
R
∆RON/
is critical to low distortion. It should also be noted that
increasing the data rate increases harmonic distortion
which also effects the signal amplitude.
Evaluation Board
Figure 14 shows the layout for an EV board that can be
used for evaluation. This is a 2-layer board and is oneinch square.
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Test Circuits
PI5L100
LanSwitch QUAD 2:1 MUX/DEMUX
+5.0V
3V
Vcc
SD
I
N
PI5L100
EN
GND
S1 R1 T1
75Ω
HP11667A
DIGITAL
INPUT
V
OUT
35 pF
ANALOG
OUTPUT
Figure 8. Switching Time
HP4195A
50%
90%
t
ON
50%
90%
t
OFF
PI5L100
100Ω
Figure 9. Gain/Phase Crosstalk, Off Isolation
V
ON
R
L
100Ω
V
IN
= 4.5V
M1
E
M2
Figure 10. Switch ON Voltage Test Circuit
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DSO
Vo
100Ω
100Ω
LanSwitch QUAD 2:1 MUX/DEMUX
VCC = 6.2V
0.1 µF
IA0
IA1
YA
IB0
IB1
YB
GND
S
1
2
3
4
5
6
7
8
PI5L100
16
15
14
13
12
11
10
VCC
Z
ID0
ID1
YD
IC0
IC1
YC
9
100Ω
100Ω
Figure 11. Differential Crosstalk Measurement
PI5L100
PULSE
GENERATOR
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TX1
RX1
PI5L100
LanSwitch QUAD 2:1 MUX/DEMUX
TRANSMIT 2
PI5L100
TX1
RX1
RECEIVE 2
OFFSET ADJUST
Figure 12a. Full Duplex Transceiver
Figure 12c. Line Termination
100 Ω120 Ω
Figure 12b. Loop Back
Figure 12d. Line Clamp
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PI5L100
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LanSwitch QUAD 2:1 MUX/DEMUX
TP+ TP–
+V
R1 mA
6.2V
ZENER
PI5L100
Figure 13. Vcc Bias Current
VCC
JP5
VCC
C1
GND
VCC
PERICOM SEMI
CROSSTALK
EVAL PCB
Figure 14a. Crosstalk EV Board
JP1
C2
R2
R3
JP3 U1
RP+ RP–
JP2
R1
PI5L100
JP4
COPYRIGHT 1995
Figure 14b. Component Side
227
Figure 14c. Solder Side
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Data In +
Data In –
(1) Differential
Crosstalk
(3) Out +
(4) Out –
PI5L100
LanSwitch QUAD 2:1 MUX/DEMUX
Figure 15. Crosstalk Waveform
LIFE SUPPORT POLICY
Pericom Semiconductor Corporation’s products are not authorized for use as critical components in life support
devices or systems unless a specific written agreement pertaining to such intended use is executed between the
manufacturer and an officer of PSC.
1. Life support devices or systems are devices or systems which:
(a ) are intended for surgical implant into the body, or
(b ) support or sustain life and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
2. A critical component is any component of a life support device or system whose failure to perform can be
reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
Pericom Semiconductor Corporation reserves the right to make changes to its products or specifications at any time,
without notice, in order to improve design or performance and to supply the best possible product. Pericom
Semiconductor does not assume any responsibility for use of any circuitry described other than the circuitry embodied
in a Pericom Semiconductor product. The Company makes no representations that circuitry described herein is free
from patent infringement or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent, patent rights, or other rights, of Pericom Semiconductor Corporation.
PERICOM Semiconductor, Inc. • 2380 Bering Drive • San Jose, CA 95131 • (408) 435-0800 • Fax: (408) 435-1100
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