Datasheet PI3B16232 Datasheet (PERICOM)

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PI3B16232

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3.3V, Synchronous 16-Bit to 32-Bit FET Mux/Demux BusSwitch

PI3B16232

3.3V, Synchronous 16-Bit to 32-Bit FET Mux/Demux BusSwitch

Product Features

• Near-Zero propagation delay.

•5Ω Switches Connect Between Two Ports

• Packages Available :

- 56-pin 240mil Wide Thin Plastic TSSOP(A)

- 56-pin 300mil Wide Plastic SSOP(V)

Logic Block Diagram

Product Description

Pericom Semiconductor’s PI3B series of logic circuits are produced using the company's advanced 0.35micron CMOS technology.

The PI3B16232 is a 3.3 volt, 16-bit to 32-bit synchronous switch. Two select inputs (S0 and S1) control the data flow. A clock (CLK)

and a clock enable (CLKEN) synchronize the device operation. When CLKEN is high, the bus switch remains in the last clocked function.

Product Pin Configuration

56-Pin

A, V

Truth Table

1S0SKLCNEKLCnoitcnuF

XX X H etatStsaL

↑ ↑ ↑ ↑

LtcennocsiD

L2B=Adna1B=A

L1B=A

L2B=A

PS8178B 11/09/98

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PI3B16232

3.3V, Synchronous 16-Bit to 32-Bit FET Mux/Demux BusSwitch

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .....................................................–65°C to +150°C

Ambient Temperature with Power Applied ....................–40°C to +85°C

Supply Voltage Range......................................................–0.5V to +4.6V

DC Input Voltage .............................................................–0.5V to +4.6V

DC Output Current .......................................................................120 mA

Power Dissipation............................................................................. 0.5W

Note:

Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.0V to 3.6V)

Parameters Description Test Conditions

(1)

Min. Typ

VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 — — V VIL Input LOW Voltage Guaranteed Logic LOW Level –0.5 — 0.8 V IIH Input HIGH Current VCC = Max., VIN = VCC —±1µA

IIL Input LOW Current VCC = MAX. , VIN = GND — — ±1 µA

(2)

Max. Units

IOZH High Impedance Output Current 0 ≤ A, B ≤ VCC ——±1µA VIK Clamp Diode Voltage VCC = Min.,VIN = –18mA — -0.7 -1.2 V Ron Switch on Resistance

(3)

VCC = Min., IIN = 0.0V, ION = 48mA or 64mA — 5 8 Ω VCC = Min.,VIN = 2.4 V, ION = 15mA — 10 15 Ω

Capacitance (TA = 25°C, f = 1 MHz)

Parameters

CIN Input Capacitance VIN = 0V 3.0 pF CON A/B Capacitance, Switch On VIN = 0V 25.0 pF

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.

2. Typical values are at Vcc = 3.3V, TA = 25°C ambient and maximum loading.

3. Measured by the voltage drop between A and B pin at indicated current through the switch. ON resistance is determined by the lower of the voltages on the two (A,B) pins.

4. This parameter is determined by device characterization but is not production tested.

(4)

Description Test Conditions Typ. Units

PS8178B 11/09/98

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PI3B16232

3.3V, Synchronous 16-Bit to 32-Bit FET Mux/Demux BusSwitch

Power Supply Characteristics

Parameters Description Test Conditions

(1)

Min. Typ

ICC Quiescent Power VCC = MAX.VIN = GND or VCC ——10µA

Supply Current

∆ICC Supply Current per VCC = MAX.VIN = 3.0 V

(3)

— — 750 µA

Input @ TTL HIGH

(2)

Max. Units

ICCD Supply Current per VCC = Max., — — 0.25 mA/

Input per MHz

(4)

A and B Pins Open MHz BE = GND Control Input Toggling 50% Duty Cycling

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for applicable device.

2. Typical values are at Vcc = 3.3V, +25°C ambient.

3. Per TTL driven input (control inputs only); A and B pins do not contribute to Icc.

4. This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified frequency. The A and B inputs generate no significant AC or DC currents as they transition. This parameter is not tested, but is guaranteed by design.

Switching Characteristics over Operating Range

V6.3ot0.3=ccV

retemaraPnoitpircseDsnoitidnoCtseT

CLK

stemiTputeS

)1(

ycneuqerFkcolC0051zHM

noitaruDesluPwolrohgihKLC3.3

KLCerofeb1S,0S ↑ 9.1

KLCerofebNEKLC ↑ 9.1

stinU.niM.xaM

htemiTdloH

KLCretfa1S,0S ↑ 1

KLCretfaNEKLC ↑ 8.1

netemiTelbanE2B,1BotKLC15

sidtemiTelbasiD2B,1BotKLC16

)3,2(

dpt

Notes:

1. See Test Circuits and Waveforms.

2. This parameter is guaranteed by design but not tested.

3. The bus switch contributes no propagational delay other than the RC delay of ON resistance of the switch and

the load capacitance.

noitagaporP

yaleD

noitagaporP

yaleD

BotA52.0

AotKLC15.4

PS8178B 11/09/98