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PI3B16215
3.3V, Hot Insertion, 20-Bit FET
BusSwitch w/Precharged Outputs
Product Features
Near Zero Propagation Delay
5Ω Switches Connect Between Two Ports
Fast Switching Speed: 4.5ns max.
Permits Hot Insertion
Isolation during Power-Off conditions
B-Port Outputs are precharged by Bias Voltage
to minimize signal distortion during live insertion
Package options include:
48-pin 150-mil wide plastic BQSOP (B)
48-pin 240-mil wide plastic TSSOP (A)
48-pin 300-mil wide plastic SSOP (V)
Logic Block Diagram
2
1A1
1A10
1OE
2A1
2A10
2OE
12
48
13
24
47
SW
SW
SW
SW
BA
46
36
35
25
1
BIASV
1B1
1B10
2B1
2B10
Product Description
Pericom Semiconductors PI3B series of logic circuits are produced
using the companys advanced 0.35 micron CMOS Technology.
The PI3B16215 provides 20-bits of high-speed bus switching. Low
on-state resistance of the switch allows connections to be made
with minimal propagation delay. The device also precharges the
B-port to a user-selectable bias voltage (BIASV) to minimize liveinsertion noise.
The device is organized as dual 10-bit bus switches with individual
output-enable (OE) inputs. When OE is LOW, the corresponding
10-bit bus switch is on and port A is connected to port B. When OE
is HIGH, the switch is open, a high-impedance state exists between
the two ports, and port B is precharged to BIASV through the
equivalent of a 10-kΩ resistor.
To ensure the high-impedance state on power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver connected to OE.
Product Pin Configuration
BIASV
1
A
12
A
1A3
1
A
15
A
1
A
GND
17
A
1
A8
19
A
110
A
21
A
22
A
V
cc
23
A
GND
24
A
25
A
26
A
27
A
28
A
29
A
210
A
1
1
2
3
4
4
5
6
6
7
8
9
48-Pin
10
A,B,V
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
OE
2
OE
1
B
1
12
B
13
B
1
B4
1B5
GND
1B6
B
17
18
B
1B9
1
B
10
21
B
22
B
23
B
GND
B
24
2
B
5
B
26
2B7
B
8
2
29
B
2B10
OE
1
PS8190D 05/04/00
Page 2
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature Range, T
Supply Voltage Range, VCC......................................... 0.5V to +4.6V
Bias Voltage Range, BIASV ........................................ 0.5V to +4.6V
Input Voltage Range ........................................................0.5V to +4.6V
DC Output Current ....................................................................... 120mA
Power Dissipation ............................................................................ 0.5W
...................................... 65ºC to +150ºC
STG
PI3B16215
3.3V, Hot Insertion,
20-Bit FET BusSwitch w/Precharged Outputs
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Electrical Characteristics (Over the Operating Range, T
retemaraPnoitpircseDsnoitidnoCtseT.niM.pyT.xaMstinU
VSAIBegatloVsaiB 0V
egatloVtupnIlortnoCleveL-hgiHV
egatloVtupnIlortnoCleveL-woLV
tnerruCtuptuOecnadepmIhgiHV
tnerruCylppuSrewoPtnecseiuQV
ffOhctiwSecnaticapaCB/A
CC
CC
CC
CC
CC
CC
CC
CC
I
V
O
0
0=
V
I
∆I
R
V
HI
V
LI
V
KI
I
I
I
HZO
I
O
I
CC
)1(
CC
C
NI
C
FFO
)2(
NO
egatloVedoiDpmalCV
tnerruCtupnIV
tnerruCtuptuOV
tnerruCylppuSV
ecnaticapaCtupnIV
ecnatsiseRnOhctiwS
= 40°C to +85°C, VCC = 3.0V to 3.6V)
A
V6.3otV7.2=2
V6.3otV7.2=5.08.0
V0.3=IIAm81=7.02.1
V6.3=V
0=V
V0.3=V,V4.2=VSAIB
V6.3=IOV,0=
V=
I
IV=O
CC
DNGro5±
V6.3ot0=01
0=51.0Am
O
V=
I
CC
DNGro01
,V3tatupnIenO
V6.3=
VtastupnIrehtO
ro
CC
DNG
0roV0.3=0.3
roV0.3=
I
I
I
I
ffOhctiwS5.8
Am46=58
Am42=58
CC
V
µA
µA
057
Fp
Ω
V
V4.2=I
I
I
Am51=0151
Notes:
1. This is the increase in supply current for each input (OE only) that is at the specified voltage level rather than VCC or GND.
2. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On state
resistance is determined by the lower of the voltages of the two (A or B) terminals.
Truth Table
EOnoitcnuF
LtropB=tropA
HVSAIB=troPB,Z=tropA
2
PS8190D 05/04/00
Page 3
20-Bit FET BusSwitch w/Precharged Outputs
Switching Characteristics over Operating Range
(Switching characteristics over recommended operating free-air temperature range unless otherwise noted)
PI3B16215
3.3V, Hot Insertion,
V
CC
%01±V3.3=
retemaraPsnoitidnoCtseT)tupnI(morF)tuptuO(oT
.niM.xaM
)1(
t
DP
t
HZP
t
LZP
DNG=VSAIB
V3=VSAIB 5.4
BroAAroB52.0
5.4
EOBroA
t
ZHP
t
ZLP
DNG=VSAIB 0.5
V3=VSAIB 0.5
Note:
1. The propagation delay is the calculated RC time of the typical on-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
Parameter Measurements (V
= 2.7 and 3.3V ±10%)
CC
Test S1
t
t
PLZ/tPZL
t
PHZ/tPZH
PD
Open
6V
GND
stinU
sn
Voltage Waveforms Propagation Delay Times
Notes:
1. C
includes probe and jig capacitance.
L
2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
3. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, Z
4. The outputs are measured one at a time with one transition per measurement.
5. t
6. t
7. t
TPZ
PZL
PLH
and t
and t
and t
are the same as t
PHZ
are the same as t
PZH
are the same as t
PHL
DIS
EN
PD
Figure 2. Load Circuit and Voltage Waveforms
3
Voltage Waveforms Enable and Disable Times
= 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns.
O
PS8190D 05/04/00
Page 4
48-Pin TSSOP (A) Package
48
.236
.244
3.3V, Hot Insertion,
20-Bit FET BusSwitch w/Precharged Outputs
6.0
6.2
PI3B16215
1
X.XX
DENOTES DIMENSIONS
X.XX
IN MILLIMETERS
48-Pin BQSOP (B) Package
48
.488
12.4
.496
12.6
.0197
BSC
0.50 0.17
.007
.010
0.27
.047
1.20 Max
.150
.157
3.80
4.00
.002
.006
0.05
0.15
SEATING PLANE
.228
.244
5.80
6.20
.319
8.1
0.45
0.75
BSC
.018
.030
.004
.008
0.09
0.20
1
.014
0.356
X.XX
DENOTES DIMENSIONS
X.XX
IN MILLIMETERS
REF
.386
.394
9.80
10.00
.0157 BSC
0.40
.0051
.009
0.13
0.23
Gauge Plane
.020
.063
.029
0.50
0.75
Nom
.079
1.60
2.0
.002
.009
PS8190D 05/04/00
0.05
0.25
Max
0.25
.010
BSC
0.381
.008
0.20
.015
Nom
5˚
x 45˚
4
Page 5
48-Pin SSOP (V) Package
48
1
.620
.630
15.75
16.00
.025 BSC
0.635
.291
.299
7.39
7.59
.008
.0135
.395
.420
10.03
10.67
0.20
0.34
Gauge Plane
.008
0.20
Nom.
.010
0-8˚
PI3B16215
3.3V, Hot Insertion,
20-Bit FET BusSwitch w/Precharged Outputs
0.25
.015
.025
0.381
0.635
.02
.04
0.51
1.01
x 45˚
.110 2.79
.008
.016
0.20
0.40
Max
X.XX
DENOTES DIMENSIONS
X.XX
IN MILLIMETERS
Order Information
traPegakcaP-niPhtdiWerutarepmeT
A51261B3IP)65A(POSST-65lim-042
Cº58+otCº04B51261B3IP)65B(POSQB-65lim-051
V51261B3IP)65V(POSS-65lim-003
Applications Information
Logic Inputs
The logic control inputs can be driven up to +3.6V regardless of the
supply voltage. For example, given a +3.3V supply, IN may be driven
low to 0V and high to 3.6V. Driving IN Rail-to-Rail® minimizes power
consumption.
Power-Supply Sequencing
Proper power-supply sequencing is recommended for all CMOS
devices. Always apply VCC before applying V
input/output or control pins.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd
and signals to
BIAS
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5
PS8190D 05/04/00
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