Datasheet PHX3N40E Datasheet (Philips)

Page 1
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated

FEATURES SYMBOL QUICK REFERENCE DATA

• Repetitive Avalanche Rated
• Fast switching V
d
= 400 V
DSS
• High thermal cycling performance I
• Isolated package
g
s
R
DS(ON)
= 1.7 A
D
3.5

GENERAL DESCRIPTION PINNING SOT186A

N-channel, enhancement mode PIN DESCRIPTION field-effect power transistor, intendedforuse in off-line switched 1 gate mode power supplies, T.V. and computer monitor power supplies, 2 drain d.c.tod.c.converters,motorcontrol circuits and general purpose 3 source switching applications.
case isolated The PHX3N40E is supplied in the SOT186A full pack, isolated package.
case
123

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
V
DGR
V
GS
I
D
I
DM
P
D
Tj, T
Drain-source voltage Tj = 25 ˚C to 150˚C - 400 V Drain-gate voltage Tj = 25 ˚C to 150˚C; RGS = 20 k - 400 V Gate-source voltage - ± 30 V Continuous drain current Ths = 25 ˚C; VGS = 10 V - 1.7 A
Ths = 100 ˚C; VGS = 10 V - 1.1 A Pulsed drain current Ths = 25 ˚C - 10 A Total dissipation Ths = 25 ˚C - 25 W Operating junction and - 55 150 ˚C
stg
storage temperature range

AVALANCHE ENERGY LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
E
AR
IAS, I
1 pulse width and repetition rate limited by Tj max.
December 1998 1 Rev 1.200
Non-repetitive avalanche Unclamped inductive load, IAS = 0.9 A; - 120 mJ energy tp = 0.53 ms; Tj prior to avalanche = 25˚C;
VDD 50 V; RGS = 50 ; VGS = 10 V; refer
to fig:17 Repetitive avalanche energy1IAR = 2.5 A; tp = 2.5 µs; Tj prior to - 3.2 mJ
avalanche = 25˚C; RGS = 50 ; VGS = 10 V;
refer to fig:18 Repetitive and non-repetitive - 2.5 A
AR
avalanche current
Page 2
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated

ISOLATION LIMITING VALUE & CHARACTERISTIC

Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
isol
C
isol

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-hs
R
th j-a

ELECTRICAL CHARACTERISTICS

Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
(BR)DSS
T
j
R
DS(ON)
V
GS(TO)
g
fs
I
DSS
I
GSS
Q
g(tot)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
d
L
s
C
iss
C
oss
C
rss
R.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal - 2500 V three terminals to external waveform; heatsink R.H. 65% ; clean and dustfree
Capacitance from T2 to external f = 1 MHz - 10 - pF heatsink
Thermal resistance junction with heatsink compound - - 5 K/W to heatsink Thermal resistance junction - 55 - K/W to ambient
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 400 - - V voltage
/ Drain-source breakdown VDS = VGS; ID = 0.25 mA - 0.1 - %/K
voltage temperature coefficient Drain-source on resistance VGS = 10 V; ID = 1.25 A - 2 3.5 Gate threshold voltage VDS = VGS; ID = 0.25 mA 2.0 3.0 4.0 V Forward transconductance VDS = 30 V; ID = 1.25 A 0.5 1.5 - S Drain-source leakage current VDS = 400 V; VGS = 0 V - 1 25 µA
VDS = 320 V; VGS = 0 V; Tj = 125 ˚C - 30 250 µA Gate-source leakage current VGS = ±30 V; VDS = 0 V - 10 200 nA
Total gate charge ID = 2.5 A; V Gate-source charge - 2 3 nC
= 320 V; VGS = 10 V - 20 25 nC
DD
Gate-drain (Miller) charge - 8 12 nC Turn-on delay time VDD = 200 V; RD = 82 ; - 10 - ns
Turn-on rise time RG = 24 -25-ns Turn-off delay time - 46 - ns Turn-off fall time - 25 - ns
Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 240 - pF
Output capacitance - 44 - pF Feedback capacitance - 26 - pF
December 1998 2 Rev 1.200
Page 3
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS

Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous source current Ths = 25˚C - - 2.5 A (body diode) Pulsed source current (body Ths = 25˚C - - 10 A diode) Diode forward voltage IS = 2.5 A; VGS = 0 V - - 1.2 V
Reverse recovery time IS = 2.5 A; VGS = 0 V; dI/dt = 100 A/µs - 200 - ns Reverse recovery charge - 2 - µC
December 1998 3 Rev 1.200
Page 4
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated
PD%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
Normalised Power Derating
with heatsink compound
Ths / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
with heatsink compound
Ths / C
= f(Ths)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Ths); conditions: VGS ≥ 10 V
D 25 ˚C
Zth j-hs / (K/W)
1E+01
0.5
1E+00
1E-01
1E-02
0.2
0.1
0.05
0.02
P
D
0
1E-07 1E-05 1E-03 1E-01 1E+01
t / s
ZTHX43
p
p
t
t
D =
T
t
T
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-hs
ID, Drain current (Amps)
8
Tj = 25 C
7 6 5 4 3 2 1 0
0 5 10 15 20 25 30
VDS, Drain-Source voltage (Volts)
Fig.5. Typical output characteristics
ID = f(VDS); parameter V
PHP2N40
20 V
10 V
6.5 V 6 V
5.5 V 5 V
VGS = 4.5 V
.
GS
7 V
Drain current, ID (Amps)
10
RDS(ON) = VDS/ID
1
DC
0.1
0.01 10 100 1000
Drain-source voltage, VDS (Volts)
PHX1N40
tp = 10 us
100us
1ms 10ms
100ms
Fig.3. Safe operating area. Ths = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
Drain-Source on resistance, RDS(ON) (Ohms)
6
5
4
3
2
1
0
012345678
6 V5.5 V5V
6.5 V
7 V
Drain current, ID (Amps)
10 V
Fig.6. Typical on-state resistance
R
p
= f(ID); parameter V
DS(ON)
PHP2N40
Tj = 25 C
VGS = 20 V
.
GS
December 1998 4 Rev 1.200
Page 5
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated
Drain current, ID (A)
8
VDS > ID x RDS(on)max
7 6 5 4 3 2 1 0
0246810
Gate-source voltage, VGS (V)
Tj = 25 C
PHP2N40
150 C
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter T
Transconductance, gfs (S)
2.5 VDS > ID x RDS(on)max
2
1.5
1
Tj = 25 C
j
PHP2N40
150 C
VGS(TO) / V
4
3
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage
V
= f(Tj); conditions: ID = 0.25 mA; VDS = V
GS(TO)
1E-01
1E-02
1E-03
1E-04
ID / A
SUB-THRESHOLD CONDUCTION
2 %
typ
.
GS
98 %
0.5
0
012345678
Fig.8. Typical transconductance
a
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
Drain current, ID (A)
gfs = f(ID); parameter T
Normalised RDS(ON) = f(Tj)
Tj / C
.
j
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
= f(Tj); ID = 1.25 A; VGS = 10 V
1E-05
1E-06
0 1 2 3 4
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(V
Capacitances, Ciss, Coss, Crss (pF)
1000
100
10
1
1 10 100 1000
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
; conditions: Tj = 25 ˚C; VDS = V
GS)
Ciss
Coss
Crss
Drain-source voltage, VDS (V)
, C
iss
PHP2N40
oss
, C
GS
rss
.
December 1998 5 Rev 1.200
Page 6
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated
Gate-Source voltage, VGS (Volts)
20
ID = 2.5 A
15
10
5
0
0 10203040
Gate charge, Qg (nC)
200 V
100 V
PHP2N40
VDD = 320 V
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); parameter V
GS
Switching times, td(on), tr, td(off), tf (ns)
1000
VDD = 200V RD = 82 Ohms Tj = 25 C
100
td(off)
tr
tf
10
td(on)
1
0 20406080100
Gate resistance, RG (Ohms)
Fig.14. Typical switching times; t
d(on)
DS
, tr, t
PHP2N40
, tf = f(RG)
d(off)
Source-drain diode current, IF(A)
10
VGS = 0 V
8
6
4
2
0
0 0.5 1 1.5
Source-Drain voltage, VSDS (V)
PHP2N40
Tj = 25 C150 C
Fig.16. Source-Drain diode characteristic.
IF = f(V
Non-repetitive Avalanche current, IAS (A)
10
VDS
1
tp
ID
0.1 1E-06 1E-05 1E-04 1E-03 1E-02
); parameter T
SDS
Tj prior to avalanche = 25 C
125 C
Avalanche time, tp (s)
j
PHP3N40E
Fig.17. Maximum permissible non-repetitive
avalanche current (IAS) versus avalanche time (tp);
unclamped inductive load
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100 -50 0 50 100 150 Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage
V
(BR)DSS/V(BR)DSS 25 ˚C
= f(Tj)
;
Maximum Repetitive Avalanche Current, IAR (A)
10
1
0.1
0.01 1E-06 1E-05 1E-04 1E-03 1E-02
Tj prior to avalanche = 25 C
125 C
PHP3N40E
Avalanche time, tp (s)
Fig.18. Maximum permissible repetitive avalanche
current (IAR) versus avalanche time (tp)
December 1998 6 Rev 1.200
Page 7
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated

MECHANICAL DATA

Dimensions in mm Net Mass: 2 g
10.3
Recesses (2x)
2.5
0.8 max. depth
3 max.
not tinned
13.5 min.
0.4
M
max
3.2
3.0
123
5.08
2.8
2.54
15.8
max.
3
19
max.
seating
plane
0.5
2.5
4.6
max
2.9 max
6.4
0.6
2.5
15.8 max
Fig.19. SOT186A; The seating plane is electrically isolated from all terminals.
1.3
1.0 (2x)
0.9
0.7
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide.
2. Refer to mounting instructions for F-pack envelopes.
3. Epoxy meets UL94 V0 at 1/8".
December 1998 7 Rev 1.200
Page 8
Philips Semiconductors Product specification
PowerMOS transistors PHX3N40E Avalanche energy rated

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
December 1998 8 Rev 1.200
Loading...